09:05:12:ST3_hmp4040:INFO:	HAMEG,HMP2030,017836163,HW50010002/SW2.30
09:05:12:febtest:INFO:	FEB8.2 selected
09:05:12:febtest:INFO:	FEB8.2 selected
09:05:14:ST3_Shared:INFO:	Listo of operators:Oleksandr S.; 
09:05:23:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
09:05:23:ST3_emu:ERROR:	device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!
09:05:28:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
09:05:30:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:05:30:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
09:05:30:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:05:31:febtest:INFO:	Tsting FEB with SN 1010
09:05:32:smx_tester:INFO:	Scanning setup
09:05:32:elinks:INFO:	Disabling clock on downlink 0
09:05:32:elinks:INFO:	Disabling clock on downlink 1
09:05:32:elinks:INFO:	Disabling clock on downlink 2
09:05:32:elinks:INFO:	Disabling clock on downlink 3
09:05:32:elinks:INFO:	Disabling clock on downlink 4
09:05:32:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:05:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:05:32:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:05:32:elinks:INFO:	Disabling clock on downlink 0
09:05:32:elinks:INFO:	Disabling clock on downlink 1
09:05:32:elinks:INFO:	Disabling clock on downlink 2
09:05:32:elinks:INFO:	Disabling clock on downlink 3
09:05:32:elinks:INFO:	Disabling clock on downlink 4
09:05:32:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:05:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:05:32:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:05:32:elinks:INFO:	Disabling clock on downlink 0
09:05:32:elinks:INFO:	Disabling clock on downlink 1
09:05:32:elinks:INFO:	Disabling clock on downlink 2
09:05:32:elinks:INFO:	Disabling clock on downlink 3
09:05:32:elinks:INFO:	Disabling clock on downlink 4
09:05:32:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:05:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:05:32:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:05:32:elinks:INFO:	Disabling clock on downlink 0
09:05:32:elinks:INFO:	Disabling clock on downlink 1
09:05:32:elinks:INFO:	Disabling clock on downlink 2
09:05:32:elinks:INFO:	Disabling clock on downlink 3
09:05:32:elinks:INFO:	Disabling clock on downlink 4
09:05:32:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:05:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:05:33:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 16
09:05:33:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 17
09:05:33:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 18
09:05:33:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 19
09:05:33:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 20
09:05:33:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 21
09:05:33:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 22
09:05:33:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 23
09:05:33:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 24
09:05:33:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 25
09:05:33:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 26
09:05:33:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 27
09:05:33:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 28
09:05:33:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 29
09:05:33:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 30
09:05:33:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 31
09:05:33:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:05:33:elinks:INFO:	Disabling clock on downlink 0
09:05:33:elinks:INFO:	Disabling clock on downlink 1
09:05:33:elinks:INFO:	Disabling clock on downlink 2
09:05:33:elinks:INFO:	Disabling clock on downlink 3
09:05:33:elinks:INFO:	Disabling clock on downlink 4
09:05:33:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:05:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:05:33:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:05:33:setup_element:INFO:	Scanning clock phase
09:05:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:05:33:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
09:05:33:setup_element:INFO:	Clock phase scan results for group 0, downlink 3
09:05:33:setup_element:INFO:	Eye window for uplink 16: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:05:33:setup_element:INFO:	Eye window for uplink 17: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:05:33:setup_element:INFO:	Eye window for uplink 18: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
09:05:33:setup_element:INFO:	Eye window for uplink 19: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
09:05:33:setup_element:INFO:	Eye window for uplink 20: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
09:05:33:setup_element:INFO:	Eye window for uplink 21: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
09:05:33:setup_element:INFO:	Eye window for uplink 22: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:05:33:setup_element:INFO:	Eye window for uplink 23: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:05:33:setup_element:INFO:	Eye window for uplink 24: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
09:05:33:setup_element:INFO:	Eye window for uplink 25: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
09:05:33:setup_element:INFO:	Eye window for uplink 26: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
09:05:33:setup_element:INFO:	Eye window for uplink 27: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
09:05:33:setup_element:INFO:	Eye window for uplink 28: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
09:05:33:setup_element:INFO:	Eye window for uplink 29: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
09:05:33:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:05:33:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:05:33:setup_element:INFO:	Setting the clock phase to 30 for group 0, downlink 3
09:05:33:setup_element:INFO:	Scanning data phases
09:05:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:05:33:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
09:05:39:setup_element:INFO:	Data phase scan results for group 0, downlink 3
09:05:39:setup_element:INFO:	Eye window for uplink 16: ________________XXXXX___________________
Data delay found: 38
09:05:39:setup_element:INFO:	Eye window for uplink 17: ____________XXXX________________________
Data delay found: 33
09:05:39:setup_element:INFO:	Eye window for uplink 18: ________XXXXXX__________________________
Data delay found: 30
09:05:39:setup_element:INFO:	Eye window for uplink 19: ______XXXXX_____________________________
Data delay found: 28
09:05:39:setup_element:INFO:	Eye window for uplink 20: ______XXXXX_____________________________
Data delay found: 28
09:05:39:setup_element:INFO:	Eye window for uplink 21: _____XXXXX______________________________
Data delay found: 27
09:05:39:setup_element:INFO:	Eye window for uplink 22: ________XXXX____________________________
Data delay found: 29
09:05:39:setup_element:INFO:	Eye window for uplink 23: _____XXXX_______________________________
Data delay found: 26
09:05:39:setup_element:INFO:	Eye window for uplink 24: XXX_________________________________XXXX
Data delay found: 19
09:05:39:setup_element:INFO:	Eye window for uplink 25: _XXXXX__________________________________
Data delay found: 23
09:05:39:setup_element:INFO:	Eye window for uplink 26: __________________________________XXXX__
Data delay found: 15
09:05:39:setup_element:INFO:	Eye window for uplink 27: XXXXX________________________________XXX
Data delay found: 20
09:05:39:setup_element:INFO:	Eye window for uplink 28: XXX__________________________________XXX
Data delay found: 19
09:05:39:setup_element:INFO:	Eye window for uplink 29: XXXXX__________________________________X
Data delay found: 21
09:05:39:setup_element:INFO:	Eye window for uplink 30: XXXX__________________________________XX
Data delay found: 20
09:05:39:setup_element:INFO:	Eye window for uplink 31: XXX_________________________________XXXX
Data delay found: 19
09:05:39:setup_element:INFO:	Setting the data phase to 38 for uplink 16
09:05:39:setup_element:INFO:	Setting the data phase to 33 for uplink 17
09:05:39:setup_element:INFO:	Setting the data phase to 30 for uplink 18
09:05:39:setup_element:INFO:	Setting the data phase to 28 for uplink 19
09:05:39:setup_element:INFO:	Setting the data phase to 28 for uplink 20
09:05:39:setup_element:INFO:	Setting the data phase to 27 for uplink 21
09:05:39:setup_element:INFO:	Setting the data phase to 29 for uplink 22
09:05:39:setup_element:INFO:	Setting the data phase to 26 for uplink 23
09:05:39:setup_element:INFO:	Setting the data phase to 19 for uplink 24
09:05:39:setup_element:INFO:	Setting the data phase to 23 for uplink 25
09:05:39:setup_element:INFO:	Setting the data phase to 15 for uplink 26
09:05:39:setup_element:INFO:	Setting the data phase to 20 for uplink 27
09:05:39:setup_element:INFO:	Setting the data phase to 19 for uplink 28
09:05:39:setup_element:INFO:	Setting the data phase to 21 for uplink 29
09:05:39:setup_element:INFO:	Setting the data phase to 20 for uplink 30
09:05:39:setup_element:INFO:	Setting the data phase to 19 for uplink 31
09:05:39:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 30
    Window Length: 70
    Eye Windows:
      Uplink 16: _____________________________________________________________________XXXXXXX____
      Uplink 17: _____________________________________________________________________XXXXXXX____
      Uplink 18: __________________________________________________________________XXXXXXX_______
      Uplink 19: __________________________________________________________________XXXXXXX_______
      Uplink 20: ___________________________________________________________________XXXXXXX______
      Uplink 21: ___________________________________________________________________XXXXXXX______
      Uplink 22: _____________________________________________________________________XXXXXXX____
      Uplink 23: _____________________________________________________________________XXXXXXX____
      Uplink 24: ___________________________________________________________________XXXXXXXX_____
      Uplink 25: ___________________________________________________________________XXXXXXXX_____
      Uplink 26: ___________________________________________________________________XXXXXXX______
      Uplink 27: ___________________________________________________________________XXXXXXX______
      Uplink 28: _____________________________________________________________________XXXXXX_____
      Uplink 29: _____________________________________________________________________XXXXXX_____
      Uplink 30: _____________________________________________________________________XXXXXXX____
      Uplink 31: _____________________________________________________________________XXXXXXX____
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 38
      Window Length: 35
      Eye Window: ________________XXXXX___________________
    Uplink 17:
      Optimal Phase: 33
      Window Length: 36
      Eye Window: ____________XXXX________________________
    Uplink 18:
      Optimal Phase: 30
      Window Length: 34
      Eye Window: ________XXXXXX__________________________
    Uplink 19:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 20:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 21:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 22:
      Optimal Phase: 29
      Window Length: 36
      Eye Window: ________XXXX____________________________
    Uplink 23:
      Optimal Phase: 26
      Window Length: 36
      Eye Window: _____XXXX_______________________________
    Uplink 24:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX
    Uplink 25:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
    Uplink 26:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 27:
      Optimal Phase: 20
      Window Length: 32
      Eye Window: XXXXX________________________________XXX
    Uplink 28:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 29:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 30:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 31:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX
]
09:05:39:setup_element:INFO:	Beginning SMX ASICs map scan
09:05:39:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:05:39:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
09:05:39:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
09:05:39:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
09:05:39:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:05:39:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 17
09:05:39:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 16
09:05:39:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 24
09:05:39:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 25
09:05:39:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 19
09:05:39:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 18
09:05:40:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 26
09:05:40:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 27
09:05:40:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 21
09:05:40:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 20
09:05:40:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 28
09:05:40:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 29
09:05:40:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 23
09:05:40:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 22
09:05:40:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 30
09:05:40:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 31
09:05:42:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 24), (1, 25)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 30), (1, 31)
  Clock Phase Characteristic:
    Optimal Phase: 30
    Window Length: 70
    Eye Windows:
      Uplink 16: _____________________________________________________________________XXXXXXX____
      Uplink 17: _____________________________________________________________________XXXXXXX____
      Uplink 18: __________________________________________________________________XXXXXXX_______
      Uplink 19: __________________________________________________________________XXXXXXX_______
      Uplink 20: ___________________________________________________________________XXXXXXX______
      Uplink 21: ___________________________________________________________________XXXXXXX______
      Uplink 22: _____________________________________________________________________XXXXXXX____
      Uplink 23: _____________________________________________________________________XXXXXXX____
      Uplink 24: ___________________________________________________________________XXXXXXXX_____
      Uplink 25: ___________________________________________________________________XXXXXXXX_____
      Uplink 26: ___________________________________________________________________XXXXXXX______
      Uplink 27: ___________________________________________________________________XXXXXXX______
      Uplink 28: _____________________________________________________________________XXXXXX_____
      Uplink 29: _____________________________________________________________________XXXXXX_____
      Uplink 30: _____________________________________________________________________XXXXXXX____
      Uplink 31: _____________________________________________________________________XXXXXXX____
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 38
      Window Length: 35
      Eye Window: ________________XXXXX___________________
    Uplink 17:
      Optimal Phase: 33
      Window Length: 36
      Eye Window: ____________XXXX________________________
    Uplink 18:
      Optimal Phase: 30
      Window Length: 34
      Eye Window: ________XXXXXX__________________________
    Uplink 19:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 20:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 21:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 22:
      Optimal Phase: 29
      Window Length: 36
      Eye Window: ________XXXX____________________________
    Uplink 23:
      Optimal Phase: 26
      Window Length: 36
      Eye Window: _____XXXX_______________________________
    Uplink 24:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX
    Uplink 25:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
    Uplink 26:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 27:
      Optimal Phase: 20
      Window Length: 32
      Eye Window: XXXXX________________________________XXX
    Uplink 28:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 29:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 30:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 31:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX

09:05:42:setup_element:INFO:	Performing Elink synchronization
09:05:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:05:42:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
09:05:42:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
09:05:42:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
09:05:42:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 3
09:05:42:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:05:42:ST3_emu:INFO:	Number of chips: 8
09:05:42:ST3_emu:INFO:	Chip address:  	0x0
09:05:42:ST3_emu:INFO:	Chip address:  	0x1
09:05:42:ST3_emu:INFO:	Chip address:  	0x2
09:05:42:ST3_emu:INFO:	Chip address:  	0x3
09:05:42:ST3_emu:INFO:	Chip address:  	0x4
09:05:42:ST3_emu:INFO:	Chip address:  	0x5
09:05:42:ST3_emu:INFO:	Chip address:  	0x6
09:05:42:ST3_emu:INFO:	Chip address:  	0x7
09:05:43:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:05:43:febtest:INFO:	0-0 | XA-000-08-001-064-041-200-08 |  34.6 | 1177.4
09:05:43:febtest:INFO:	0-1 | XA-000-08-002-000-006-213-03 |  21.9 | 1218.6
09:05:43:febtest:INFO:	0-2 | XA-000-08-001-064-041-136-13 |  47.3 | 1147.8
09:05:44:febtest:INFO:	0-3 | XA-000-08-002-000-006-216-03 |  47.3 | 1153.7
09:05:44:febtest:INFO:	0-4 | XA-000-08-001-064-042-192-06 |  34.6 | 1183.3
09:05:44:febtest:INFO:	0-5 | XA-000-08-002-000-006-215-03 |  31.4 | 1206.9
09:05:44:febtest:INFO:	0-6 | XA-000-08-002-000-006-217-03 |  37.7 | 1171.5
09:05:45:febtest:INFO:	0-7 | XA-000-08-002-000-006-218-03 |  28.2 | 1212.7
09:05:45:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
09:05:48:ST3_smx:INFO:	chip: 0-0 	 40.898880 C 	 1141.874115 mV
09:05:48:ST3_smx:INFO:	# loops 0
09:05:50:ST3_smx:INFO:	# loops 1
09:05:52:ST3_smx:INFO:	# loops 2
09:05:53:ST3_smx:INFO:	# loops 3
09:05:55:ST3_smx:INFO:	# loops 4
09:05:57:ST3_smx:INFO:	Total # of broken channels: 1
09:05:57:ST3_smx:INFO:	List of broken channels: [127]
09:05:57:ST3_smx:INFO:	Total # of broken channels: 1
09:05:57:ST3_smx:INFO:	List of broken channels: [127]
09:05:58:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
09:06:01:ST3_smx:INFO:	chip: 0-1 	 25.062742 C 	 1200.969315 mV
09:06:01:ST3_smx:INFO:	# loops 0
09:06:03:ST3_smx:INFO:	# loops 1
09:06:04:ST3_smx:INFO:	# loops 2
09:06:06:ST3_smx:INFO:	# loops 3
09:06:08:ST3_smx:INFO:	# loops 4
09:06:09:ST3_smx:INFO:	Total # of broken channels: 0
09:06:09:ST3_smx:INFO:	List of broken channels: []
09:06:09:ST3_smx:INFO:	Total # of broken channels: 0
09:06:09:ST3_smx:INFO:	List of broken channels: []
09:06:10:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
09:06:14:ST3_smx:INFO:	chip: 0-2 	 40.898880 C 	 1153.732915 mV
09:06:14:ST3_smx:INFO:	# loops 0
09:06:15:ST3_smx:INFO:	# loops 1
09:06:17:ST3_smx:INFO:	# loops 2
09:06:19:ST3_smx:INFO:	# loops 3
09:06:20:ST3_smx:INFO:	# loops 4
09:06:22:ST3_smx:INFO:	Total # of broken channels: 0
09:06:22:ST3_smx:INFO:	List of broken channels: []
09:06:22:ST3_smx:INFO:	Total # of broken channels: 0
09:06:22:ST3_smx:INFO:	List of broken channels: []
09:06:23:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
09:06:26:ST3_smx:INFO:	chip: 0-3 	 37.726682 C 	 1159.654860 mV
09:06:26:ST3_smx:INFO:	# loops 0
09:06:28:ST3_smx:INFO:	# loops 1
09:06:30:ST3_smx:INFO:	# loops 2
09:06:31:ST3_smx:INFO:	# loops 3
09:06:33:ST3_smx:INFO:	# loops 4
09:06:35:ST3_smx:INFO:	Total # of broken channels: 0
09:06:35:ST3_smx:INFO:	List of broken channels: []
09:06:35:ST3_smx:INFO:	Total # of broken channels: 0
09:06:35:ST3_smx:INFO:	List of broken channels: []
09:06:35:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
09:06:39:ST3_smx:INFO:	chip: 0-4 	 40.898880 C 	 1153.732915 mV
09:06:39:ST3_smx:INFO:	# loops 0
09:06:41:ST3_smx:INFO:	# loops 1
09:06:42:ST3_smx:INFO:	# loops 2
09:06:44:ST3_smx:INFO:	# loops 3
09:06:45:ST3_smx:INFO:	# loops 4
09:06:47:ST3_smx:INFO:	Total # of broken channels: 0
09:06:47:ST3_smx:INFO:	List of broken channels: []
09:06:47:ST3_smx:INFO:	Total # of broken channels: 0
09:06:47:ST3_smx:INFO:	List of broken channels: []
09:06:48:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
09:06:51:ST3_smx:INFO:	chip: 0-5 	 37.726682 C 	 1183.292940 mV
09:06:51:ST3_smx:INFO:	# loops 0
09:06:53:ST3_smx:INFO:	# loops 1
09:06:55:ST3_smx:INFO:	# loops 2
09:06:56:ST3_smx:INFO:	# loops 3
09:06:58:ST3_smx:INFO:	# loops 4
09:06:59:ST3_smx:INFO:	Total # of broken channels: 0
09:06:59:ST3_smx:INFO:	List of broken channels: []
09:06:59:ST3_smx:INFO:	Total # of broken channels: 0
09:06:59:ST3_smx:INFO:	List of broken channels: []
09:07:00:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
09:07:04:ST3_smx:INFO:	chip: 0-6 	 34.556970 C 	 1183.292940 mV
09:07:04:ST3_smx:INFO:	# loops 0
09:07:05:ST3_smx:INFO:	# loops 1
09:07:07:ST3_smx:INFO:	# loops 2
09:07:08:ST3_smx:INFO:	# loops 3
09:07:10:ST3_smx:INFO:	# loops 4
09:07:12:ST3_smx:INFO:	Total # of broken channels: 0
09:07:12:ST3_smx:INFO:	List of broken channels: []
09:07:12:ST3_smx:INFO:	Total # of broken channels: 0
09:07:12:ST3_smx:INFO:	List of broken channels: []
09:07:12:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
09:07:16:ST3_smx:INFO:	chip: 0-7 	 37.726682 C 	 1177.390875 mV
09:07:16:ST3_smx:INFO:	# loops 0
09:07:18:ST3_smx:INFO:	# loops 1
09:07:19:ST3_smx:INFO:	# loops 2
09:07:21:ST3_smx:INFO:	# loops 3
09:07:22:ST3_smx:INFO:	# loops 4
09:07:24:ST3_smx:INFO:	Total # of broken channels: 0
09:07:24:ST3_smx:INFO:	List of broken channels: []
09:07:24:ST3_smx:INFO:	Total # of broken channels: 5
09:07:24:ST3_smx:INFO:	List of broken channels: [1, 21, 23, 25, 31]
09:07:25:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:07:25:febtest:INFO:	0-0 | XA-000-08-001-064-041-200-08 |  47.3 | 1130.0
09:07:25:febtest:INFO:	0-1 | XA-000-08-002-000-006-213-03 |  31.4 | 1189.2
09:07:25:febtest:INFO:	0-2 | XA-000-08-001-064-041-136-13 |  44.1 | 1147.8
09:07:26:febtest:INFO:	0-3 | XA-000-08-002-000-006-216-03 |  44.1 | 1153.7
09:07:26:febtest:INFO:	0-4 | XA-000-08-001-064-042-192-06 |  44.1 | 1153.7
09:07:26:febtest:INFO:	0-5 | XA-000-08-002-000-006-215-03 |  40.9 | 1177.4
09:07:26:febtest:INFO:	0-6 | XA-000-08-002-000-006-217-03 |  34.6 | 1183.3
09:07:26:febtest:INFO:	0-7 | XA-000-08-002-000-006-218-03 |  37.7 | 1177.4
09:09:10:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
09:09:16:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_1010/A//TestDate_2023_08_21-09_05_30/
09:09:16:ST3_Shared:ERROR:	No SMX found!!!