13:08:02:ST3_hmp4040:INFO:	HAMEG,HMP2030,017836163,HW50010002/SW2.30
13:08:02:febtest:INFO:	FEB8.2 selected
13:08:02:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
13:08:02:febtest:INFO:	FEB8.2 selected
13:08:02:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
13:08:42:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:08:42:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
13:08:42:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:08:42:febtest:INFO:	Tsting FEB with SN 1010
13:08:43:smx_tester:INFO:	Scanning setup
13:08:43:elinks:INFO:	Disabling clock on downlink 0
13:08:43:elinks:INFO:	Disabling clock on downlink 1
13:08:43:elinks:INFO:	Disabling clock on downlink 2
13:08:43:elinks:INFO:	Disabling clock on downlink 3
13:08:43:elinks:INFO:	Disabling clock on downlink 4
13:08:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:08:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:08:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:08:43:elinks:INFO:	Disabling clock on downlink 0
13:08:43:elinks:INFO:	Disabling clock on downlink 1
13:08:43:elinks:INFO:	Disabling clock on downlink 2
13:08:43:elinks:INFO:	Disabling clock on downlink 3
13:08:43:elinks:INFO:	Disabling clock on downlink 4
13:08:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:08:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:08:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:08:43:elinks:INFO:	Disabling clock on downlink 0
13:08:43:elinks:INFO:	Disabling clock on downlink 1
13:08:43:elinks:INFO:	Disabling clock on downlink 2
13:08:43:elinks:INFO:	Disabling clock on downlink 3
13:08:43:elinks:INFO:	Disabling clock on downlink 4
13:08:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:08:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:08:44:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:08:44:elinks:INFO:	Disabling clock on downlink 0
13:08:44:elinks:INFO:	Disabling clock on downlink 1
13:08:44:elinks:INFO:	Disabling clock on downlink 2
13:08:44:elinks:INFO:	Disabling clock on downlink 3
13:08:44:elinks:INFO:	Disabling clock on downlink 4
13:08:44:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:08:44:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:08:44:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 24
13:08:44:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 25
13:08:44:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 26
13:08:44:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 27
13:08:44:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 28
13:08:44:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 29
13:08:44:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 30
13:08:44:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 31
13:08:44:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:08:44:elinks:INFO:	Disabling clock on downlink 0
13:08:44:elinks:INFO:	Disabling clock on downlink 1
13:08:44:elinks:INFO:	Disabling clock on downlink 2
13:08:44:elinks:INFO:	Disabling clock on downlink 3
13:08:44:elinks:INFO:	Disabling clock on downlink 4
13:08:44:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:08:44:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:08:44:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:08:44:setup_element:INFO:	Scanning clock phase
13:08:44:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:08:44:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
13:08:44:setup_element:INFO:	Clock phase scan results for group 0, downlink 3
13:08:44:setup_element:INFO:	Eye window for uplink 24: ________________________________________________________________________________
Clock Delay: 40
13:08:44:setup_element:INFO:	Eye window for uplink 25: ________________________________________________________________________________
Clock Delay: 40
13:08:44:setup_element:INFO:	Eye window for uplink 26: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
13:08:44:setup_element:INFO:	Eye window for uplink 27: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
13:08:44:setup_element:INFO:	Eye window for uplink 28: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
13:08:44:setup_element:INFO:	Eye window for uplink 29: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
13:08:44:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
13:08:44:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
13:08:44:setup_element:INFO:	Setting the clock phase to 30 for group 0, downlink 3
13:08:44:setup_element:INFO:	Scanning data phases
13:08:44:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:08:44:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
13:08:50:setup_element:INFO:	Data phase scan results for group 0, downlink 3
13:08:50:setup_element:INFO:	Eye window for uplink 24: XXXXXX__________________________________
Data delay found: 22
13:08:50:setup_element:INFO:	Eye window for uplink 25: ____XXXXX_______________________________
Data delay found: 26
13:08:50:setup_element:INFO:	Eye window for uplink 26: XX___________________________________XXX
Data delay found: 19
13:08:50:setup_element:INFO:	Eye window for uplink 27: _XXXXX__________________________________
Data delay found: 23
13:08:50:setup_element:INFO:	Eye window for uplink 28: _XXXXX__________________________________
Data delay found: 23
13:08:50:setup_element:INFO:	Eye window for uplink 29: ___XXXXX________________________________
Data delay found: 25
13:08:50:setup_element:INFO:	Eye window for uplink 30: __XXXXXX________________________________
Data delay found: 24
13:08:50:setup_element:INFO:	Eye window for uplink 31: _XXXXX__________________________________
Data delay found: 23
13:08:50:setup_element:INFO:	Setting the data phase to 22 for uplink 24
13:08:50:setup_element:INFO:	Setting the data phase to 26 for uplink 25
13:08:50:setup_element:INFO:	Setting the data phase to 19 for uplink 26
13:08:50:setup_element:INFO:	Setting the data phase to 23 for uplink 27
13:08:50:setup_element:INFO:	Setting the data phase to 23 for uplink 28
13:08:50:setup_element:INFO:	Setting the data phase to 25 for uplink 29
13:08:50:setup_element:INFO:	Setting the data phase to 24 for uplink 30
13:08:50:setup_element:INFO:	Setting the data phase to 23 for uplink 31
13:08:50:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 30
    Window Length: 71
    Eye Windows:
      Uplink 24: ________________________________________________________________________________
      Uplink 25: ________________________________________________________________________________
      Uplink 26: __________________________________________________________________XXXXXXXX______
      Uplink 27: __________________________________________________________________XXXXXXXX______
      Uplink 28: _____________________________________________________________________XXXXXX_____
      Uplink 29: _____________________________________________________________________XXXXXX_____
      Uplink 30: _____________________________________________________________________XXXXXX_____
      Uplink 31: _____________________________________________________________________XXXXXX_____
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 22
      Window Length: 34
      Eye Window: XXXXXX__________________________________
    Uplink 25:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 26:
      Optimal Phase: 19
      Window Length: 35
      Eye Window: XX___________________________________XXX
    Uplink 27:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
    Uplink 28:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
    Uplink 29:
      Optimal Phase: 25
      Window Length: 35
      Eye Window: ___XXXXX________________________________
    Uplink 30:
      Optimal Phase: 24
      Window Length: 34
      Eye Window: __XXXXXX________________________________
    Uplink 31:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
]
13:08:50:setup_element:INFO:	Beginning SMX ASICs map scan
13:08:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:08:50:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
13:08:50:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
13:08:50:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
13:08:50:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:08:50:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 24
13:08:50:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 25
13:08:50:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 26
13:08:50:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 27
13:08:51:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 28
13:08:51:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 29
13:08:51:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 30
13:08:51:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 31
13:08:52:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 24), (1, 25)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 30), (1, 31)
  Clock Phase Characteristic:
    Optimal Phase: 30
    Window Length: 71
    Eye Windows:
      Uplink 24: ________________________________________________________________________________
      Uplink 25: ________________________________________________________________________________
      Uplink 26: __________________________________________________________________XXXXXXXX______
      Uplink 27: __________________________________________________________________XXXXXXXX______
      Uplink 28: _____________________________________________________________________XXXXXX_____
      Uplink 29: _____________________________________________________________________XXXXXX_____
      Uplink 30: _____________________________________________________________________XXXXXX_____
      Uplink 31: _____________________________________________________________________XXXXXX_____
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 22
      Window Length: 34
      Eye Window: XXXXXX__________________________________
    Uplink 25:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 26:
      Optimal Phase: 19
      Window Length: 35
      Eye Window: XX___________________________________XXX
    Uplink 27:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
    Uplink 28:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
    Uplink 29:
      Optimal Phase: 25
      Window Length: 35
      Eye Window: ___XXXXX________________________________
    Uplink 30:
      Optimal Phase: 24
      Window Length: 34
      Eye Window: __XXXXXX________________________________
    Uplink 31:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________

13:08:52:setup_element:INFO:	Performing Elink synchronization
13:08:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:08:52:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
13:08:52:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
13:08:52:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
13:08:52:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 3
13:08:52:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
13:08:53:ST3_emu:INFO:	Number of chips: 4
13:08:53:ST3_emu:INFO:	Chip address:  	0x1
13:08:53:ST3_emu:INFO:	Chip address:  	0x3
13:08:53:ST3_emu:INFO:	Chip address:  	0x5
13:08:53:ST3_emu:INFO:	Chip address:  	0x7
13:08:53:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
13:08:54:febtest:INFO:	0-1 | XA-000-08-002-000-006-213-03 |  18.7 | 1218.6
13:08:54:febtest:INFO:	0-3 | XA-000-08-002-000-006-216-03 |  31.4 | 1177.4
13:08:54:febtest:INFO:	0-5 | XA-000-08-002-000-006-215-03 |  28.2 | 1201.0
13:08:54:febtest:INFO:	0-7 | XA-000-08-002-000-006-218-03 |  21.9 | 1212.7
13:08:54:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
13:08:58:ST3_smx:INFO:	chip: 0-1 	 21.902970 C 	 1195.082160 mV
13:08:58:ST3_smx:INFO:	# loops 0
13:09:00:ST3_smx:INFO:	# loops 1
13:09:01:ST3_smx:INFO:	# loops 2
13:09:03:ST3_smx:INFO:	# loops 3
13:09:05:ST3_smx:INFO:	# loops 4
13:09:06:ST3_smx:INFO:	Total # of broken channels: 0
13:09:06:ST3_smx:INFO:	List of broken channels: []
13:09:06:ST3_smx:INFO:	Total # of broken channels: 1
13:09:06:ST3_smx:INFO:	List of broken channels: [49]
13:09:07:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
13:09:11:ST3_smx:INFO:	chip: 0-3 	 31.389742 C 	 1159.654860 mV
13:09:11:ST3_smx:INFO:	# loops 0
13:09:12:ST3_smx:INFO:	# loops 1
13:09:14:ST3_smx:INFO:	# loops 2
13:09:15:ST3_smx:INFO:	# loops 3
13:09:17:ST3_smx:INFO:	# loops 4
13:09:19:ST3_smx:INFO:	Total # of broken channels: 1
13:09:19:ST3_smx:INFO:	List of broken channels: [69]
13:09:19:ST3_smx:INFO:	Total # of broken channels: 1
13:09:19:ST3_smx:INFO:	List of broken channels: [69]
13:09:19:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
13:09:23:ST3_smx:INFO:	chip: 0-5 	 31.389742 C 	 1177.390875 mV
13:09:23:ST3_smx:INFO:	# loops 0
13:09:24:ST3_smx:INFO:	# loops 1
13:09:26:ST3_smx:INFO:	# loops 2
13:09:28:ST3_smx:INFO:	# loops 3
13:09:29:ST3_smx:INFO:	# loops 4
13:09:31:ST3_smx:INFO:	Total # of broken channels: 0
13:09:31:ST3_smx:INFO:	List of broken channels: []
13:09:31:ST3_smx:INFO:	Total # of broken channels: 0
13:09:31:ST3_smx:INFO:	List of broken channels: []
13:09:31:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
13:09:35:ST3_smx:INFO:	chip: 0-7 	 28.225000 C 	 1183.292940 mV
13:09:35:ST3_smx:INFO:	# loops 0
13:09:36:ST3_smx:INFO:	# loops 1
13:09:38:ST3_smx:INFO:	# loops 2
13:09:40:ST3_smx:INFO:	# loops 3
13:09:41:ST3_smx:INFO:	# loops 4
13:09:43:ST3_smx:INFO:	Total # of broken channels: 0
13:09:43:ST3_smx:INFO:	List of broken channels: []
13:09:43:ST3_smx:INFO:	Total # of broken channels: 0
13:09:43:ST3_smx:INFO:	List of broken channels: []
13:09:44:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
13:09:44:febtest:INFO:	0-1 | XA-000-08-002-000-006-213-03 |  21.9 | 1189.2
13:09:44:febtest:INFO:	0-3 | XA-000-08-002-000-006-216-03 |  34.6 | 1159.7
13:09:44:febtest:INFO:	0-5 | XA-000-08-002-000-006-215-03 |  31.4 | 1177.4
13:09:44:febtest:INFO:	0-7 | XA-000-08-002-000-006-218-03 |  28.2 | 1183.3
13:09:54:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_1010/A//TestDate_2023_08_16-13_08_42/