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FEB_1012 30.11.23 17:40:11
TextEdit.txt
17:39:43:ST3_hmp4040:INFO: HAMEG,HMP2030,017836163,HW50010002/SW2.30
17:39:43:febtest:INFO: FEB 8-2 selected
17:39:43:smx_tester:INFO: Setting Elink clock mode to 160 MHz
17:39:48:febtest:INFO: FEB 8-2 selected
17:39:48:smx_tester:INFO: Setting Elink clock mode to 160 MHz
17:39:52:ST3_Shared:INFO: Listo of operators:Irakli K.;
17:40:11:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
17:40:11:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
17:40:11:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
17:40:11:febtest:INFO: Testing FEB with SN 1012
17:40:12:smx_tester:INFO: Scanning setup
17:40:12:elinks:INFO: Disabling clock on downlink 0
17:40:12:elinks:INFO: Disabling clock on downlink 1
17:40:12:elinks:INFO: Disabling clock on downlink 2
17:40:12:elinks:INFO: Disabling clock on downlink 3
17:40:12:elinks:INFO: Disabling clock on downlink 4
17:40:12:setup_element:INFO: Checking SOS, encoding_mode: SOS
17:40:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
17:40:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
17:40:12:elinks:INFO: Disabling clock on downlink 0
17:40:12:elinks:INFO: Disabling clock on downlink 1
17:40:12:elinks:INFO: Disabling clock on downlink 2
17:40:12:elinks:INFO: Disabling clock on downlink 3
17:40:12:elinks:INFO: Disabling clock on downlink 4
17:40:12:setup_element:INFO: Checking SOS, encoding_mode: SOS
17:40:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
17:40:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
17:40:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
17:40:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
17:40:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
17:40:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
17:40:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
17:40:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
17:40:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
17:40:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
17:40:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
17:40:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
17:40:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
17:40:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
17:40:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
17:40:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
17:40:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
17:40:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
17:40:13:elinks:INFO: Disabling clock on downlink 0
17:40:13:elinks:INFO: Disabling clock on downlink 1
17:40:13:elinks:INFO: Disabling clock on downlink 2
17:40:13:elinks:INFO: Disabling clock on downlink 3
17:40:13:elinks:INFO: Disabling clock on downlink 4
17:40:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
17:40:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
17:40:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
17:40:13:elinks:INFO: Disabling clock on downlink 0
17:40:13:elinks:INFO: Disabling clock on downlink 1
17:40:13:elinks:INFO: Disabling clock on downlink 2
17:40:13:elinks:INFO: Disabling clock on downlink 3
17:40:13:elinks:INFO: Disabling clock on downlink 4
17:40:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
17:40:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
17:40:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
17:40:13:elinks:INFO: Disabling clock on downlink 0
17:40:13:elinks:INFO: Disabling clock on downlink 1
17:40:13:elinks:INFO: Disabling clock on downlink 2
17:40:13:elinks:INFO: Disabling clock on downlink 3
17:40:13:elinks:INFO: Disabling clock on downlink 4
17:40:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
17:40:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
17:40:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
17:40:13:setup_element:INFO: Scanning clock phase
17:40:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
17:40:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
17:40:13:setup_element:INFO: Clock phase scan results for group 0, downlink 1
17:40:13:setup_element:INFO: Eye window for uplink 0 : __________________________________________________________________________XXXXXX
Clock Delay: 36
17:40:13:setup_element:INFO: Eye window for uplink 1 : __________________________________________________________________________XXXXXX
Clock Delay: 36
17:40:13:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
17:40:13:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
17:40:13:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________________
Clock Delay: 40
17:40:13:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________________
Clock Delay: 40
17:40:13:setup_element:INFO: Eye window for uplink 6 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
17:40:13:setup_element:INFO: Eye window for uplink 7 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
17:40:13:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
17:40:13:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
17:40:13:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
17:40:13:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
17:40:13:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
17:40:13:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
17:40:13:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXXXXX
Clock Delay: 36
17:40:13:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXXXXX
Clock Delay: 36
17:40:14:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
17:40:14:setup_element:INFO: Scanning data phases
17:40:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
17:40:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
17:40:19:setup_element:INFO: Data phase scan results for group 0, downlink 1
17:40:19:setup_element:INFO: Eye window for uplink 0 : ___________XXXXX________________________
Data delay found: 33
17:40:19:setup_element:INFO: Eye window for uplink 1 : ________XXXXX___________________________
Data delay found: 30
17:40:19:setup_element:INFO: Eye window for uplink 2 : _____XXXXX______________________________
Data delay found: 27
17:40:19:setup_element:INFO: Eye window for uplink 3 : ___XXXXX________________________________
Data delay found: 25
17:40:19:setup_element:INFO: Eye window for uplink 4 : _____XXXXX______________________________
Data delay found: 27
17:40:19:setup_element:INFO: Eye window for uplink 5 : _XXXXX__________________________________
Data delay found: 23
17:40:19:setup_element:INFO: Eye window for uplink 6 : XX___________________________________XXX
Data delay found: 19
17:40:19:setup_element:INFO: Eye window for uplink 7 : _________________________________XXXXX__
Data delay found: 15
17:40:19:setup_element:INFO: Eye window for uplink 8 : __________________________XXXXX_________
Data delay found: 8
17:40:19:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXX_____
Data delay found: 12
17:40:19:setup_element:INFO: Eye window for uplink 10: ____________________________XXXXX_______
Data delay found: 10
17:40:19:setup_element:INFO: Eye window for uplink 11: ________________________________XXXXX___
Data delay found: 14
17:40:19:setup_element:INFO: Eye window for uplink 12: __________________________XXXXX_________
Data delay found: 8
17:40:19:setup_element:INFO: Eye window for uplink 13: _____________________________XXXXX______
Data delay found: 11
17:40:19:setup_element:INFO: Eye window for uplink 14: ___________________________XXXXX________
Data delay found: 9
17:40:19:setup_element:INFO: Eye window for uplink 15: _______________________________XXXXX____
Data delay found: 13
17:40:19:setup_element:INFO: Setting the data phase to 33 for uplink 0
17:40:19:setup_element:INFO: Setting the data phase to 30 for uplink 1
17:40:19:setup_element:INFO: Setting the data phase to 27 for uplink 2
17:40:19:setup_element:INFO: Setting the data phase to 25 for uplink 3
17:40:19:setup_element:INFO: Setting the data phase to 27 for uplink 4
17:40:19:setup_element:INFO: Setting the data phase to 23 for uplink 5
17:40:19:setup_element:INFO: Setting the data phase to 19 for uplink 6
17:40:19:setup_element:INFO: Setting the data phase to 15 for uplink 7
17:40:19:setup_element:INFO: Setting the data phase to 8 for uplink 8
17:40:19:setup_element:INFO: Setting the data phase to 12 for uplink 9
17:40:19:setup_element:INFO: Setting the data phase to 10 for uplink 10
17:40:19:setup_element:INFO: Setting the data phase to 14 for uplink 11
17:40:19:setup_element:INFO: Setting the data phase to 8 for uplink 12
17:40:19:setup_element:INFO: Setting the data phase to 11 for uplink 13
17:40:19:setup_element:INFO: Setting the data phase to 9 for uplink 14
17:40:19:setup_element:INFO: Setting the data phase to 13 for uplink 15
17:40:19:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 71
Eye Windows:
Uplink 0: __________________________________________________________________________XXXXXX
Uplink 1: __________________________________________________________________________XXXXXX
Uplink 2: ________________________________________________________________________XXXXXXXX
Uplink 3: ________________________________________________________________________XXXXXXXX
Uplink 4: ________________________________________________________________________________
Uplink 5: ________________________________________________________________________________
Uplink 6: _________________________________________________________________________XXXXXXX
Uplink 7: _________________________________________________________________________XXXXXXX
Uplink 8: _______________________________________________________________________XXXXXXXX_
Uplink 9: _______________________________________________________________________XXXXXXXX_
Uplink 10: ________________________________________________________________________XXXXXXXX
Uplink 11: ________________________________________________________________________XXXXXXXX
Uplink 12: _______________________________________________________________________XXXXXXXX_
Uplink 13: _______________________________________________________________________XXXXXXXX_
Uplink 14: _________________________________________________________________________XXXXXXX
Uplink 15: _________________________________________________________________________XXXXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 1:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 2:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 3:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 4:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 5:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 6:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 7:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 8:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 9:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 10:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 11:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 12:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 13:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 14:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 15:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
]
17:40:19:setup_element:INFO: Beginning SMX ASICs map scan
17:40:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
17:40:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
17:40:19:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
17:40:19:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
17:40:19:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
17:40:19:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
17:40:19:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
17:40:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
17:40:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
17:40:20:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
17:40:20:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
17:40:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
17:40:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
17:40:20:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
17:40:20:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
17:40:20:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
17:40:20:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
17:40:20:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
17:40:21:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
17:40:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
17:40:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
17:40:22:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 71
Eye Windows:
Uplink 0: __________________________________________________________________________XXXXXX
Uplink 1: __________________________________________________________________________XXXXXX
Uplink 2: ________________________________________________________________________XXXXXXXX
Uplink 3: ________________________________________________________________________XXXXXXXX
Uplink 4: ________________________________________________________________________________
Uplink 5: ________________________________________________________________________________
Uplink 6: _________________________________________________________________________XXXXXXX
Uplink 7: _________________________________________________________________________XXXXXXX
Uplink 8: _______________________________________________________________________XXXXXXXX_
Uplink 9: _______________________________________________________________________XXXXXXXX_
Uplink 10: ________________________________________________________________________XXXXXXXX
Uplink 11: ________________________________________________________________________XXXXXXXX
Uplink 12: _______________________________________________________________________XXXXXXXX_
Uplink 13: _______________________________________________________________________XXXXXXXX_
Uplink 14: _________________________________________________________________________XXXXXXX
Uplink 15: _________________________________________________________________________XXXXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 1:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 2:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 3:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 4:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 5:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 6:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 7:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 8:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 9:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 10:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 11:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 12:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 13:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 14:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 15:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
17:40:22:setup_element:INFO: Performing Elink synchronization
17:40:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
17:40:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
17:40:22:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
17:40:22:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
17:40:22:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
17:40:22:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
17:40:22:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
17:40:23:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
17:40:24:febtest:INFO: 1-0 | XA-000-08-002-001-006-160-07 | 31.4 | 1195.1
17:40:24:febtest:INFO: 8-1 | XA-000-08-002-001-006-165-07 | 34.6 | 1206.9
17:40:24:febtest:INFO: 3-2 | XA-000-08-002-001-006-175-07 | 18.7 | 1247.9
17:40:24:febtest:INFO: 10-3 | XA-000-08-002-001-006-179-00 | 37.7 | 1195.1
17:40:25:febtest:INFO: 5-4 | XA-000-08-002-001-006-178-00 | 34.6 | 1189.2
17:40:25:febtest:INFO: 12-5 | XA-000-08-002-001-006-174-07 | 9.3 | 1300.3
17:40:25:febtest:INFO: 7-6 | XA-000-08-002-001-006-167-07 | 28.2 | 1212.7
17:40:25:febtest:INFO: 14-7 | XA-000-08-002-001-006-162-07 | 31.4 | 1218.6
17:40:25:ST3_smx:INFO: Configuring SMX FAST
17:40:27:ST3_smx:INFO: chip: 8-1 37.726682 C 1189.190035 mV
17:40:27:ST3_smx:INFO: Electrons
17:40:27:ST3_smx:INFO: # loops 0
17:40:29:ST3_smx:INFO: # loops 1
17:40:31:ST3_smx:INFO: # loops 2
17:40:32:ST3_smx:INFO: # loops 3
17:40:34:ST3_smx:INFO: # loops 4
17:40:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:40:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:40:35:ST3_smx:INFO: Total # of broken channels: 128
17:40:35:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
17:40:35:ST3_smx:INFO: Total # of broken channels: 128
17:40:35:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
17:40:36:ST3_smx:INFO: Configuring SMX FAST
17:40:38:ST3_smx:INFO: chip: 10-3 40.898880 C 1183.292940 mV
17:40:38:ST3_smx:INFO: Electrons
17:40:38:ST3_smx:INFO: # loops 0
17:40:40:ST3_smx:INFO: # loops 1
17:40:41:ST3_smx:INFO: # loops 2
17:40:43:ST3_smx:INFO: # loops 3
17:40:44:ST3_smx:INFO: # loops 4
17:40:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:40:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:40:46:ST3_smx:INFO: Total # of broken channels: 128
17:40:46:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
17:40:46:ST3_smx:INFO: Total # of broken channels: 128
17:40:46:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
17:40:47:ST3_smx:INFO: Configuring SMX FAST
17:40:49:ST3_smx:INFO: chip: 12-5 25.062742 C 1253.730060 mV
17:40:49:ST3_smx:INFO: Electrons
17:40:49:ST3_smx:INFO: # loops 0
17:40:50:ST3_smx:INFO: # loops 1
17:40:52:ST3_smx:INFO: # loops 2
17:40:53:ST3_smx:INFO: # loops 3
17:40:55:ST3_smx:INFO: # loops 4
17:40:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:40:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:40:56:ST3_smx:INFO: Total # of broken channels: 128
17:40:57:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
17:40:57:ST3_smx:INFO: Total # of broken channels: 128
17:40:57:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
17:40:57:ST3_smx:INFO: Configuring SMX FAST
17:40:59:ST3_smx:INFO: chip: 14-7 28.225000 C 1236.187875 mV
17:40:59:ST3_smx:INFO: Electrons
17:40:59:ST3_smx:INFO: # loops 0
17:41:01:ST3_smx:INFO: # loops 1
17:41:02:ST3_smx:INFO: # loops 2
17:41:04:ST3_smx:INFO: # loops 3
17:41:05:ST3_smx:INFO: # loops 4
17:41:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:41:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:41:07:ST3_smx:INFO: Total # of broken channels: 128
17:41:07:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
17:41:07:ST3_smx:INFO: Total # of broken channels: 128
17:41:07:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
17:41:07:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
17:41:08:febtest:INFO: 1-0 | XA-000-08-002-001-006-160-07 | 34.6 | 1195.1
17:41:08:febtest:INFO: 8-1 | XA-000-08-002-001-006-165-07 | 40.9 | 1189.2
17:41:08:febtest:INFO: 3-2 | XA-000-08-002-001-006-175-07 | 25.1 | 1247.9
17:41:08:febtest:INFO: 10-3 | XA-000-08-002-001-006-179-00 | 44.1 | 1189.2
17:41:09:febtest:INFO: 5-4 | XA-000-08-002-001-006-178-00 | 37.7 | 1189.2
17:41:09:febtest:INFO: 12-5 | XA-000-08-002-001-006-174-07 | 25.1 | 1253.7
17:41:09:febtest:INFO: 7-6 | XA-000-08-002-001-006-167-07 | 31.4 | 1212.7
17:41:09:febtest:INFO: 14-7 | XA-000-08-002-001-006-162-07 | 31.4 | 1230.3
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2023_11_30-17_40_11
OPERATOR : Irakli K.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 1012
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.447', '1.8110', '1.846', '2.3040', '7.000', '1.5520', '7.000', '1.5520']
VI_after__Init : ['0', '0', '0', '0', '0', '0']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
17:44:24:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1012/TestDate_2023_11_30-17_40_11/
17:44:24:ST3_Shared:WARNING: report/cDist_0.png
17:44:24:ST3_Shared:WARNING: report/cDist_0.root
17:44:24:ST3_Shared:WARNING: report/cDist_2.png
17:44:24:ST3_Shared:WARNING: report/cDist_2.root
17:44:24:ST3_Shared:WARNING: report/cDist_4.png
17:44:24:ST3_Shared:WARNING: report/cDist_4.root
17:44:24:ST3_Shared:WARNING: report/cDist_6.png
17:44:24:ST3_Shared:WARNING: report/cDist_6.root