
FEB_1012 29.02.24 11:55:52
TextEdit.txt
11:55:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:55:52:ST3_Shared:INFO: FEB-Microcable 11:55:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:55:53:febtest:INFO: Testing FEB with SN 1012 11:55:55:smx_tester:INFO: Scanning setup 11:55:55:elinks:INFO: Disabling clock on downlink 0 11:55:55:elinks:INFO: Disabling clock on downlink 1 11:55:55:elinks:INFO: Disabling clock on downlink 2 11:55:55:elinks:INFO: Disabling clock on downlink 3 11:55:55:elinks:INFO: Disabling clock on downlink 4 11:55:55:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:55:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 11:55:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:55:55:elinks:INFO: Disabling clock on downlink 0 11:55:55:elinks:INFO: Disabling clock on downlink 1 11:55:55:elinks:INFO: Disabling clock on downlink 2 11:55:55:elinks:INFO: Disabling clock on downlink 3 11:55:55:elinks:INFO: Disabling clock on downlink 4 11:55:55:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:55:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:55:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 11:55:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 11:55:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 11:55:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 11:55:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 11:55:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 11:55:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 11:55:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 11:55:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 11:55:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 11:55:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 11:55:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 11:55:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 11:55:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 11:55:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 11:55:56:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 11:55:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:55:56:elinks:INFO: Disabling clock on downlink 0 11:55:56:elinks:INFO: Disabling clock on downlink 1 11:55:56:elinks:INFO: Disabling clock on downlink 2 11:55:56:elinks:INFO: Disabling clock on downlink 3 11:55:56:elinks:INFO: Disabling clock on downlink 4 11:55:56:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:55:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:55:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:55:56:elinks:INFO: Disabling clock on downlink 0 11:55:56:elinks:INFO: Disabling clock on downlink 1 11:55:56:elinks:INFO: Disabling clock on downlink 2 11:55:56:elinks:INFO: Disabling clock on downlink 3 11:55:56:elinks:INFO: Disabling clock on downlink 4 11:55:56:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:55:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 11:55:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:55:56:elinks:INFO: Disabling clock on downlink 0 11:55:56:elinks:INFO: Disabling clock on downlink 1 11:55:56:elinks:INFO: Disabling clock on downlink 2 11:55:56:elinks:INFO: Disabling clock on downlink 3 11:55:56:elinks:INFO: Disabling clock on downlink 4 11:55:56:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:55:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 11:55:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:55:56:setup_element:INFO: Scanning clock phase 11:55:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:55:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:55:56:setup_element:INFO: Clock phase scan results for group 0, downlink 1 11:55:56:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXX_ Clock Delay: 35 11:55:56:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXX_ Clock Delay: 35 11:55:56:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 11:55:56:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 11:55:56:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 11:55:56:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 11:55:56:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 11:55:56:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 11:55:56:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 11:55:56:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 11:55:56:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 11:55:56:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 11:55:56:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 11:55:56:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 11:55:56:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 11:55:56:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 11:55:56:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1 11:55:56:setup_element:INFO: Scanning data phases 11:55:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:55:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:56:02:setup_element:INFO: Data phase scan results for group 0, downlink 1 11:56:02:setup_element:INFO: Eye window for uplink 0 : _____________XXXXX______________________ Data delay found: 35 11:56:02:setup_element:INFO: Eye window for uplink 1 : _________XXXXX__________________________ Data delay found: 31 11:56:02:setup_element:INFO: Eye window for uplink 2 : _______XXXXX____________________________ Data delay found: 29 11:56:02:setup_element:INFO: Eye window for uplink 3 : _____XXXXX______________________________ Data delay found: 27 11:56:02:setup_element:INFO: Eye window for uplink 4 : _______XXXXX____________________________ Data delay found: 29 11:56:02:setup_element:INFO: Eye window for uplink 5 : ___XXXXX________________________________ Data delay found: 25 11:56:02:setup_element:INFO: Eye window for uplink 6 : XXXX___________________________________X Data delay found: 21 11:56:02:setup_element:INFO: Eye window for uplink 7 : X_________________________________XXXXXX Data delay found: 17 11:56:02:setup_element:INFO: Eye window for uplink 8 : ___________________________XXXX_________ Data delay found: 8 11:56:02:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXXX____ Data delay found: 13 11:56:02:setup_element:INFO: Eye window for uplink 10: _____________________________XXXXX______ Data delay found: 11 11:56:02:setup_element:INFO: Eye window for uplink 11: _________________________________XXXXXX_ Data delay found: 15 11:56:02:setup_element:INFO: Eye window for uplink 12: ___________________________XXXXX________ Data delay found: 9 11:56:02:setup_element:INFO: Eye window for uplink 13: ______________________________XXXXX_____ Data delay found: 12 11:56:02:setup_element:INFO: Eye window for uplink 14: ______________________________XXXX______ Data delay found: 11 11:56:02:setup_element:INFO: Eye window for uplink 15: _______________________________XXXXX____ Data delay found: 13 11:56:02:setup_element:INFO: Setting the data phase to 35 for uplink 0 11:56:02:setup_element:INFO: Setting the data phase to 31 for uplink 1 11:56:02:setup_element:INFO: Setting the data phase to 29 for uplink 2 11:56:02:setup_element:INFO: Setting the data phase to 27 for uplink 3 11:56:02:setup_element:INFO: Setting the data phase to 29 for uplink 4 11:56:02:setup_element:INFO: Setting the data phase to 25 for uplink 5 11:56:02:setup_element:INFO: Setting the data phase to 21 for uplink 6 11:56:02:setup_element:INFO: Setting the data phase to 17 for uplink 7 11:56:02:setup_element:INFO: Setting the data phase to 8 for uplink 8 11:56:02:setup_element:INFO: Setting the data phase to 13 for uplink 9 11:56:02:setup_element:INFO: Setting the data phase to 11 for uplink 10 11:56:02:setup_element:INFO: Setting the data phase to 15 for uplink 11 11:56:02:setup_element:INFO: Setting the data phase to 9 for uplink 12 11:56:02:setup_element:INFO: Setting the data phase to 12 for uplink 13 11:56:02:setup_element:INFO: Setting the data phase to 11 for uplink 14 11:56:02:setup_element:INFO: Setting the data phase to 13 for uplink 15 11:56:02:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 33 Window Length: 70 Eye Windows: Uplink 0: ________________________________________________________________________XXXXXXX_ Uplink 1: ________________________________________________________________________XXXXXXX_ Uplink 2: _______________________________________________________________________XXXXXXX__ Uplink 3: _______________________________________________________________________XXXXXXX__ Uplink 4: _______________________________________________________________________XXXXXXXX_ Uplink 5: _______________________________________________________________________XXXXXXXX_ Uplink 6: ________________________________________________________________________XXXXXX__ Uplink 7: ________________________________________________________________________XXXXXX__ Uplink 8: ______________________________________________________________________XXXXXXXX__ Uplink 9: ______________________________________________________________________XXXXXXXX__ Uplink 10: _______________________________________________________________________XXXXXXX__ Uplink 11: _______________________________________________________________________XXXXXXX__ Uplink 12: _____________________________________________________________________XXXXXXXXX__ Uplink 13: _____________________________________________________________________XXXXXXXXX__ Uplink 14: _______________________________________________________________________XXXXXXX__ Uplink 15: _______________________________________________________________________XXXXXXX__ Data phase characteristics: Uplink 0: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 1: Optimal Phase: 31 Window Length: 35 Eye Window: _________XXXXX__________________________ Uplink 2: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 3: Optimal Phase: 27 Window Length: 35 Eye Window: _____XXXXX______________________________ Uplink 4: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 5: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 6: Optimal Phase: 21 Window Length: 35 Eye Window: XXXX___________________________________X Uplink 7: Optimal Phase: 17 Window Length: 33 Eye Window: X_________________________________XXXXXX Uplink 8: Optimal Phase: 8 Window Length: 36 Eye Window: ___________________________XXXX_________ Uplink 9: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 10: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 11: Optimal Phase: 15 Window Length: 34 Eye Window: _________________________________XXXXXX_ Uplink 12: Optimal Phase: 9 Window Length: 35 Eye Window: ___________________________XXXXX________ Uplink 13: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 14: Optimal Phase: 11 Window Length: 36 Eye Window: ______________________________XXXX______ Uplink 15: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ ] 11:56:02:setup_element:INFO: Beginning SMX ASICs map scan 11:56:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:56:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:56:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 11:56:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 11:56:02:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 11:56:02:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 11:56:02:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 11:56:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 11:56:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 11:56:02:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 11:56:02:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 11:56:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 11:56:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 11:56:03:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 11:56:03:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 11:56:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 11:56:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 11:56:03:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 11:56:03:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 11:56:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 11:56:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 11:56:05:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0) ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9) ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2) ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4) ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13) ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6) ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15) Clock Phase Characteristic: Optimal Phase: 33 Window Length: 70 Eye Windows: Uplink 0: ________________________________________________________________________XXXXXXX_ Uplink 1: ________________________________________________________________________XXXXXXX_ Uplink 2: _______________________________________________________________________XXXXXXX__ Uplink 3: _______________________________________________________________________XXXXXXX__ Uplink 4: _______________________________________________________________________XXXXXXXX_ Uplink 5: _______________________________________________________________________XXXXXXXX_ Uplink 6: ________________________________________________________________________XXXXXX__ Uplink 7: ________________________________________________________________________XXXXXX__ Uplink 8: ______________________________________________________________________XXXXXXXX__ Uplink 9: ______________________________________________________________________XXXXXXXX__ Uplink 10: _______________________________________________________________________XXXXXXX__ Uplink 11: _______________________________________________________________________XXXXXXX__ Uplink 12: _____________________________________________________________________XXXXXXXXX__ Uplink 13: _____________________________________________________________________XXXXXXXXX__ Uplink 14: _______________________________________________________________________XXXXXXX__ Uplink 15: _______________________________________________________________________XXXXXXX__ Data phase characteristics: Uplink 0: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 1: Optimal Phase: 31 Window Length: 35 Eye Window: _________XXXXX__________________________ Uplink 2: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 3: Optimal Phase: 27 Window Length: 35 Eye Window: _____XXXXX______________________________ Uplink 4: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 5: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 6: Optimal Phase: 21 Window Length: 35 Eye Window: XXXX___________________________________X Uplink 7: Optimal Phase: 17 Window Length: 33 Eye Window: X_________________________________XXXXXX Uplink 8: Optimal Phase: 8 Window Length: 36 Eye Window: ___________________________XXXX_________ Uplink 9: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 10: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 11: Optimal Phase: 15 Window Length: 34 Eye Window: _________________________________XXXXXX_ Uplink 12: Optimal Phase: 9 Window Length: 35 Eye Window: ___________________________XXXXX________ Uplink 13: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 14: Optimal Phase: 11 Window Length: 36 Eye Window: ______________________________XXXX______ Uplink 15: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ 11:56:05:setup_element:INFO: Performing Elink synchronization 11:56:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:56:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:56:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 11:56:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 11:56:05:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 11:56:05:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 11:56:05:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)] FEB type: A FEB_A: 1 FEB_B: 0 11:56:06:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 11:56:07:febtest:INFO: 01-00 | XA-000-08-002-001-006-160-07 | 31.4 | 1195.1 11:56:07:febtest:INFO: 08-01 | XA-000-08-002-001-006-165-07 | 31.4 | 1212.7 11:56:07:febtest:INFO: 03-02 | XA-000-08-002-001-006-175-07 | 21.9 | 1242.0 11:56:07:febtest:INFO: 10-03 | XA-000-08-002-001-006-179-00 | 37.7 | 1195.1 11:56:07:febtest:INFO: 05-04 | XA-000-08-002-001-006-178-00 | 34.6 | 1189.2 11:56:08:febtest:INFO: 12-05 | XA-000-08-002-001-006-174-07 | 6.1 | 1300.3 11:56:08:febtest:INFO: 07-06 | XA-000-08-002-001-006-167-07 | 31.4 | 1212.7 11:56:08:febtest:INFO: 14-07 | XA-000-08-002-001-006-162-07 | 28.2 | 1218.6 11:56:08:ST3_smx:INFO: Configuring SMX FAST 11:56:10:ST3_smx:INFO: chip: 8-1 37.726682 C 1189.190035 mV 11:56:10:ST3_smx:INFO: Electrons 11:56:10:ST3_smx:INFO: # loops 0 11:56:12:ST3_smx:INFO: # loops 1 11:56:14:ST3_smx:INFO: # loops 2 11:56:15:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:56:15:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:56:15:ST3_smx:INFO: Total # of broken channels: 128 11:56:15:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127] 11:56:15:ST3_smx:INFO: Total # of broken channels: 128 11:56:15:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127] 11:56:16:ST3_smx:INFO: Configuring SMX FAST 11:56:19:ST3_smx:INFO: chip: 10-3 37.726682 C 1189.190035 mV 11:56:19:ST3_smx:INFO: Electrons 11:56:19:ST3_smx:INFO: # loops 0 11:56:20:ST3_smx:INFO: # loops 1 11:56:22:ST3_smx:INFO: # loops 2 11:56:24:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:56:24:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:56:24:ST3_smx:INFO: Total # of broken channels: 128 11:56:24:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127] 11:56:24:ST3_smx:INFO: Total # of broken channels: 128 11:56:24:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127] 11:56:24:ST3_smx:INFO: Configuring SMX FAST 11:56:27:ST3_smx:INFO: chip: 12-5 21.902970 C 1253.730060 mV 11:56:27:ST3_smx:INFO: Electrons 11:56:27:ST3_smx:INFO: # loops 0 11:56:28:ST3_smx:INFO: # loops 1 11:56:30:ST3_smx:INFO: # loops 2 11:56:32:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:56:32:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:56:32:ST3_smx:INFO: Total # of broken channels: 128 11:56:32:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127] 11:56:32:ST3_smx:INFO: Total # of broken channels: 128 11:56:32:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127] 11:56:33:ST3_smx:INFO: Configuring SMX FAST 11:56:35:ST3_smx:INFO: chip: 14-7 28.225000 C 1236.187875 mV 11:56:35:ST3_smx:INFO: Electrons 11:56:35:ST3_smx:INFO: # loops 0 11:56:36:ST3_smx:INFO: # loops 1 11:56:38:ST3_smx:INFO: # loops 2 11:56:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:56:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:56:40:ST3_smx:INFO: Total # of broken channels: 128 11:56:40:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127] 11:56:40:ST3_smx:INFO: Total # of broken channels: 128 11:56:40:ST3_smx:INFO: List of broken channels: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127] 11:56:41:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 11:56:41:febtest:INFO: 01-00 | XA-000-08-002-001-006-160-07 | 31.4 | 1195.1 11:56:41:febtest:INFO: 08-01 | XA-000-08-002-001-006-165-07 | 37.7 | 1189.2 11:56:41:febtest:INFO: 03-02 | XA-000-08-002-001-006-175-07 | 21.9 | 1242.0 11:56:41:febtest:INFO: 10-03 | XA-000-08-002-001-006-179-00 | 37.7 | 1189.2 11:56:42:febtest:INFO: 05-04 | XA-000-08-002-001-006-178-00 | 34.6 | 1189.2 11:56:42:febtest:INFO: 12-05 | XA-000-08-002-001-006-174-07 | 21.9 | 1259.6 11:56:42:febtest:INFO: 07-06 | XA-000-08-002-001-006-167-07 | 31.4 | 1212.7 11:56:42:febtest:INFO: 14-07 | XA-000-08-002-001-006-162-07 | 28.2 | 1236.2 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_02_29-11_55_52 OPERATOR : Alois Alzheimer SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : FEB_SN : 1012 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- --------------------------------------- VI_before_Init : ['2.451', '1.3900', '1.850', '2.2720', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '1.8610', '1.850', '0.6244', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '1.8570', '1.850', '0.4242', '0.000', '0.0000', '0.000', '0.0000'] 11:57:54:ST3_Shared:INFO: Listo of operators:Irakli K.; 11:57:59:ST3_Shared:WARNING: report/cDist_0.png 11:57:59:ST3_Shared:WARNING: report/cDist_0.root 11:57:59:ST3_Shared:WARNING: report/cDist_2.png 11:57:59:ST3_Shared:WARNING: report/cDist_2.root 11:57:59:ST3_Shared:WARNING: report/cDist_4.png 11:57:59:ST3_Shared:WARNING: report/cDist_4.root 11:57:59:ST3_Shared:WARNING: report/cDist_6.png 11:57:59:ST3_Shared:WARNING: report/cDist_6.root