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FEB_1012 13.03.24 14:56:20
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14:56:20:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:56:20:ST3_Shared:INFO: FEB-ASIC
14:56:20:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:56:21:febtest:INFO: Testing FEB with SN 1012
14:56:24:smx_tester:INFO: Scanning setup
14:56:24:elinks:INFO: Disabling clock on downlink 0
14:56:24:elinks:INFO: Disabling clock on downlink 1
14:56:24:elinks:INFO: Disabling clock on downlink 2
14:56:24:elinks:INFO: Disabling clock on downlink 3
14:56:24:elinks:INFO: Disabling clock on downlink 4
14:56:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:56:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:56:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:56:24:elinks:INFO: Disabling clock on downlink 0
14:56:24:elinks:INFO: Disabling clock on downlink 1
14:56:24:elinks:INFO: Disabling clock on downlink 2
14:56:24:elinks:INFO: Disabling clock on downlink 3
14:56:24:elinks:INFO: Disabling clock on downlink 4
14:56:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:56:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:56:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
14:56:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
14:56:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
14:56:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
14:56:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
14:56:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
14:56:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
14:56:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
14:56:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:56:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:56:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:56:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:56:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:56:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:56:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:56:24:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:56:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:56:24:elinks:INFO: Disabling clock on downlink 0
14:56:24:elinks:INFO: Disabling clock on downlink 1
14:56:24:elinks:INFO: Disabling clock on downlink 2
14:56:24:elinks:INFO: Disabling clock on downlink 3
14:56:24:elinks:INFO: Disabling clock on downlink 4
14:56:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:56:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:56:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:56:24:elinks:INFO: Disabling clock on downlink 0
14:56:24:elinks:INFO: Disabling clock on downlink 1
14:56:24:elinks:INFO: Disabling clock on downlink 2
14:56:24:elinks:INFO: Disabling clock on downlink 3
14:56:24:elinks:INFO: Disabling clock on downlink 4
14:56:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:56:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:56:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:56:24:elinks:INFO: Disabling clock on downlink 0
14:56:24:elinks:INFO: Disabling clock on downlink 1
14:56:24:elinks:INFO: Disabling clock on downlink 2
14:56:24:elinks:INFO: Disabling clock on downlink 3
14:56:24:elinks:INFO: Disabling clock on downlink 4
14:56:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:56:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:56:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:56:25:setup_element:INFO: Scanning clock phase
14:56:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:56:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:56:25:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:56:25:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
14:56:25:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
14:56:25:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:56:25:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:56:25:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:56:25:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:56:25:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:56:25:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:56:25:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:56:25:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:56:25:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:56:25:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:56:25:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:56:25:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:56:25:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:56:25:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:56:25:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
14:56:25:setup_element:INFO: Scanning data phases
14:56:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:56:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:56:31:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:56:31:setup_element:INFO: Eye window for uplink 0 : _____________XXXXXX_____________________
Data delay found: 35
14:56:31:setup_element:INFO: Eye window for uplink 1 : _________XXXXX__________________________
Data delay found: 31
14:56:31:setup_element:INFO: Eye window for uplink 2 : _______XXXXX____________________________
Data delay found: 29
14:56:31:setup_element:INFO: Eye window for uplink 3 : _____XXXXX______________________________
Data delay found: 27
14:56:31:setup_element:INFO: Eye window for uplink 4 : _______XXXXX____________________________
Data delay found: 29
14:56:31:setup_element:INFO: Eye window for uplink 5 : ____XXXX________________________________
Data delay found: 25
14:56:31:setup_element:INFO: Eye window for uplink 6 : XXXX___________________________________X
Data delay found: 21
14:56:31:setup_element:INFO: Eye window for uplink 7 : X__________________________________XXXXX
Data delay found: 17
14:56:31:setup_element:INFO: Eye window for uplink 8 : ___________________________XXXX_________
Data delay found: 8
14:56:31:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXXXX___
Data delay found: 13
14:56:31:setup_element:INFO: Eye window for uplink 10: _____________________________XXXXX______
Data delay found: 11
14:56:31:setup_element:INFO: Eye window for uplink 11: _________________________________XXXXX__
Data delay found: 15
14:56:31:setup_element:INFO: Eye window for uplink 12: ___________________________XXXXX________
Data delay found: 9
14:56:31:setup_element:INFO: Eye window for uplink 13: ______________________________XXXXX_____
Data delay found: 12
14:56:31:setup_element:INFO: Eye window for uplink 14: _____________________________XXXXX______
Data delay found: 11
14:56:31:setup_element:INFO: Eye window for uplink 15: ________________________________XXXX____
Data delay found: 13
14:56:31:setup_element:INFO: Setting the data phase to 35 for uplink 0
14:56:31:setup_element:INFO: Setting the data phase to 31 for uplink 1
14:56:31:setup_element:INFO: Setting the data phase to 29 for uplink 2
14:56:31:setup_element:INFO: Setting the data phase to 27 for uplink 3
14:56:31:setup_element:INFO: Setting the data phase to 29 for uplink 4
14:56:31:setup_element:INFO: Setting the data phase to 25 for uplink 5
14:56:31:setup_element:INFO: Setting the data phase to 21 for uplink 6
14:56:31:setup_element:INFO: Setting the data phase to 17 for uplink 7
14:56:31:setup_element:INFO: Setting the data phase to 8 for uplink 8
14:56:31:setup_element:INFO: Setting the data phase to 13 for uplink 9
14:56:31:setup_element:INFO: Setting the data phase to 11 for uplink 10
14:56:31:setup_element:INFO: Setting the data phase to 15 for uplink 11
14:56:31:setup_element:INFO: Setting the data phase to 9 for uplink 12
14:56:31:setup_element:INFO: Setting the data phase to 12 for uplink 13
14:56:31:setup_element:INFO: Setting the data phase to 11 for uplink 14
14:56:31:setup_element:INFO: Setting the data phase to 13 for uplink 15
14:56:31:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXX_
Uplink 1: ________________________________________________________________________XXXXXXX_
Uplink 2: _______________________________________________________________________XXXXXXX__
Uplink 3: _______________________________________________________________________XXXXXXX__
Uplink 4: _______________________________________________________________________XXXXXXXX_
Uplink 5: _______________________________________________________________________XXXXXXXX_
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: ______________________________________________________________________XXXXXXXX__
Uplink 9: ______________________________________________________________________XXXXXXXX__
Uplink 10: _______________________________________________________________________XXXXXXXX_
Uplink 11: _______________________________________________________________________XXXXXXXX_
Uplink 12: _____________________________________________________________________XXXXXXXX___
Uplink 13: _____________________________________________________________________XXXXXXXX___
Uplink 14: _______________________________________________________________________XXXXXXX__
Uplink 15: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 1:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 2:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 3:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 4:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 5:
Optimal Phase: 25
Window Length: 36
Eye Window: ____XXXX________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 8:
Optimal Phase: 8
Window Length: 36
Eye Window: ___________________________XXXX_________
Uplink 9:
Optimal Phase: 13
Window Length: 34
Eye Window: _______________________________XXXXXX___
Uplink 10:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 11:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 12:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 13:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 14:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 15:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
]
14:56:31:setup_element:INFO: Beginning SMX ASICs map scan
14:56:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:56:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:56:31:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:56:31:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:56:31:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:56:31:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:56:31:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:56:31:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:56:31:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:56:31:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:56:31:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:56:31:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:56:31:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:56:32:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:56:32:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:56:32:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:56:32:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:56:32:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:56:32:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:56:32:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:56:32:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:56:33:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXX_
Uplink 1: ________________________________________________________________________XXXXXXX_
Uplink 2: _______________________________________________________________________XXXXXXX__
Uplink 3: _______________________________________________________________________XXXXXXX__
Uplink 4: _______________________________________________________________________XXXXXXXX_
Uplink 5: _______________________________________________________________________XXXXXXXX_
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: ______________________________________________________________________XXXXXXXX__
Uplink 9: ______________________________________________________________________XXXXXXXX__
Uplink 10: _______________________________________________________________________XXXXXXXX_
Uplink 11: _______________________________________________________________________XXXXXXXX_
Uplink 12: _____________________________________________________________________XXXXXXXX___
Uplink 13: _____________________________________________________________________XXXXXXXX___
Uplink 14: _______________________________________________________________________XXXXXXX__
Uplink 15: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 1:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 2:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 3:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 4:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 5:
Optimal Phase: 25
Window Length: 36
Eye Window: ____XXXX________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 8:
Optimal Phase: 8
Window Length: 36
Eye Window: ___________________________XXXX_________
Uplink 9:
Optimal Phase: 13
Window Length: 34
Eye Window: _______________________________XXXXXX___
Uplink 10:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 11:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 12:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 13:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 14:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 15:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
14:56:33:setup_element:INFO: Performing Elink synchronization
14:56:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:56:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:56:34:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:56:34:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:56:34:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:56:34:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:56:34:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
FEB type: A FEB_A: 1 FEB_B: 0
14:56:35:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:56:35:febtest:INFO: 01-00 | XA-000-08-002-001-006-160-07 | 31.4 | 1195.1
14:56:36:febtest:INFO: 08-01 | XA-000-08-002-001-006-165-07 | 31.4 | 1212.7
14:56:36:febtest:INFO: 03-02 | XA-000-08-002-001-006-175-07 | 25.1 | 1224.5
14:56:36:febtest:INFO: 10-03 | XA-000-08-002-001-006-179-00 | 37.7 | 1189.2
14:56:36:febtest:INFO: 05-04 | XA-000-08-002-001-006-178-00 | 34.6 | 1189.2
14:56:36:febtest:INFO: 12-05 | XA-000-08-002-001-006-174-07 | 6.1 | 1300.3
14:56:37:febtest:INFO: 07-06 | XA-000-08-002-001-006-167-07 | 31.4 | 1212.7
14:56:37:febtest:INFO: 14-07 | XA-000-08-002-001-006-162-07 | 28.2 | 1224.5
14:56:37:ST3_smx:INFO: Configuring SMX FAST
14:56:39:ST3_smx:INFO: chip: 1-0 37.726682 C 1177.390875 mV
14:56:39:ST3_smx:INFO: Electrons
14:56:39:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:56:41:ST3_smx:INFO: ----> Checking Analog response
14:56:41:ST3_smx:INFO: ----> Checking broken channels
14:56:41:ST3_smx:INFO: Total # broken ch: 0
14:56:41:ST3_smx:INFO: List FAST: []
14:56:41:ST3_smx:INFO: List SLOW: []
14:56:41:ST3_smx:INFO: Holes
14:56:41:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:56:43:ST3_smx:INFO: ----> Checking Analog response
14:56:43:ST3_smx:INFO: ----> Checking broken channels
14:56:44:ST3_smx:INFO: Total # broken ch: 0
14:56:44:ST3_smx:INFO: List FAST: []
14:56:44:ST3_smx:INFO: List SLOW: []
14:56:44:ST3_smx:INFO: Configuring SMX FAST
14:56:46:ST3_smx:INFO: chip: 8-1 34.556970 C 1195.082160 mV
14:56:46:ST3_smx:INFO: Electrons
14:56:46:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:56:48:ST3_smx:INFO: ----> Checking Analog response
14:56:48:ST3_smx:INFO: ----> Checking broken channels
14:56:49:ST3_smx:INFO: Total # broken ch: 0
14:56:49:ST3_smx:INFO: List FAST: []
14:56:49:ST3_smx:INFO: List SLOW: []
14:56:49:ST3_smx:INFO: Holes
14:56:49:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:56:51:ST3_smx:INFO: ----> Checking Analog response
14:56:51:ST3_smx:INFO: ----> Checking broken channels
14:56:51:ST3_smx:INFO: Total # broken ch: 0
14:56:51:ST3_smx:INFO: List FAST: []
14:56:51:ST3_smx:INFO: List SLOW: []
14:56:51:ST3_smx:INFO: Configuring SMX FAST
14:56:53:ST3_smx:INFO: chip: 3-2 21.902970 C 1236.187875 mV
14:56:53:ST3_smx:INFO: Electrons
14:56:53:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:56:55:ST3_smx:INFO: ----> Checking Analog response
14:56:55:ST3_smx:INFO: ----> Checking broken channels
14:56:56:ST3_smx:INFO: Total # broken ch: 0
14:56:56:ST3_smx:INFO: List FAST: []
14:56:56:ST3_smx:INFO: List SLOW: []
14:56:56:ST3_smx:INFO: Holes
14:56:56:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:56:58:ST3_smx:INFO: ----> Checking Analog response
14:56:58:ST3_smx:INFO: ----> Checking broken channels
14:56:58:ST3_smx:INFO: Total # broken ch: 0
14:56:58:ST3_smx:INFO: List FAST: []
14:56:58:ST3_smx:INFO: List SLOW: []
14:56:59:ST3_smx:INFO: Configuring SMX FAST
14:57:01:ST3_smx:INFO: chip: 10-3 37.726682 C 1189.190035 mV
14:57:01:ST3_smx:INFO: Electrons
14:57:01:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:57:03:ST3_smx:INFO: ----> Checking Analog response
14:57:03:ST3_smx:INFO: ----> Checking broken channels
14:57:03:ST3_smx:INFO: Total # broken ch: 0
14:57:03:ST3_smx:INFO: List FAST: []
14:57:03:ST3_smx:INFO: List SLOW: []
14:57:03:ST3_smx:INFO: Holes
14:57:03:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:57:05:ST3_smx:INFO: ----> Checking Analog response
14:57:05:ST3_smx:INFO: ----> Checking broken channels
14:57:05:ST3_smx:INFO: Total # broken ch: 0
14:57:05:ST3_smx:INFO: List FAST: []
14:57:05:ST3_smx:INFO: List SLOW: []
14:57:06:ST3_smx:INFO: Configuring SMX FAST
14:57:08:ST3_smx:INFO: chip: 5-4 37.726682 C 1189.190035 mV
14:57:08:ST3_smx:INFO: Electrons
14:57:08:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:57:10:ST3_smx:INFO: ----> Checking Analog response
14:57:10:ST3_smx:INFO: ----> Checking broken channels
14:57:10:ST3_smx:INFO: Total # broken ch: 0
14:57:10:ST3_smx:INFO: List FAST: []
14:57:10:ST3_smx:INFO: List SLOW: []
14:57:10:ST3_smx:INFO: Holes
14:57:10:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:57:12:ST3_smx:INFO: ----> Checking Analog response
14:57:12:ST3_smx:INFO: ----> Checking broken channels
14:57:12:ST3_smx:INFO: Total # broken ch: 0
14:57:12:ST3_smx:INFO: List FAST: []
14:57:12:ST3_smx:INFO: List SLOW: []
14:57:13:ST3_smx:INFO: Configuring SMX FAST
14:57:15:ST3_smx:INFO: chip: 12-5 21.902970 C 1259.567515 mV
14:57:15:ST3_smx:INFO: Electrons
14:57:15:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:57:17:ST3_smx:INFO: ----> Checking Analog response
14:57:17:ST3_smx:INFO: ----> Checking broken channels
14:57:17:ST3_smx:INFO: Total # broken ch: 0
14:57:17:ST3_smx:INFO: List FAST: []
14:57:17:ST3_smx:INFO: List SLOW: []
14:57:17:ST3_smx:INFO: Holes
14:57:17:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:57:19:ST3_smx:INFO: ----> Checking Analog response
14:57:19:ST3_smx:INFO: ----> Checking broken channels
14:57:20:ST3_smx:INFO: Total # broken ch: 0
14:57:20:ST3_smx:INFO: List FAST: []
14:57:20:ST3_smx:INFO: List SLOW: []
14:57:20:ST3_smx:INFO: Configuring SMX FAST
14:57:22:ST3_smx:INFO: chip: 7-6 31.389742 C 1212.728715 mV
14:57:22:ST3_smx:INFO: Electrons
14:57:22:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:57:24:ST3_smx:INFO: ----> Checking Analog response
14:57:24:ST3_smx:INFO: ----> Checking broken channels
14:57:25:ST3_smx:INFO: Total # broken ch: 0
14:57:25:ST3_smx:INFO: List FAST: []
14:57:25:ST3_smx:INFO: List SLOW: []
14:57:25:ST3_smx:INFO: Holes
14:57:25:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:57:27:ST3_smx:INFO: ----> Checking Analog response
14:57:27:ST3_smx:INFO: ----> Checking broken channels
14:57:27:ST3_smx:INFO: Total # broken ch: 0
14:57:27:ST3_smx:INFO: List FAST: []
14:57:27:ST3_smx:INFO: List SLOW: []
14:57:27:ST3_smx:INFO: Configuring SMX FAST
14:57:29:ST3_smx:INFO: chip: 14-7 28.225000 C 1236.187875 mV
14:57:30:ST3_smx:INFO: Electrons
14:57:30:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:57:32:ST3_smx:INFO: ----> Checking Analog response
14:57:32:ST3_smx:INFO: ----> Checking broken channels
14:57:32:ST3_smx:INFO: Total # broken ch: 0
14:57:32:ST3_smx:INFO: List FAST: []
14:57:32:ST3_smx:INFO: List SLOW: []
14:57:32:ST3_smx:INFO: Holes
14:57:32:ST3_smx:INFO: Injected pulses: 150LSB, amp_cal 8.400000 fC
14:57:34:ST3_smx:INFO: ----> Checking Analog response
14:57:34:ST3_smx:INFO: ----> Checking broken channels
14:57:34:ST3_smx:INFO: Total # broken ch: 0
14:57:34:ST3_smx:INFO: List FAST: []
14:57:34:ST3_smx:INFO: List SLOW: []
14:57:35:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:57:35:febtest:INFO: 01-00 | XA-000-08-002-001-006-160-07 | 37.7 | 1177.4
14:57:35:febtest:INFO: 08-01 | XA-000-08-002-001-006-165-07 | 37.7 | 1189.2
14:57:35:febtest:INFO: 03-02 | XA-000-08-002-001-006-175-07 | 25.1 | 1230.3
14:57:35:febtest:INFO: 10-03 | XA-000-08-002-001-006-179-00 | 37.7 | 1183.3
14:57:36:febtest:INFO: 05-04 | XA-000-08-002-001-006-178-00 | 37.7 | 1183.3
14:57:36:febtest:INFO: 12-05 | XA-000-08-002-001-006-174-07 | 21.9 | 1253.7
14:57:36:febtest:INFO: 07-06 | XA-000-08-002-001-006-167-07 | 31.4 | 1206.9
14:57:36:febtest:INFO: 14-07 | XA-000-08-002-001-006-162-07 | 28.2 | 1230.3
############################################################
# S U M M A R Y #
############################################################
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 30, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 150, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 30, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-ASIC
TEST_DATE : 24_03_13-14_56_20
OPERATOR : Alois Alzheimer
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 1012
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
MODULE_NAME
---------------------------------------
VI_before_Init : ['2.450', '1.4720', '1.848', '2.3420', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9680', '1.850', '0.4302', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9640', '1.850', '0.3110', '0.000', '0.0000', '0.000', '0.0000']
14:57:44:ST3_Shared:INFO: Listo of operators:Irakli K.;
14:57:45:ST3_Shared:INFO: Listo of operators:Oleksandr S.; Irakli K.;
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-ASIC
TEST_DATE : 24_03_13-14_56_20
OPERATOR : Alois Alzheimer
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 1012
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
MODULE_NAME
---------------------------------------
VI_before_Init : ['2.450', '1.4720', '1.848', '2.3420', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9680', '1.850', '0.4302', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9640', '1.850', '0.3110', '0.000', '0.0000', '0.000', '0.0000']
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-ASIC
TEST_DATE : 24_03_13-14_56_20
OPERATOR : Alois Alzheimer
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 1012
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
MODULE_NAME
---------------------------------------
VI_before_Init : ['2.450', '1.4720', '1.848', '2.3420', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9680', '1.850', '0.4302', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9640', '1.850', '0.3110', '0.000', '0.0000', '0.000', '0.0000']
14:57:55:ST3_Shared:INFO: Listo of operators:Oleksandr S.; Irakli K.;