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FEB_1014 04.09.23 10:50:45
Info
10:50:04:ST3_hmp4040:INFO:
10:50:04:febtest:INFO: FEB8.2 selected
10:50:04:febtest:INFO: FEB8.2 selected
10:50:08:ST3_Shared:INFO: Listo of operators:Olga B.;
10:50:08:ST3_Shared:INFO: Listo of operators:Olga B.; Oleksandr S.;
10:50:09:ST3_Shared:INFO: Listo of operators:Kerstin S.; Olga B.; Oleksandr S.;
10:50:18:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:50:18:ST3_emu:ERROR: device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!
10:50:19:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:50:45:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:50:45:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
10:50:45:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:50:45:febtest:INFO: Tsting FEB with SN 1014
10:50:46:smx_tester:INFO: Scanning setup
10:50:46:elinks:INFO: Disabling clock on downlink 0
10:50:46:elinks:INFO: Disabling clock on downlink 1
10:50:46:elinks:INFO: Disabling clock on downlink 2
10:50:46:elinks:INFO: Disabling clock on downlink 3
10:50:46:elinks:INFO: Disabling clock on downlink 4
10:50:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:50:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:50:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:50:46:elinks:INFO: Disabling clock on downlink 0
10:50:46:elinks:INFO: Disabling clock on downlink 1
10:50:46:elinks:INFO: Disabling clock on downlink 2
10:50:46:elinks:INFO: Disabling clock on downlink 3
10:50:46:elinks:INFO: Disabling clock on downlink 4
10:50:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:50:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:50:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:50:47:elinks:INFO: Disabling clock on downlink 0
10:50:47:elinks:INFO: Disabling clock on downlink 1
10:50:47:elinks:INFO: Disabling clock on downlink 2
10:50:47:elinks:INFO: Disabling clock on downlink 3
10:50:47:elinks:INFO: Disabling clock on downlink 4
10:50:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:50:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:50:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:50:47:elinks:INFO: Disabling clock on downlink 0
10:50:47:elinks:INFO: Disabling clock on downlink 1
10:50:47:elinks:INFO: Disabling clock on downlink 2
10:50:47:elinks:INFO: Disabling clock on downlink 3
10:50:47:elinks:INFO: Disabling clock on downlink 4
10:50:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:50:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:50:47:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 24
10:50:47:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 25
10:50:47:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 26
10:50:47:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 27
10:50:47:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 28
10:50:47:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 29
10:50:47:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 30
10:50:47:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 31
10:50:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:50:47:elinks:INFO: Disabling clock on downlink 0
10:50:47:elinks:INFO: Disabling clock on downlink 1
10:50:47:elinks:INFO: Disabling clock on downlink 2
10:50:47:elinks:INFO: Disabling clock on downlink 3
10:50:47:elinks:INFO: Disabling clock on downlink 4
10:50:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:50:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:50:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:50:47:setup_element:INFO: Scanning clock phase
10:50:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:50:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:50:47:setup_element:INFO: Clock phase scan results for group 0, downlink 3
10:50:47:setup_element:INFO: Eye window for uplink 24: _________________________________________________________________XXXXXXXXX______
Clock Delay: 29
10:50:47:setup_element:INFO: Eye window for uplink 25: _________________________________________________________________XXXXXXXXX______
Clock Delay: 29
10:50:47:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________XXXXXXXXX______
Clock Delay: 29
10:50:47:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________XXXXXXXXX______
Clock Delay: 29
10:50:47:setup_element:INFO: Eye window for uplink 28: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
10:50:47:setup_element:INFO: Eye window for uplink 29: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
10:50:47:setup_element:INFO: Eye window for uplink 30: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
10:50:47:setup_element:INFO: Eye window for uplink 31: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
10:50:47:setup_element:INFO: Setting the clock phase to 29 for group 0, downlink 3
10:50:47:setup_element:INFO: Scanning data phases
10:50:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:50:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:50:53:setup_element:INFO: Data phase scan results for group 0, downlink 3
10:50:53:setup_element:INFO: Eye window for uplink 24: XXX_________________________________XXXX
Data delay found: 19
10:50:53:setup_element:INFO: Eye window for uplink 25: _XXXXX__________________________________
Data delay found: 23
10:50:53:setup_element:INFO: Eye window for uplink 26: XXX_________________________________XXXX
Data delay found: 19
10:50:53:setup_element:INFO: Eye window for uplink 27: _XXXXX__________________________________
Data delay found: 23
10:50:53:setup_element:INFO: Eye window for uplink 28: X___________________________________XXXX
Data delay found: 18
10:50:53:setup_element:INFO: Eye window for uplink 29: XXX___________________________________XX
Data delay found: 20
10:50:53:setup_element:INFO: Eye window for uplink 30: XXXXX__________________________________X
Data delay found: 21
10:50:53:setup_element:INFO: Eye window for uplink 31: XXXX________________________________XXXX
Data delay found: 19
10:50:53:setup_element:INFO: Setting the data phase to 19 for uplink 24
10:50:53:setup_element:INFO: Setting the data phase to 23 for uplink 25
10:50:53:setup_element:INFO: Setting the data phase to 19 for uplink 26
10:50:53:setup_element:INFO: Setting the data phase to 23 for uplink 27
10:50:53:setup_element:INFO: Setting the data phase to 18 for uplink 28
10:50:53:setup_element:INFO: Setting the data phase to 20 for uplink 29
10:50:53:setup_element:INFO: Setting the data phase to 21 for uplink 30
10:50:53:setup_element:INFO: Setting the data phase to 19 for uplink 31
10:50:53:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 3
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 29
Window Length: 71
Eye Windows:
Uplink 24: _________________________________________________________________XXXXXXXXX______
Uplink 25: _________________________________________________________________XXXXXXXXX______
Uplink 26: _________________________________________________________________XXXXXXXXX______
Uplink 27: _________________________________________________________________XXXXXXXXX______
Uplink 28: _________________________________________________________________XXXXXXXX_______
Uplink 29: _________________________________________________________________XXXXXXXX_______
Uplink 30: ___________________________________________________________________XXXXXX_______
Uplink 31: ___________________________________________________________________XXXXXX_______
Data phase characteristics:
Uplink 24:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 25:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 26:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 27:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 28:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 29:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 30:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 31:
Optimal Phase: 19
Window Length: 32
Eye Window: XXXX________________________________XXXX
]
10:50:53:setup_element:INFO: Beginning SMX ASICs map scan
10:50:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:50:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:50:53:master:INFO: Setting encoding mode EOS for groups [0], downlinks [3]
10:50:53:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [3]
10:50:53:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
10:50:53:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 24
10:50:53:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 25
10:50:53:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 26
10:50:53:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 27
10:50:54:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 28
10:50:54:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 29
10:50:54:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 30
10:50:54:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 31
10:50:55:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 3
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 24), (1, 25)
ASIC address 0x3: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x5: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x7: (ASIC uplink, uplink): (0, 30), (1, 31)
Clock Phase Characteristic:
Optimal Phase: 29
Window Length: 71
Eye Windows:
Uplink 24: _________________________________________________________________XXXXXXXXX______
Uplink 25: _________________________________________________________________XXXXXXXXX______
Uplink 26: _________________________________________________________________XXXXXXXXX______
Uplink 27: _________________________________________________________________XXXXXXXXX______
Uplink 28: _________________________________________________________________XXXXXXXX_______
Uplink 29: _________________________________________________________________XXXXXXXX_______
Uplink 30: ___________________________________________________________________XXXXXX_______
Uplink 31: ___________________________________________________________________XXXXXX_______
Data phase characteristics:
Uplink 24:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 25:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 26:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 27:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 28:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 29:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 30:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 31:
Optimal Phase: 19
Window Length: 32
Eye Window: XXXX________________________________XXXX
10:50:55:setup_element:INFO: Performing Elink synchronization
10:50:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:50:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:50:55:master:INFO: Setting encoding mode EOS for groups [0], downlinks [3]
10:50:55:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [3]
10:50:55:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 3
10:50:56:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
10:50:56:ST3_emu:INFO: Number of chips: 4
10:50:56:ST3_emu:INFO: Chip address: 0x1
10:50:56:ST3_emu:INFO: Chip address: 0x3
10:50:56:ST3_emu:INFO: Chip address: 0x5
10:50:56:ST3_emu:INFO: Chip address: 0x7
10:50:56:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:50:57:febtest:INFO: 0-1 | XA-000-08-001-064-050-112-05 | 37.7 | 1177.4
10:50:57:febtest:INFO: 0-3 | XA-000-08-001-064-044-200-03 | 25.1 | 1212.7
10:50:57:febtest:INFO: 0-5 | XA-000-08-001-064-045-072-04 | 34.6 | 1183.3
10:50:57:febtest:INFO: 0-7 | XA-000-08-001-064-049-160-03 | 31.4 | 1189.2
10:50:57:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:51:01:ST3_smx:INFO: chip: 0-1 37.726682 C 1159.654860 mV
10:51:01:ST3_smx:INFO: # loops 0
10:51:02:ST3_smx:INFO: # loops 1
10:51:04:ST3_smx:INFO: # loops 2
10:51:06:ST3_smx:INFO: # loops 3
10:51:07:ST3_smx:INFO: # loops 4
10:51:09:ST3_smx:INFO: Total # of broken channels: 0
10:51:09:ST3_smx:INFO: List of broken channels: []
10:51:09:ST3_smx:INFO: Total # of broken channels: 0
10:51:09:ST3_smx:INFO: List of broken channels: []
10:51:10:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:51:13:ST3_smx:INFO: chip: 0-3 28.225000 C 1189.190035 mV
10:51:13:ST3_smx:INFO: # loops 0
10:51:15:ST3_smx:INFO: # loops 1
10:51:17:ST3_smx:INFO: # loops 2
10:51:18:ST3_smx:INFO: # loops 3
10:51:20:ST3_smx:INFO: # loops 4
10:51:21:ST3_smx:INFO: Total # of broken channels: 0
10:51:21:ST3_smx:INFO: List of broken channels: []
10:51:21:ST3_smx:INFO: Total # of broken channels: 0
10:51:21:ST3_smx:INFO: List of broken channels: []
10:51:22:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:51:25:ST3_smx:INFO: chip: 0-5 37.726682 C 1165.571835 mV
10:51:25:ST3_smx:INFO: # loops 0
10:51:27:ST3_smx:INFO: # loops 1
10:51:29:ST3_smx:INFO: # loops 2
10:51:30:ST3_smx:INFO: # loops 3
10:51:32:ST3_smx:INFO: # loops 4
10:51:33:ST3_smx:INFO: Total # of broken channels: 0
10:51:33:ST3_smx:INFO: List of broken channels: []
10:51:33:ST3_smx:INFO: Total # of broken channels: 0
10:51:33:ST3_smx:INFO: List of broken channels: []
10:51:34:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:51:37:ST3_smx:INFO: chip: 0-7 37.726682 C 1159.654860 mV
10:51:37:ST3_smx:INFO: # loops 0
10:51:39:ST3_smx:INFO: # loops 1
10:51:41:ST3_smx:INFO: # loops 2
10:51:42:ST3_smx:INFO: # loops 3
10:51:44:ST3_smx:INFO: # loops 4
10:51:45:ST3_smx:INFO: Total # of broken channels: 0
10:51:45:ST3_smx:INFO: List of broken channels: []
10:51:45:ST3_smx:INFO: Total # of broken channels: 0
10:51:45:ST3_smx:INFO: List of broken channels: []
10:51:46:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:51:46:febtest:INFO: 0-1 | XA-000-08-001-064-050-112-05 | 44.1 | 1147.8
10:51:46:febtest:INFO: 0-3 | XA-000-08-001-064-044-200-03 | 31.4 | 1183.3
10:51:47:febtest:INFO: 0-5 | XA-000-08-001-064-045-072-04 | 40.9 | 1165.6
10:51:47:febtest:INFO: 0-7 | XA-000-08-001-064-049-160-03 | 40.9 | 1153.7
10:51:55:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1014/A//TestDate_2023_09_04-10_50_45/