
FEB_1016 05.10.23 08:41:54
TextEdit.txt
08:41:52:smx_tester:INFO: Setting Elink clock mode to 160 MHz 08:41:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:41:54:ST3_Shared:INFO: -------------------------FEB-Sensor------------------------- 08:41:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:41:54:febtest:INFO: Tsting FEB with SN 1016 08:41:56:smx_tester:INFO: Scanning setup 08:41:56:elinks:INFO: Disabling clock on downlink 0 08:41:56:elinks:INFO: Disabling clock on downlink 1 08:41:56:elinks:INFO: Disabling clock on downlink 2 08:41:56:elinks:INFO: Disabling clock on downlink 3 08:41:56:elinks:INFO: Disabling clock on downlink 4 08:41:56:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:41:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 08:41:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:41:56:elinks:INFO: Disabling clock on downlink 0 08:41:56:elinks:INFO: Disabling clock on downlink 1 08:41:56:elinks:INFO: Disabling clock on downlink 2 08:41:56:elinks:INFO: Disabling clock on downlink 3 08:41:56:elinks:INFO: Disabling clock on downlink 4 08:41:56:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:41:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:41:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:41:56:elinks:INFO: Disabling clock on downlink 0 08:41:56:elinks:INFO: Disabling clock on downlink 1 08:41:56:elinks:INFO: Disabling clock on downlink 2 08:41:56:elinks:INFO: Disabling clock on downlink 3 08:41:56:elinks:INFO: Disabling clock on downlink 4 08:41:56:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:41:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 08:41:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:41:56:elinks:INFO: Disabling clock on downlink 0 08:41:56:elinks:INFO: Disabling clock on downlink 1 08:41:56:elinks:INFO: Disabling clock on downlink 2 08:41:56:elinks:INFO: Disabling clock on downlink 3 08:41:56:elinks:INFO: Disabling clock on downlink 4 08:41:56:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:41:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 08:41:56:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 16 08:41:56:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 17 08:41:56:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 18 08:41:56:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 19 08:41:56:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 20 08:41:56:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 21 08:41:56:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 22 08:41:56:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 23 08:41:56:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 24 08:41:56:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 25 08:41:56:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 26 08:41:56:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 27 08:41:56:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 28 08:41:56:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 29 08:41:56:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 30 08:41:56:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 31 08:41:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:41:56:elinks:INFO: Disabling clock on downlink 0 08:41:56:elinks:INFO: Disabling clock on downlink 1 08:41:56:elinks:INFO: Disabling clock on downlink 2 08:41:56:elinks:INFO: Disabling clock on downlink 3 08:41:56:elinks:INFO: Disabling clock on downlink 4 08:41:56:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:41:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 08:41:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:41:56:setup_element:INFO: Scanning clock phase 08:41:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 08:41:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3] 08:41:57:setup_element:INFO: Clock phase scan results for group 0, downlink 3 08:41:57:setup_element:INFO: Eye window for uplink 16: ____________________________________________________________________XXXXXXX_____ Clock Delay: 31 08:41:57:setup_element:INFO: Eye window for uplink 17: ____________________________________________________________________XXXXXXX_____ Clock Delay: 31 08:41:57:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 08:41:57:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 08:41:57:setup_element:INFO: Eye window for uplink 20: ___________________________________________________________________XXXXXXX______ Clock Delay: 30 08:41:57:setup_element:INFO: Eye window for uplink 21: ___________________________________________________________________XXXXXXX______ Clock Delay: 30 08:41:57:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 08:41:57:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 08:41:57:setup_element:INFO: Eye window for uplink 24: __________________________________________________________________XXXXXXXXX_____ Clock Delay: 30 08:41:57:setup_element:INFO: Eye window for uplink 25: __________________________________________________________________XXXXXXXXX_____ Clock Delay: 30 08:41:57:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________XXXXXXXX_______ Clock Delay: 28 08:41:57:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________XXXXXXXX_______ Clock Delay: 28 08:41:57:setup_element:INFO: Eye window for uplink 28: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 08:41:57:setup_element:INFO: Eye window for uplink 29: ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 08:41:57:setup_element:INFO: Eye window for uplink 30: ___________________________________________________________________XXXXXXX______ Clock Delay: 30 08:41:57:setup_element:INFO: Eye window for uplink 31: ___________________________________________________________________XXXXXXX______ Clock Delay: 30 08:41:57:setup_element:INFO: Setting the clock phase to 30 for group 0, downlink 3 08:41:57:setup_element:INFO: Scanning data phases 08:41:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 08:41:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3] 08:42:02:setup_element:INFO: Data phase scan results for group 0, downlink 3 08:42:02:setup_element:INFO: Eye window for uplink 16: _____________XXXXX______________________ Data delay found: 35 08:42:02:setup_element:INFO: Eye window for uplink 17: _________XXXXX__________________________ Data delay found: 31 08:42:02:setup_element:INFO: Eye window for uplink 18: _____________XXXX_______________________ Data delay found: 34 08:42:02:setup_element:INFO: Eye window for uplink 19: __________XXXXX_________________________ Data delay found: 32 08:42:03:setup_element:INFO: Eye window for uplink 20: _____XXXXX______________________________ Data delay found: 27 08:42:03:setup_element:INFO: Eye window for uplink 21: ____XXXXX_______________________________ Data delay found: 26 08:42:03:setup_element:INFO: Eye window for uplink 22: ______XXXXX_____________________________ Data delay found: 28 08:42:03:setup_element:INFO: Eye window for uplink 23: ___XXXX_________________________________ Data delay found: 24 08:42:03:setup_element:INFO: Eye window for uplink 24: _________________________________XXXXXX_ Data delay found: 15 08:42:03:setup_element:INFO: Eye window for uplink 25: XX___________________________________XXX Data delay found: 19 08:42:03:setup_element:INFO: Eye window for uplink 26: ______________________________XXXXX_____ Data delay found: 12 08:42:03:setup_element:INFO: Eye window for uplink 27: __________________________________XXXXX_ Data delay found: 16 08:42:03:setup_element:INFO: Eye window for uplink 28: XX___________________________________XXX Data delay found: 19 08:42:03:setup_element:INFO: Eye window for uplink 29: XXXXX_________________________________XX Data delay found: 21 08:42:03:setup_element:INFO: Eye window for uplink 30: __________________________________XXXXX_ Data delay found: 16 08:42:03:setup_element:INFO: Eye window for uplink 31: ________________________________XXXXX___ Data delay found: 14 08:42:03:setup_element:INFO: Setting the data phase to 35 for uplink 16 08:42:03:setup_element:INFO: Setting the data phase to 31 for uplink 17 08:42:03:setup_element:INFO: Setting the data phase to 34 for uplink 18 08:42:03:setup_element:INFO: Setting the data phase to 32 for uplink 19 08:42:03:setup_element:INFO: Setting the data phase to 27 for uplink 20 08:42:03:setup_element:INFO: Setting the data phase to 26 for uplink 21 08:42:03:setup_element:INFO: Setting the data phase to 28 for uplink 22 08:42:03:setup_element:INFO: Setting the data phase to 24 for uplink 23 08:42:03:setup_element:INFO: Setting the data phase to 15 for uplink 24 08:42:03:setup_element:INFO: Setting the data phase to 19 for uplink 25 08:42:03:setup_element:INFO: Setting the data phase to 12 for uplink 26 08:42:03:setup_element:INFO: Setting the data phase to 16 for uplink 27 08:42:03:setup_element:INFO: Setting the data phase to 19 for uplink 28 08:42:03:setup_element:INFO: Setting the data phase to 21 for uplink 29 08:42:03:setup_element:INFO: Setting the data phase to 16 for uplink 30 08:42:03:setup_element:INFO: Setting the data phase to 14 for uplink 31 08:42:03:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 3 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 30 Window Length: 69 Eye Windows: Uplink 16: ____________________________________________________________________XXXXXXX_____ Uplink 17: ____________________________________________________________________XXXXXXX_____ Uplink 18: _____________________________________________________________________XXXXXXX____ Uplink 19: _____________________________________________________________________XXXXXXX____ Uplink 20: ___________________________________________________________________XXXXXXX______ Uplink 21: ___________________________________________________________________XXXXXXX______ Uplink 22: _____________________________________________________________________XXXXXXX____ Uplink 23: _____________________________________________________________________XXXXXXX____ Uplink 24: __________________________________________________________________XXXXXXXXX_____ Uplink 25: __________________________________________________________________XXXXXXXXX_____ Uplink 26: _________________________________________________________________XXXXXXXX_______ Uplink 27: _________________________________________________________________XXXXXXXX_______ Uplink 28: ____________________________________________________________________XXXXXXXX____ Uplink 29: ____________________________________________________________________XXXXXXXX____ Uplink 30: ___________________________________________________________________XXXXXXX______ Uplink 31: ___________________________________________________________________XXXXXXX______ Data phase characteristics: Uplink 16: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 17: Optimal Phase: 31 Window Length: 35 Eye Window: _________XXXXX__________________________ Uplink 18: Optimal Phase: 34 Window Length: 36 Eye Window: _____________XXXX_______________________ Uplink 19: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 20: Optimal Phase: 27 Window Length: 35 Eye Window: _____XXXXX______________________________ Uplink 21: Optimal Phase: 26 Window Length: 35 Eye Window: ____XXXXX_______________________________ Uplink 22: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 23: Optimal Phase: 24 Window Length: 36 Eye Window: ___XXXX_________________________________ Uplink 24: Optimal Phase: 15 Window Length: 34 Eye Window: _________________________________XXXXXX_ Uplink 25: Optimal Phase: 19 Window Length: 35 Eye Window: XX___________________________________XXX Uplink 26: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 27: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 28: Optimal Phase: 19 Window Length: 35 Eye Window: XX___________________________________XXX Uplink 29: Optimal Phase: 21 Window Length: 33 Eye Window: XXXXX_________________________________XX Uplink 30: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 31: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ ] 08:42:03:setup_element:INFO: Beginning SMX ASICs map scan 08:42:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 08:42:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3] 08:42:03:master:INFO: Setting encoding mode EOS for groups [0], downlinks [3] 08:42:03:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [3] 08:42:03:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 08:42:03:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 17 08:42:03:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 16 08:42:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 24 08:42:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 25 08:42:03:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 19 08:42:03:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 18 08:42:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 26 08:42:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 27 08:42:03:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 21 08:42:03:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 20 08:42:04:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 28 08:42:04:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 29 08:42:04:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 23 08:42:04:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 22 08:42:04:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 30 08:42:04:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 31 08:42:05:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 3 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x1: (ASIC uplink, uplink): (0, 24), (1, 25) ASIC address 0x2: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x3: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x4: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x5: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x6: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x7: (ASIC uplink, uplink): (0, 30), (1, 31) Clock Phase Characteristic: Optimal Phase: 30 Window Length: 69 Eye Windows: Uplink 16: ____________________________________________________________________XXXXXXX_____ Uplink 17: ____________________________________________________________________XXXXXXX_____ Uplink 18: _____________________________________________________________________XXXXXXX____ Uplink 19: _____________________________________________________________________XXXXXXX____ Uplink 20: ___________________________________________________________________XXXXXXX______ Uplink 21: ___________________________________________________________________XXXXXXX______ Uplink 22: _____________________________________________________________________XXXXXXX____ Uplink 23: _____________________________________________________________________XXXXXXX____ Uplink 24: __________________________________________________________________XXXXXXXXX_____ Uplink 25: __________________________________________________________________XXXXXXXXX_____ Uplink 26: _________________________________________________________________XXXXXXXX_______ Uplink 27: _________________________________________________________________XXXXXXXX_______ Uplink 28: ____________________________________________________________________XXXXXXXX____ Uplink 29: ____________________________________________________________________XXXXXXXX____ Uplink 30: ___________________________________________________________________XXXXXXX______ Uplink 31: ___________________________________________________________________XXXXXXX______ Data phase characteristics: Uplink 16: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 17: Optimal Phase: 31 Window Length: 35 Eye Window: _________XXXXX__________________________ Uplink 18: Optimal Phase: 34 Window Length: 36 Eye Window: _____________XXXX_______________________ Uplink 19: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 20: Optimal Phase: 27 Window Length: 35 Eye Window: _____XXXXX______________________________ Uplink 21: Optimal Phase: 26 Window Length: 35 Eye Window: ____XXXXX_______________________________ Uplink 22: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 23: Optimal Phase: 24 Window Length: 36 Eye Window: ___XXXX_________________________________ Uplink 24: Optimal Phase: 15 Window Length: 34 Eye Window: _________________________________XXXXXX_ Uplink 25: Optimal Phase: 19 Window Length: 35 Eye Window: XX___________________________________XXX Uplink 26: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 27: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 28: Optimal Phase: 19 Window Length: 35 Eye Window: XX___________________________________XXX Uplink 29: Optimal Phase: 21 Window Length: 33 Eye Window: XXXXX_________________________________XX Uplink 30: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 31: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ 08:42:05:setup_element:INFO: Performing Elink synchronization 08:42:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 08:42:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3] 08:42:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [3] 08:42:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [3] 08:42:05:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 3 08:42:05:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 08:42:06:ST3_emu:INFO: Number of chips: 8 08:42:06:ST3_emu:INFO: Chip address: 0x0 08:42:06:ST3_emu:INFO: Chip address: 0x1 08:42:06:ST3_emu:INFO: Chip address: 0x2 08:42:06:ST3_emu:INFO: Chip address: 0x3 08:42:06:ST3_emu:INFO: Chip address: 0x4 08:42:06:ST3_emu:INFO: Chip address: 0x5 08:42:06:ST3_emu:INFO: Chip address: 0x6 08:42:06:ST3_emu:INFO: Chip address: 0x7 08:42:06:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 08:42:06:febtest:INFO: 0-0 | XA-000-08-001-064-050-056-00 | 25.1 | 1236.2 08:42:06:febtest:INFO: 0-1 | XA-000-08-001-064-050-104-02 | 37.7 | 1183.3 08:42:07:febtest:INFO: 0-2 | XA-000-08-001-064-050-096-02 | 21.9 | 1242.0 08:42:07:febtest:INFO: 0-3 | XA-000-08-001-064-049-088-05 | 34.6 | 1195.1 08:42:07:febtest:INFO: 0-4 | XA-000-08-001-064-048-200-05 | 34.6 | 1212.7 08:42:07:febtest:INFO: 0-5 | XA-000-08-001-064-049-016-00 | 21.9 | 1247.9 08:42:08:febtest:INFO: 0-6 | XA-000-08-001-064-048-224-11 | 44.1 | 1177.4 08:42:08:febtest:INFO: 0-7 | XA-000-08-001-064-049-080-05 | 47.3 | 1159.7 08:42:08:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 08:42:12:ST3_smx:INFO: chip: 0-0 25.062742 C 1224.468235 mV 08:42:12:ST3_smx:INFO: # loops 0 08:42:13:ST3_smx:INFO: # loops 1 08:42:15:ST3_smx:INFO: # loops 2 08:42:17:ST3_smx:INFO: # loops 3 08:42:18:ST3_smx:INFO: # loops 4 08:42:20:ST3_smx:INFO: Total # of broken channels: 1 08:42:20:ST3_smx:INFO: List of broken channels: [80] 08:42:20:ST3_smx:INFO: Total # of broken channels: 1 08:42:20:ST3_smx:INFO: List of broken channels: [80] 08:42:21:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 08:42:24:ST3_smx:INFO: chip: 0-1 34.556970 C 1177.390875 mV 08:42:24:ST3_smx:INFO: # loops 0 08:42:26:ST3_smx:INFO: # loops 1 08:42:28:ST3_smx:INFO: # loops 2 08:42:29:ST3_smx:INFO: # loops 3 08:42:31:ST3_smx:INFO: # loops 4 08:42:33:ST3_smx:INFO: Total # of broken channels: 0 08:42:33:ST3_smx:INFO: List of broken channels: [] 08:42:33:ST3_smx:INFO: Total # of broken channels: 1 08:42:33:ST3_smx:INFO: List of broken channels: [42] 08:42:33:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 08:42:37:ST3_smx:INFO: chip: 0-2 18.745682 C 1230.330540 mV 08:42:37:ST3_smx:INFO: # loops 0 08:42:39:ST3_smx:INFO: # loops 1 08:42:41:ST3_smx:INFO: # loops 2 08:42:42:ST3_smx:INFO: # loops 3 08:42:44:ST3_smx:INFO: # loops 4 08:42:46:ST3_smx:INFO: Total # of broken channels: 0 08:42:46:ST3_smx:INFO: List of broken channels: [] 08:42:46:ST3_smx:INFO: Total # of broken channels: 0 08:42:46:ST3_smx:INFO: List of broken channels: [] 08:42:46:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 08:42:50:ST3_smx:INFO: chip: 0-3 40.898880 C 1153.732915 mV 08:42:50:ST3_smx:INFO: # loops 0 08:42:52:ST3_smx:INFO: # loops 1 08:42:54:ST3_smx:INFO: # loops 2 08:42:55:ST3_smx:INFO: # loops 3 08:42:57:ST3_smx:INFO: # loops 4 08:42:59:ST3_smx:INFO: Total # of broken channels: 0 08:42:59:ST3_smx:INFO: List of broken channels: [] 08:42:59:ST3_smx:INFO: Total # of broken channels: 0 08:42:59:ST3_smx:INFO: List of broken channels: [] 08:42:59:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 08:43:03:ST3_smx:INFO: chip: 0-4 34.556970 C 1189.190035 mV 08:43:03:ST3_smx:INFO: # loops 0 08:43:05:ST3_smx:INFO: # loops 1 08:43:07:ST3_smx:INFO: # loops 2 08:43:08:ST3_smx:INFO: # loops 3 08:43:10:ST3_smx:INFO: # loops 4 08:43:12:ST3_smx:INFO: Total # of broken channels: 0 08:43:12:ST3_smx:INFO: List of broken channels: [] 08:43:12:ST3_smx:INFO: Total # of broken channels: 0 08:43:12:ST3_smx:INFO: List of broken channels: [] 08:43:12:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 08:43:16:ST3_smx:INFO: chip: 0-5 34.556970 C 1183.292940 mV 08:43:16:ST3_smx:INFO: # loops 0 08:43:18:ST3_smx:INFO: # loops 1 08:43:19:ST3_smx:INFO: # loops 2 08:43:21:ST3_smx:INFO: # loops 3 08:43:22:ST3_smx:INFO: # loops 4 08:43:24:ST3_smx:INFO: Total # of broken channels: 0 08:43:24:ST3_smx:INFO: List of broken channels: [] 08:43:24:ST3_smx:INFO: Total # of broken channels: 0 08:43:24:ST3_smx:INFO: List of broken channels: [] 08:43:25:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 08:43:28:ST3_smx:INFO: chip: 0-6 44.073563 C 1165.571835 mV 08:43:29:ST3_smx:INFO: # loops 0 08:43:30:ST3_smx:INFO: # loops 1 08:43:32:ST3_smx:INFO: # loops 2 08:43:34:ST3_smx:INFO: # loops 3 08:43:35:ST3_smx:INFO: # loops 4 08:43:37:ST3_smx:INFO: Total # of broken channels: 0 08:43:37:ST3_smx:INFO: List of broken channels: [] 08:43:37:ST3_smx:INFO: Total # of broken channels: 0 08:43:37:ST3_smx:INFO: List of broken channels: [] 08:43:37:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 08:43:41:ST3_smx:INFO: chip: 0-7 44.073563 C 1153.732915 mV 08:43:41:ST3_smx:INFO: # loops 0 08:43:43:ST3_smx:INFO: # loops 1 08:43:45:ST3_smx:INFO: # loops 2 08:43:46:ST3_smx:INFO: # loops 3 08:43:48:ST3_smx:INFO: # loops 4 08:43:50:ST3_smx:INFO: Total # of broken channels: 0 08:43:50:ST3_smx:INFO: List of broken channels: [] 08:43:50:ST3_smx:INFO: Total # of broken channels: 0 08:43:50:ST3_smx:INFO: List of broken channels: [] 08:43:50:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 08:43:50:febtest:INFO: 0-0 | XA-000-08-001-064-050-056-00 | 28.2 | 1212.7 08:43:51:febtest:INFO: 0-1 | XA-000-08-001-064-050-104-02 | 37.7 | 1171.5 08:43:51:febtest:INFO: 0-2 | XA-000-08-001-064-050-096-02 | 21.9 | 1224.5 08:43:51:febtest:INFO: 0-3 | XA-000-08-001-064-049-088-05 | 44.1 | 1153.7 08:43:51:febtest:INFO: 0-4 | XA-000-08-001-064-048-200-05 | 37.7 | 1189.2 08:43:52:febtest:INFO: 0-5 | XA-000-08-001-064-049-016-00 | 34.6 | 1183.3 08:43:52:febtest:INFO: 0-6 | XA-000-08-001-064-048-224-11 | 44.1 | 1159.7 08:43:52:febtest:INFO: 0-7 | XA-000-08-001-064-049-080-05 | 47.3 | 1147.8 08:43:56:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1016/A//TestDate_2023_10_05-08_41_54/ 09:53:54:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1016/A//TestDate_2023_10_05-08_41_54/