FEB_1017    05.09.23 11:16:26

TextEdit.txt
            11:14:41:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:14:41:ST3_Shared:INFO:	--------------------------FEB-ASIC--------------------------
11:14:41:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:14:41:febtest:INFO:	Tsting FEB with SN 1017
11:14:43:smx_tester:INFO:	Scanning setup
11:14:43:elinks:INFO:	Disabling clock on downlink 0
11:14:43:elinks:INFO:	Disabling clock on downlink 1
11:14:43:elinks:INFO:	Disabling clock on downlink 2
11:14:43:elinks:INFO:	Disabling clock on downlink 3
11:14:43:elinks:INFO:	Disabling clock on downlink 4
11:14:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:14:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:14:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:14:43:elinks:INFO:	Disabling clock on downlink 0
11:14:43:elinks:INFO:	Disabling clock on downlink 1
11:14:43:elinks:INFO:	Disabling clock on downlink 2
11:14:43:elinks:INFO:	Disabling clock on downlink 3
11:14:43:elinks:INFO:	Disabling clock on downlink 4
11:14:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:14:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:14:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:14:43:elinks:INFO:	Disabling clock on downlink 0
11:14:43:elinks:INFO:	Disabling clock on downlink 1
11:14:43:elinks:INFO:	Disabling clock on downlink 2
11:14:43:elinks:INFO:	Disabling clock on downlink 3
11:14:43:elinks:INFO:	Disabling clock on downlink 4
11:14:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:14:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:14:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:14:43:elinks:INFO:	Disabling clock on downlink 0
11:14:43:elinks:INFO:	Disabling clock on downlink 1
11:14:43:elinks:INFO:	Disabling clock on downlink 2
11:14:43:elinks:INFO:	Disabling clock on downlink 3
11:14:43:elinks:INFO:	Disabling clock on downlink 4
11:14:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:14:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:14:43:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 16
11:14:43:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 17
11:14:43:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 18
11:14:43:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 19
11:14:43:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 20
11:14:43:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 21
11:14:43:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 22
11:14:43:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 23
11:14:43:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 24
11:14:43:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 25
11:14:43:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 26
11:14:43:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 27
11:14:43:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 28
11:14:43:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 29
11:14:43:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 30
11:14:43:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 31
11:14:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:14:43:elinks:INFO:	Disabling clock on downlink 0
11:14:43:elinks:INFO:	Disabling clock on downlink 1
11:14:43:elinks:INFO:	Disabling clock on downlink 2
11:14:43:elinks:INFO:	Disabling clock on downlink 3
11:14:43:elinks:INFO:	Disabling clock on downlink 4
11:14:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:14:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
11:14:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:14:43:setup_element:INFO:	Scanning clock phase
11:14:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:14:44:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
11:14:44:setup_element:INFO:	Clock phase scan results for group 0, downlink 3
11:14:44:setup_element:INFO:	Eye window for uplink 16: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:14:44:setup_element:INFO:	Eye window for uplink 17: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:14:44:setup_element:INFO:	Eye window for uplink 18: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:14:44:setup_element:INFO:	Eye window for uplink 19: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:14:44:setup_element:INFO:	Eye window for uplink 20: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:14:44:setup_element:INFO:	Eye window for uplink 21: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:14:44:setup_element:INFO:	Eye window for uplink 22: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
11:14:44:setup_element:INFO:	Eye window for uplink 23: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
11:14:44:setup_element:INFO:	Eye window for uplink 24: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
11:14:44:setup_element:INFO:	Eye window for uplink 25: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
11:14:44:setup_element:INFO:	Eye window for uplink 26: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
11:14:44:setup_element:INFO:	Eye window for uplink 27: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
11:14:44:setup_element:INFO:	Eye window for uplink 28: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:14:44:setup_element:INFO:	Eye window for uplink 29: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:14:44:setup_element:INFO:	Eye window for uplink 30: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
11:14:44:setup_element:INFO:	Eye window for uplink 31: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
11:14:44:setup_element:INFO:	Setting the clock phase to 31 for group 0, downlink 3
11:14:44:setup_element:INFO:	Scanning data phases
11:14:44:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:14:44:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
11:14:49:setup_element:INFO:	Data phase scan results for group 0, downlink 3
11:14:49:setup_element:INFO:	Eye window for uplink 16: _________________XXXX___________________
Data delay found: 38
11:14:49:setup_element:INFO:	Eye window for uplink 17: _____________XXXX_______________________
Data delay found: 34
11:14:49:setup_element:INFO:	Eye window for uplink 18: _____________XXXXX______________________
Data delay found: 35
11:14:49:setup_element:INFO:	Eye window for uplink 19: __________XXXXX_________________________
Data delay found: 32
11:14:49:setup_element:INFO:	Eye window for uplink 20: _________XXXX___________________________
Data delay found: 30
11:14:49:setup_element:INFO:	Eye window for uplink 21: ______XXXXXX____________________________
Data delay found: 28
11:14:49:setup_element:INFO:	Eye window for uplink 22: ____XXXXX_______________________________
Data delay found: 26
11:14:49:setup_element:INFO:	Eye window for uplink 23: _XXXXX__________________________________
Data delay found: 23
11:14:49:setup_element:INFO:	Eye window for uplink 24: X_________________________________XXXXXX
Data delay found: 17
11:14:49:setup_element:INFO:	Eye window for uplink 25: XXX___________________________________XX
Data delay found: 20
11:14:49:setup_element:INFO:	Eye window for uplink 26: ________________________________XXXXX___
Data delay found: 14
11:14:49:setup_element:INFO:	Eye window for uplink 27: XXXX_________________________________XXX
Data delay found: 20
11:14:49:setup_element:INFO:	Eye window for uplink 28: X___________________________________XXXX
Data delay found: 18
11:14:49:setup_element:INFO:	Eye window for uplink 29: XXXX_________________________________XXX
Data delay found: 20
11:14:49:setup_element:INFO:	Eye window for uplink 30: X__________________________________XXXXX
Data delay found: 17
11:14:49:setup_element:INFO:	Eye window for uplink 31: _________________________________XXXXXX_
Data delay found: 15
11:14:49:setup_element:INFO:	Setting the data phase to 38 for uplink 16
11:14:49:setup_element:INFO:	Setting the data phase to 34 for uplink 17
11:14:49:setup_element:INFO:	Setting the data phase to 35 for uplink 18
11:14:49:setup_element:INFO:	Setting the data phase to 32 for uplink 19
11:14:49:setup_element:INFO:	Setting the data phase to 30 for uplink 20
11:14:49:setup_element:INFO:	Setting the data phase to 28 for uplink 21
11:14:49:setup_element:INFO:	Setting the data phase to 26 for uplink 22
11:14:49:setup_element:INFO:	Setting the data phase to 23 for uplink 23
11:14:49:setup_element:INFO:	Setting the data phase to 17 for uplink 24
11:14:49:setup_element:INFO:	Setting the data phase to 20 for uplink 25
11:14:49:setup_element:INFO:	Setting the data phase to 14 for uplink 26
11:14:49:setup_element:INFO:	Setting the data phase to 20 for uplink 27
11:14:49:setup_element:INFO:	Setting the data phase to 18 for uplink 28
11:14:49:setup_element:INFO:	Setting the data phase to 20 for uplink 29
11:14:49:setup_element:INFO:	Setting the data phase to 17 for uplink 30
11:14:49:setup_element:INFO:	Setting the data phase to 15 for uplink 31
11:14:49:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 31
    Window Length: 71
    Eye Windows:
      Uplink 16: _____________________________________________________________________XXXXXXX____
      Uplink 17: _____________________________________________________________________XXXXXXX____
      Uplink 18: _____________________________________________________________________XXXXXXX____
      Uplink 19: _____________________________________________________________________XXXXXXX____
      Uplink 20: ____________________________________________________________________XXXXXXXX____
      Uplink 21: ____________________________________________________________________XXXXXXXX____
      Uplink 22: ____________________________________________________________________XXXXXXX_____
      Uplink 23: ____________________________________________________________________XXXXXXX_____
      Uplink 24: ___________________________________________________________________XXXXXXXX_____
      Uplink 25: ___________________________________________________________________XXXXXXXX_____
      Uplink 26: ___________________________________________________________________XXXXXXX______
      Uplink 27: ___________________________________________________________________XXXXXXX______
      Uplink 28: ____________________________________________________________________XXXXXXXX____
      Uplink 29: ____________________________________________________________________XXXXXXXX____
      Uplink 30: ____________________________________________________________________XXXXXXX_____
      Uplink 31: ____________________________________________________________________XXXXXXX_____
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 38
      Window Length: 36
      Eye Window: _________________XXXX___________________
    Uplink 17:
      Optimal Phase: 34
      Window Length: 36
      Eye Window: _____________XXXX_______________________
    Uplink 18:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 19:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 20:
      Optimal Phase: 30
      Window Length: 36
      Eye Window: _________XXXX___________________________
    Uplink 21:
      Optimal Phase: 28
      Window Length: 34
      Eye Window: ______XXXXXX____________________________
    Uplink 22:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 23:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
    Uplink 24:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXXX
    Uplink 25:
      Optimal Phase: 20
      Window Length: 35
      Eye Window: XXX___________________________________XX
    Uplink 26:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 27:
      Optimal Phase: 20
      Window Length: 33
      Eye Window: XXXX_________________________________XXX
    Uplink 28:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 29:
      Optimal Phase: 20
      Window Length: 33
      Eye Window: XXXX_________________________________XXX
    Uplink 30:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 31:
      Optimal Phase: 15
      Window Length: 34
      Eye Window: _________________________________XXXXXX_
]
11:14:49:setup_element:INFO:	Beginning SMX ASICs map scan
11:14:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:14:49:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
11:14:49:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
11:14:49:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
11:14:49:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:14:49:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 17
11:14:49:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 16
11:14:50:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 24
11:14:50:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 25
11:14:50:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 19
11:14:50:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 18
11:14:50:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 26
11:14:50:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 27
11:14:50:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 21
11:14:50:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 20
11:14:50:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 28
11:14:50:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 29
11:14:50:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 23
11:14:51:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 22
11:14:51:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 30
11:14:51:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 31
11:14:52:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 24), (1, 25)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 30), (1, 31)
  Clock Phase Characteristic:
    Optimal Phase: 31
    Window Length: 71
    Eye Windows:
      Uplink 16: _____________________________________________________________________XXXXXXX____
      Uplink 17: _____________________________________________________________________XXXXXXX____
      Uplink 18: _____________________________________________________________________XXXXXXX____
      Uplink 19: _____________________________________________________________________XXXXXXX____
      Uplink 20: ____________________________________________________________________XXXXXXXX____
      Uplink 21: ____________________________________________________________________XXXXXXXX____
      Uplink 22: ____________________________________________________________________XXXXXXX_____
      Uplink 23: ____________________________________________________________________XXXXXXX_____
      Uplink 24: ___________________________________________________________________XXXXXXXX_____
      Uplink 25: ___________________________________________________________________XXXXXXXX_____
      Uplink 26: ___________________________________________________________________XXXXXXX______
      Uplink 27: ___________________________________________________________________XXXXXXX______
      Uplink 28: ____________________________________________________________________XXXXXXXX____
      Uplink 29: ____________________________________________________________________XXXXXXXX____
      Uplink 30: ____________________________________________________________________XXXXXXX_____
      Uplink 31: ____________________________________________________________________XXXXXXX_____
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 38
      Window Length: 36
      Eye Window: _________________XXXX___________________
    Uplink 17:
      Optimal Phase: 34
      Window Length: 36
      Eye Window: _____________XXXX_______________________
    Uplink 18:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 19:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 20:
      Optimal Phase: 30
      Window Length: 36
      Eye Window: _________XXXX___________________________
    Uplink 21:
      Optimal Phase: 28
      Window Length: 34
      Eye Window: ______XXXXXX____________________________
    Uplink 22:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 23:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
    Uplink 24:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXXX
    Uplink 25:
      Optimal Phase: 20
      Window Length: 35
      Eye Window: XXX___________________________________XX
    Uplink 26:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 27:
      Optimal Phase: 20
      Window Length: 33
      Eye Window: XXXX_________________________________XXX
    Uplink 28:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 29:
      Optimal Phase: 20
      Window Length: 33
      Eye Window: XXXX_________________________________XXX
    Uplink 30:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 31:
      Optimal Phase: 15
      Window Length: 34
      Eye Window: _________________________________XXXXXX_

11:14:52:setup_element:INFO:	Performing Elink synchronization
11:14:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:14:52:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
11:14:52:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
11:14:52:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
11:14:52:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 3
11:14:52:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:14:52:ST3_emu:INFO:	Number of chips: 8
11:14:52:ST3_emu:INFO:	Chip address:  	0x0
11:14:52:ST3_emu:INFO:	Chip address:  	0x1
11:14:52:ST3_emu:INFO:	Chip address:  	0x2
11:14:52:ST3_emu:INFO:	Chip address:  	0x3
11:14:52:ST3_emu:INFO:	Chip address:  	0x4
11:14:52:ST3_emu:INFO:	Chip address:  	0x5
11:14:52:ST3_emu:INFO:	Chip address:  	0x6
11:14:52:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_0
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_2
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_3
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_4
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_6
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
11:14:53:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
11:14:53:febtest:INFO:	0-0 | XA-000-08-002-001-006-226-02 |  28.2 | 1218.6
11:14:54:febtest:INFO:	0-1 | XA-000-08-002-001-006-239-02 |  25.1 | 1230.3
11:14:54:febtest:INFO:	0-2 | XA-000-08-002-001-006-230-02 |  31.4 | 1212.7
11:14:54:febtest:INFO:	0-3 | XA-000-08-002-001-006-241-05 |  44.1 | 1171.5
11:14:54:febtest:INFO:	0-4 | XA-000-08-002-001-006-228-02 |  28.2 | 1218.6
11:14:54:febtest:INFO:	0-5 | XA-000-08-002-001-006-222-11 |  34.6 | 1195.1
11:14:55:febtest:INFO:	0-6 | XA-000-08-002-001-006-233-02 |  31.4 | 1212.7
11:14:55:febtest:INFO:	0-7 | XA-000-08-002-001-006-224-02 |  31.4 | 1201.0
11:14:55:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:14:59:ST3_smx:INFO:	chip: 0-0 	 34.556970 C 	 1189.190035 mV
11:14:59:ST3_smx:INFO:	PROCESS 2: Checking channel response with internal pulse
11:14:59:ST3_smx:INFO:		Electrons
11:14:59:ST3_smx:INFO:			Injected pulses: 200LSB, amp_cal 11.200000 fC
11:15:01:ST3_smx:INFO:	----> Checking Analog response
11:15:01:ST3_smx:INFO:	----> Checking broken channels
11:15:01:ST3_smx:INFO:	Total # broken ch: 3
11:15:01:ST3_smx:INFO:	List FAST: [91, 92, 117]
11:15:01:ST3_smx:INFO:	List SLOW: []
11:15:01:ST3_smx:INFO:		Holes
11:15:01:ST3_smx:INFO:			Injected pulses: 200LSB, amp_cal 11.200000 fC
11:15:03:ST3_smx:INFO:	----> Checking Analog response
11:15:03:ST3_smx:INFO:	----> Checking broken channels
11:15:04:ST3_smx:INFO:	Total # broken ch: 3
11:15:04:ST3_smx:INFO:	List FAST: [91, 92, 117]
11:15:04:ST3_smx:INFO:	List SLOW: []
11:15:04:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
11:15:04:febtest:INFO:	0-0 | XA-000-08-002-001-006-226-02 |  34.6 | 1183.3
11:15:04:febtest:INFO:	0-1 | XA-000-08-002-001-006-239-02 |  25.1 | 1230.3
11:15:04:febtest:INFO:	0-2 | XA-000-08-002-001-006-230-02 |  34.6 | 1212.7
11:15:05:febtest:INFO:	0-3 | XA-000-08-002-001-006-241-05 |  44.1 | 1165.6
11:15:05:febtest:INFO:	0-4 | XA-000-08-002-001-006-228-02 |  28.2 | 1218.6
11:15:05:febtest:INFO:	0-5 | XA-000-08-002-001-006-222-11 |  34.6 | 1189.2
11:15:05:febtest:INFO:	0-6 | XA-000-08-002-001-006-233-02 |  31.4 | 1212.7
11:15:05:febtest:INFO:	0-7 | XA-000-08-002-001-006-224-02 |  31.4 | 1201.0
11:15:06:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:15:10:ST3_smx:INFO:	chip: 0-1 	 18.745682 C 	 1242.040240 mV
11:15:10:ST3_smx:INFO:	PROCESS 2: Checking channel response with internal pulse
11:15:10:ST3_smx:INFO:		Electrons
11:15:10:ST3_smx:INFO:			Injected pulses: 200LSB, amp_cal 11.200000 fC
11:15:12:ST3_smx:INFO:	----> Checking Analog response
11:15:12:ST3_smx:INFO:	----> Checking broken channels
11:15:12:ST3_smx:INFO:	Total # broken ch: 1
11:15:12:ST3_smx:INFO:	List FAST: [37]
11:15:12:ST3_smx:INFO:	List SLOW: []
11:15:12:ST3_smx:INFO:		Holes
11:15:12:ST3_smx:INFO:			Injected pulses: 200LSB, amp_cal 11.200000 fC
11:15:14:ST3_smx:INFO:	----> Checking Analog response
11:15:14:ST3_smx:INFO:	----> Checking broken channels
11:15:15:ST3_smx:INFO:	Total # broken ch: 1
11:15:15:ST3_smx:INFO:	List FAST: [37]
11:15:15:ST3_smx:INFO:	List SLOW: []
11:15:15:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
11:15:15:febtest:INFO:	0-0 | XA-000-08-002-001-006-226-02 |  37.7 | 1189.2
11:15:15:febtest:INFO:	0-1 | XA-000-08-002-001-006-239-02 |  21.9 | 1242.0
11:15:15:febtest:INFO:	0-2 | XA-000-08-002-001-006-230-02 |  34.6 | 1212.7
11:15:15:febtest:INFO:	0-3 | XA-000-08-002-001-006-241-05 |  47.3 | 1165.6
11:15:16:febtest:INFO:	0-4 | XA-000-08-002-001-006-228-02 |  31.4 | 1212.7
11:15:16:febtest:INFO:	0-5 | XA-000-08-002-001-006-222-11 |  34.6 | 1189.2
11:15:16:febtest:INFO:	0-6 | XA-000-08-002-001-006-233-02 |  31.4 | 1206.9
11:15:16:febtest:INFO:	0-7 | XA-000-08-002-001-006-224-02 |  34.6 | 1201.0
11:15:17:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:15:21:ST3_smx:INFO:	chip: 0-2 	 37.726682 C 	 1195.082160 mV
11:15:21:ST3_smx:INFO:	PROCESS 2: Checking channel response with internal pulse
11:15:21:ST3_smx:INFO:		Electrons
11:15:21:ST3_smx:INFO:			Injected pulses: 200LSB, amp_cal 11.200000 fC
11:15:23:ST3_smx:INFO:	----> Checking Analog response
11:15:23:ST3_smx:INFO:	----> Checking broken channels
11:15:23:ST3_smx:INFO:	Total # broken ch: 4
11:15:23:ST3_smx:INFO:	List FAST: [29, 63, 93, 117]
11:15:23:ST3_smx:INFO:	List SLOW: []
11:15:23:ST3_smx:INFO:		Holes
11:15:23:ST3_smx:INFO:			Injected pulses: 200LSB, amp_cal 11.200000 fC
11:15:25:ST3_smx:INFO:	----> Checking Analog response
11:15:25:ST3_smx:INFO:	----> Checking broken channels
11:15:25:ST3_smx:INFO:	Total # broken ch: 4
11:15:25:ST3_smx:INFO:	List FAST: [29, 63, 93, 117]
11:15:25:ST3_smx:INFO:	List SLOW: []
11:15:25:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
11:15:26:febtest:INFO:	0-0 | XA-000-08-002-001-006-226-02 |  37.7 | 1183.3
11:15:26:febtest:INFO:	0-1 | XA-000-08-002-001-006-239-02 |  21.9 | 1242.0
11:15:26:febtest:INFO:	0-2 | XA-000-08-002-001-006-230-02 |  37.7 | 1189.2
11:15:26:febtest:INFO:	0-3 | XA-000-08-002-001-006-241-05 |  47.3 | 1165.6
11:15:27:febtest:INFO:	0-4 | XA-000-08-002-001-006-228-02 |  31.4 | 1218.6
11:15:27:febtest:INFO:	0-5 | XA-000-08-002-001-006-222-11 |  37.7 | 1189.2
11:15:27:febtest:INFO:	0-6 | XA-000-08-002-001-006-233-02 |  31.4 | 1206.9
11:15:27:febtest:INFO:	0-7 | XA-000-08-002-001-006-224-02 |  34.6 | 1201.0
11:15:27:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:15:31:ST3_smx:INFO:	chip: 0-3 	 50.430383 C 	 1147.806000 mV
11:15:31:ST3_smx:INFO:	PROCESS 2: Checking channel response with internal pulse
11:15:31:ST3_smx:INFO:		Electrons
11:15:31:ST3_smx:INFO:			Injected pulses: 200LSB, amp_cal 11.200000 fC
11:15:33:ST3_smx:INFO:	----> Checking Analog response
11:15:33:ST3_smx:INFO:	----> Checking broken channels
11:15:34:ST3_smx:INFO:	Total # broken ch: 5
11:15:34:ST3_smx:INFO:	List FAST: [61, 67, 96, 107, 125]
11:15:34:ST3_smx:INFO:	List SLOW: []
11:15:34:ST3_smx:INFO:		Holes
11:15:34:ST3_smx:INFO:			Injected pulses: 200LSB, amp_cal 11.200000 fC
11:15:36:ST3_smx:INFO:	----> Checking Analog response
11:15:36:ST3_smx:INFO:	----> Checking broken channels
11:15:36:ST3_smx:INFO:	Total # broken ch: 5
11:15:36:ST3_smx:INFO:	List FAST: [61, 67, 96, 107, 125]
11:15:36:ST3_smx:INFO:	List SLOW: []
11:15:36:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
11:15:36:febtest:INFO:	0-0 | XA-000-08-002-001-006-226-02 |  40.9 | 1183.3
11:15:37:febtest:INFO:	0-1 | XA-000-08-002-001-006-239-02 |  21.9 | 1242.0
11:15:37:febtest:INFO:	0-2 | XA-000-08-002-001-006-230-02 |  40.9 | 1189.2
11:15:37:febtest:INFO:	0-3 | XA-000-08-002-001-006-241-05 |  53.6 | 1141.9
11:15:37:febtest:INFO:	0-4 | XA-000-08-002-001-006-228-02 |  31.4 | 1212.7
11:15:38:febtest:INFO:	0-5 | XA-000-08-002-001-006-222-11 |  37.7 | 1189.2
11:15:38:febtest:INFO:	0-6 | XA-000-08-002-001-006-233-02 |  31.4 | 1212.7
11:15:38:febtest:INFO:	0-7 | XA-000-08-002-001-006-224-02 |  34.6 | 1201.0
11:15:38:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:15:42:ST3_smx:INFO:	chip: 0-4 	 31.389742 C 	 1206.851500 mV
11:15:42:ST3_smx:INFO:	PROCESS 2: Checking channel response with internal pulse
11:15:42:ST3_smx:INFO:		Electrons
11:15:42:ST3_smx:INFO:			Injected pulses: 200LSB, amp_cal 11.200000 fC
11:15:44:ST3_smx:INFO:	----> Checking Analog response
11:15:44:ST3_smx:INFO:	----> Checking broken channels
11:15:45:ST3_smx:INFO:	Total # broken ch: 6
11:15:45:ST3_smx:INFO:	List FAST: [1, 23, 40, 84, 95, 120]
11:15:45:ST3_smx:INFO:	List SLOW: []
11:15:45:ST3_smx:INFO:		Holes
11:15:45:ST3_smx:INFO:			Injected pulses: 200LSB, amp_cal 11.200000 fC
11:15:47:ST3_smx:INFO:	----> Checking Analog response
11:15:47:ST3_smx:INFO:	----> Checking broken channels
11:15:47:ST3_smx:INFO:	Total # broken ch: 6
11:15:47:ST3_smx:INFO:	List FAST: [1, 23, 40, 84, 95, 120]
11:15:47:ST3_smx:INFO:	List SLOW: []
11:15:47:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
11:15:47:febtest:INFO:	0-0 | XA-000-08-002-001-006-226-02 |  40.9 | 1177.4
11:15:47:febtest:INFO:	0-1 | XA-000-08-002-001-006-239-02 |  25.1 | 1242.0
11:15:48:febtest:INFO:	0-2 | XA-000-08-002-001-006-230-02 |  40.9 | 1189.2
11:15:48:febtest:INFO:	0-3 | XA-000-08-002-001-006-241-05 |  53.6 | 1141.9
11:15:48:febtest:INFO:	0-4 | XA-000-08-002-001-006-228-02 |  34.6 | 1201.0
11:15:48:febtest:INFO:	0-5 | XA-000-08-002-001-006-222-11 |  37.7 | 1183.3
11:15:49:febtest:INFO:	0-6 | XA-000-08-002-001-006-233-02 |  34.6 | 1206.9
11:15:49:febtest:INFO:	0-7 | XA-000-08-002-001-006-224-02 |  34.6 | 1201.0
11:15:49:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:15:53:ST3_smx:INFO:	chip: 0-5 	 37.726682 C 	 1183.292940 mV
11:15:53:ST3_smx:INFO:	PROCESS 2: Checking channel response with internal pulse
11:15:53:ST3_smx:INFO:		Electrons
11:15:53:ST3_smx:INFO:			Injected pulses: 200LSB, amp_cal 11.200000 fC
11:15:55:ST3_smx:INFO:	----> Checking Analog response
11:15:55:ST3_smx:INFO:	----> Checking broken channels
11:15:55:ST3_smx:INFO:	Total # broken ch: 4
11:15:55:ST3_smx:INFO:	List FAST: [1, 51, 98, 99]
11:15:55:ST3_smx:INFO:	List SLOW: []
11:15:55:ST3_smx:INFO:		Holes
11:15:55:ST3_smx:INFO:			Injected pulses: 200LSB, amp_cal 11.200000 fC
11:15:57:ST3_smx:INFO:	----> Checking Analog response
11:15:57:ST3_smx:INFO:	----> Checking broken channels
11:15:58:ST3_smx:INFO:	Total # broken ch: 4
11:15:58:ST3_smx:INFO:	List FAST: [1, 51, 98, 99]
11:15:58:ST3_smx:INFO:	List SLOW: []
11:15:58:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
11:15:58:febtest:INFO:	0-0 | XA-000-08-002-001-006-226-02 |  40.9 | 1177.4
11:15:58:febtest:INFO:	0-1 | XA-000-08-002-001-006-239-02 |  25.1 | 1242.0
11:15:58:febtest:INFO:	0-2 | XA-000-08-002-001-006-230-02 |  40.9 | 1189.2
11:15:59:febtest:INFO:	0-3 | XA-000-08-002-001-006-241-05 |  53.6 | 1141.9
11:15:59:febtest:INFO:	0-4 | XA-000-08-002-001-006-228-02 |  34.6 | 1195.1
11:15:59:febtest:INFO:	0-5 | XA-000-08-002-001-006-222-11 |  40.9 | 1177.4
11:15:59:febtest:INFO:	0-6 | XA-000-08-002-001-006-233-02 |  34.6 | 1206.9
11:15:59:febtest:INFO:	0-7 | XA-000-08-002-001-006-224-02 |  34.6 | 1201.0
11:16:00:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:16:04:ST3_smx:INFO:	chip: 0-6 	 37.726682 C 	 1177.390875 mV
11:16:04:ST3_smx:INFO:	PROCESS 2: Checking channel response with internal pulse
11:16:04:ST3_smx:INFO:		Electrons
11:16:04:ST3_smx:INFO:			Injected pulses: 200LSB, amp_cal 11.200000 fC
11:16:06:ST3_smx:INFO:	----> Checking Analog response
11:16:06:ST3_smx:INFO:	----> Checking broken channels
11:16:06:ST3_smx:INFO:	Total # broken ch: 2
11:16:06:ST3_smx:INFO:	List FAST: [21, 51]
11:16:06:ST3_smx:INFO:	List SLOW: []
11:16:06:ST3_smx:INFO:		Holes
11:16:06:ST3_smx:INFO:			Injected pulses: 200LSB, amp_cal 11.200000 fC
11:16:08:ST3_smx:INFO:	----> Checking Analog response
11:16:08:ST3_smx:INFO:	----> Checking broken channels
11:16:08:ST3_smx:INFO:	Total # broken ch: 2
11:16:08:ST3_smx:INFO:	List FAST: [21, 51]
11:16:08:ST3_smx:INFO:	List SLOW: []
11:16:08:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
11:16:09:febtest:INFO:	0-0 | XA-000-08-002-001-006-226-02 |  40.9 | 1177.4
11:16:09:febtest:INFO:	0-1 | XA-000-08-002-001-006-239-02 |  25.1 | 1236.2
11:16:09:febtest:INFO:	0-2 | XA-000-08-002-001-006-230-02 |  40.9 | 1189.2
11:16:09:febtest:INFO:	0-3 | XA-000-08-002-001-006-241-05 |  53.6 | 1141.9
11:16:09:febtest:INFO:	0-4 | XA-000-08-002-001-006-228-02 |  34.6 | 1201.0
11:16:10:febtest:INFO:	0-5 | XA-000-08-002-001-006-222-11 |  40.9 | 1183.3
11:16:10:febtest:INFO:	0-6 | XA-000-08-002-001-006-233-02 |  40.9 | 1177.4
11:16:10:febtest:INFO:	0-7 | XA-000-08-002-001-006-224-02 |  34.6 | 1195.1
11:16:10:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:16:14:ST3_smx:INFO:	chip: 0-7 	 34.556970 C 	 1195.082160 mV
11:16:14:ST3_smx:INFO:	PROCESS 2: Checking channel response with internal pulse
11:16:14:ST3_smx:INFO:		Electrons
11:16:14:ST3_smx:INFO:			Injected pulses: 200LSB, amp_cal 11.200000 fC
11:16:16:ST3_smx:INFO:	----> Checking Analog response
11:16:16:ST3_smx:INFO:	----> Checking broken channels
11:16:17:ST3_smx:INFO:	Total # broken ch: 1
11:16:17:ST3_smx:INFO:	List FAST: [12]
11:16:17:ST3_smx:INFO:	List SLOW: []
11:16:17:ST3_smx:INFO:		Holes
11:16:17:ST3_smx:INFO:			Injected pulses: 200LSB, amp_cal 11.200000 fC
11:16:19:ST3_smx:INFO:	----> Checking Analog response
11:16:19:ST3_smx:INFO:	----> Checking broken channels
11:16:19:ST3_smx:INFO:	Total # broken ch: 1
11:16:19:ST3_smx:INFO:	List FAST: [12]
11:16:19:ST3_smx:INFO:	List SLOW: []
11:16:19:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
11:16:19:febtest:INFO:	0-0 | XA-000-08-002-001-006-226-02 |  40.9 | 1177.4
11:16:19:febtest:INFO:	0-1 | XA-000-08-002-001-006-239-02 |  25.1 | 1236.2
11:16:20:febtest:INFO:	0-2 | XA-000-08-002-001-006-230-02 |  40.9 | 1189.2
11:16:20:febtest:INFO:	0-3 | XA-000-08-002-001-006-241-05 |  56.8 | 1141.9
11:16:20:febtest:INFO:	0-4 | XA-000-08-002-001-006-228-02 |  37.7 | 1201.0
11:16:20:febtest:INFO:	0-5 | XA-000-08-002-001-006-222-11 |  40.9 | 1177.4
11:16:21:febtest:INFO:	0-6 | XA-000-08-002-001-006-233-02 |  40.9 | 1177.4
11:16:21:febtest:INFO:	0-7 | XA-000-08-002-001-006-224-02 |  37.7 | 1189.2
############################################################
#                   S U M M A R Y                          #
############################################################
{'TEST_NAME': 'FEB-ASIC', 'TEST_DATE': '2023_09_05-11_14_41', 'OPERATOR': 'Oleksandr S.; ', 'PROJECT': 'Production', 'SITE': 'GSI', 'SETUP': 'GSI_TEST_SETUP_1', 'ASIC_ID': 'XA-000-08-002-001-006-224-02', 'FUSED_ID': 6359364699117612546, 'HW_ADDR': 7, 'VERS_NO': '2.2', 'CABLE_SET_ID': '', 'IC_TEMP': '0', 'VDDM': '0', 'AUX': '0', 'CSABIAS': '0', 'VDDM_INT': '0', 'ADC_Chi2': 0.0, 'ADC_NDF': 0, 'ADC_P0': 0.0, 'ADC_P1': 0.006824, 'ADC_P2': -2.485e-06, 'ADC_P0err': 0.001, 'ADC_P1err': 0.001, 'ADC_P2err': 1e-05, 'ADC_VREF_P': 58, 'ADC_VREF_N': 30, 'ADC_VREF_T': 128, 'ADC_VREF_TR': 122, 'THR2_GLB': 30, 'LOOP__PLS': 100, 'CALIB_PLS': 250, 'SnsLoop': 5, 'IFED': 31, 'CSA_BIAS': 15, 'CSA_Chi2': 0.0, 'CSA_NDF': 0, 'CSA_P0': 0.0, 'CSA_P1': 0.0, 'CSA_P2': 0.0, 'CSA_P0err': 0.0, 'CSA_P1err': 0.0, 'CSA_P2err': 0.0, 'CONF_FAIL_REG': 0, 'N_BROKEN_DISC': 1, 'N_BROKEN_FAST': '[12]', 'N_BROKEN_SLOW': '[]', 'P_BROKEN_DISC': 1, 'P_BROKEN_FAST': '[12]', 'P_BROKEN_SLOW': '[]', 'ASIC_QA_category': '', 'N_BROKEN_CABLE': 0, 'LIST_OF_BROKEN_CABLES': 0, 'VI_bInit': ['2.447', '1.9960', '1.846', '2.4110', '7.001', '1.5540', '7.001', '1.5540'], 'VI_aInit': ['0', '0', '0', '0', '0', '0'], 'VI_atEnd': ['0', '0', '0', '0', '0', '0'], 'AMP_CAL': 200, 'PlsLoop': 3, 'N_ANA_PRESENT': 'Analog response OK', 'N_DISC_FAIL_CH': 0, 'N_ANA_FAIL_CH': '0', 'P_ANA_PRESENT': 'Analog response OK', 'P_DISC_FAIL_CH': 0, 'P_ANA_FAIL_CH': '0'}
===============================

{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 200, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 200, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 200, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 200, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 200, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 200, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 200, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 200, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

11:16:26:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:16:26:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
11:16:26:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:16:26:febtest:INFO:	Tsting FEB with SN 1017
11:16:28:smx_tester:INFO:	Scanning setup
11:16:28:elinks:INFO:	Disabling clock on downlink 0
11:16:28:elinks:INFO:	Disabling clock on downlink 1
11:16:28:elinks:INFO:	Disabling clock on downlink 2
11:16:28:elinks:INFO:	Disabling clock on downlink 3
11:16:28:elinks:INFO:	Disabling clock on downlink 4
11:16:28:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:16:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:16:28:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:16:28:elinks:INFO:	Disabling clock on downlink 0
11:16:28:elinks:INFO:	Disabling clock on downlink 1
11:16:28:elinks:INFO:	Disabling clock on downlink 2
11:16:28:elinks:INFO:	Disabling clock on downlink 3
11:16:28:elinks:INFO:	Disabling clock on downlink 4
11:16:28:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:16:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:16:28:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:16:28:elinks:INFO:	Disabling clock on downlink 0
11:16:28:elinks:INFO:	Disabling clock on downlink 1
11:16:28:elinks:INFO:	Disabling clock on downlink 2
11:16:28:elinks:INFO:	Disabling clock on downlink 3
11:16:28:elinks:INFO:	Disabling clock on downlink 4
11:16:28:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:16:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:16:28:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:16:28:elinks:INFO:	Disabling clock on downlink 0
11:16:28:elinks:INFO:	Disabling clock on downlink 1
11:16:28:elinks:INFO:	Disabling clock on downlink 2
11:16:28:elinks:INFO:	Disabling clock on downlink 3
11:16:28:elinks:INFO:	Disabling clock on downlink 4
11:16:28:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:16:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:16:28:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 16
11:16:28:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 17
11:16:28:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 18
11:16:28:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 19
11:16:28:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 20
11:16:28:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 21
11:16:28:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 22
11:16:28:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 23
11:16:28:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 24
11:16:28:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 25
11:16:28:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 26
11:16:28:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 27
11:16:28:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 28
11:16:28:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 29
11:16:28:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 30
11:16:28:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 31
11:16:28:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:16:28:elinks:INFO:	Disabling clock on downlink 0
11:16:28:elinks:INFO:	Disabling clock on downlink 1
11:16:28:elinks:INFO:	Disabling clock on downlink 2
11:16:28:elinks:INFO:	Disabling clock on downlink 3
11:16:28:elinks:INFO:	Disabling clock on downlink 4
11:16:28:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:16:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
11:16:28:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:16:28:setup_element:INFO:	Scanning clock phase
11:16:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:16:28:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
11:16:29:setup_element:INFO:	Clock phase scan results for group 0, downlink 3
11:16:29:setup_element:INFO:	Eye window for uplink 16: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:16:29:setup_element:INFO:	Eye window for uplink 17: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:16:29:setup_element:INFO:	Eye window for uplink 18: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:16:29:setup_element:INFO:	Eye window for uplink 19: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
11:16:29:setup_element:INFO:	Eye window for uplink 20: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:16:29:setup_element:INFO:	Eye window for uplink 21: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:16:29:setup_element:INFO:	Eye window for uplink 22: ____________________________________________________________________XXXXXX______
Clock Delay: 30
11:16:29:setup_element:INFO:	Eye window for uplink 23: ____________________________________________________________________XXXXXX______
Clock Delay: 30
11:16:29:setup_element:INFO:	Eye window for uplink 24: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
11:16:29:setup_element:INFO:	Eye window for uplink 25: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
11:16:29:setup_element:INFO:	Eye window for uplink 26: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
11:16:29:setup_element:INFO:	Eye window for uplink 27: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
11:16:29:setup_element:INFO:	Eye window for uplink 28: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:16:29:setup_element:INFO:	Eye window for uplink 29: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:16:29:setup_element:INFO:	Eye window for uplink 30: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
11:16:29:setup_element:INFO:	Eye window for uplink 31: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
11:16:29:setup_element:INFO:	Setting the clock phase to 30 for group 0, downlink 3
11:16:29:setup_element:INFO:	Scanning data phases
11:16:29:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:16:29:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
11:16:34:setup_element:INFO:	Data phase scan results for group 0, downlink 3
11:16:34:setup_element:INFO:	Eye window for uplink 16: _________________XXXX___________________
Data delay found: 38
11:16:34:setup_element:INFO:	Eye window for uplink 17: _____________XXXX_______________________
Data delay found: 34
11:16:34:setup_element:INFO:	Eye window for uplink 18: ______________XXXX______________________
Data delay found: 35
11:16:34:setup_element:INFO:	Eye window for uplink 19: ___________XXXX_________________________
Data delay found: 32
11:16:34:setup_element:INFO:	Eye window for uplink 20: _________XXXX___________________________
Data delay found: 30
11:16:34:setup_element:INFO:	Eye window for uplink 21: _______XXXXX____________________________
Data delay found: 29
11:16:34:setup_element:INFO:	Eye window for uplink 22: _____XXXXX______________________________
Data delay found: 27
11:16:34:setup_element:INFO:	Eye window for uplink 23: __XXXXX_________________________________
Data delay found: 24
11:16:34:setup_element:INFO:	Eye window for uplink 24: X__________________________________XXXXX
Data delay found: 17
11:16:34:setup_element:INFO:	Eye window for uplink 25: XXXX__________________________________XX
Data delay found: 20
11:16:34:setup_element:INFO:	Eye window for uplink 26: __________________________________XXXXX_
Data delay found: 16
11:16:34:setup_element:INFO:	Eye window for uplink 27: XXXX__________________________________XX
Data delay found: 20
11:16:34:setup_element:INFO:	Eye window for uplink 28: XXX_________________________________XXXX
Data delay found: 19
11:16:34:setup_element:INFO:	Eye window for uplink 29: XXXXX_________________________________XX
Data delay found: 21
11:16:34:setup_element:INFO:	Eye window for uplink 30: XX__________________________________XXXX
Data delay found: 18
11:16:34:setup_element:INFO:	Eye window for uplink 31: X_________________________________XXXXX_
Data delay found: 17
11:16:34:setup_element:INFO:	Setting the data phase to 38 for uplink 16
11:16:34:setup_element:INFO:	Setting the data phase to 34 for uplink 17
11:16:34:setup_element:INFO:	Setting the data phase to 35 for uplink 18
11:16:34:setup_element:INFO:	Setting the data phase to 32 for uplink 19
11:16:34:setup_element:INFO:	Setting the data phase to 30 for uplink 20
11:16:34:setup_element:INFO:	Setting the data phase to 29 for uplink 21
11:16:34:setup_element:INFO:	Setting the data phase to 27 for uplink 22
11:16:34:setup_element:INFO:	Setting the data phase to 24 for uplink 23
11:16:34:setup_element:INFO:	Setting the data phase to 17 for uplink 24
11:16:34:setup_element:INFO:	Setting the data phase to 20 for uplink 25
11:16:34:setup_element:INFO:	Setting the data phase to 16 for uplink 26
11:16:34:setup_element:INFO:	Setting the data phase to 20 for uplink 27
11:16:34:setup_element:INFO:	Setting the data phase to 19 for uplink 28
11:16:34:setup_element:INFO:	Setting the data phase to 21 for uplink 29
11:16:34:setup_element:INFO:	Setting the data phase to 18 for uplink 30
11:16:34:setup_element:INFO:	Setting the data phase to 17 for uplink 31
11:16:34:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 30
    Window Length: 70
    Eye Windows:
      Uplink 16: ____________________________________________________________________XXXXXXXX____
      Uplink 17: ____________________________________________________________________XXXXXXXX____
      Uplink 18: _____________________________________________________________________XXXXXXX____
      Uplink 19: _____________________________________________________________________XXXXXXX____
      Uplink 20: ____________________________________________________________________XXXXXXXX____
      Uplink 21: ____________________________________________________________________XXXXXXXX____
      Uplink 22: ____________________________________________________________________XXXXXX______
      Uplink 23: ____________________________________________________________________XXXXXX______
      Uplink 24: ___________________________________________________________________XXXXXXXX_____
      Uplink 25: ___________________________________________________________________XXXXXXXX_____
      Uplink 26: __________________________________________________________________XXXXXXXXX_____
      Uplink 27: __________________________________________________________________XXXXXXXXX_____
      Uplink 28: ____________________________________________________________________XXXXXXXX____
      Uplink 29: ____________________________________________________________________XXXXXXXX____
      Uplink 30: ____________________________________________________________________XXXXXXX_____
      Uplink 31: ____________________________________________________________________XXXXXXX_____
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 38
      Window Length: 36
      Eye Window: _________________XXXX___________________
    Uplink 17:
      Optimal Phase: 34
      Window Length: 36
      Eye Window: _____________XXXX_______________________
    Uplink 18:
      Optimal Phase: 35
      Window Length: 36
      Eye Window: ______________XXXX______________________
    Uplink 19:
      Optimal Phase: 32
      Window Length: 36
      Eye Window: ___________XXXX_________________________
    Uplink 20:
      Optimal Phase: 30
      Window Length: 36
      Eye Window: _________XXXX___________________________
    Uplink 21:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 22:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 23:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 24:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 25:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 26:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 27:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 28:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX
    Uplink 29:
      Optimal Phase: 21
      Window Length: 33
      Eye Window: XXXXX_________________________________XX
    Uplink 30:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 31:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXX_
]
11:16:34:setup_element:INFO:	Beginning SMX ASICs map scan
11:16:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:16:34:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
11:16:34:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
11:16:34:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
11:16:34:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:16:34:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 17
11:16:34:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 16
11:16:34:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 24
11:16:35:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 25
11:16:35:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 19
11:16:35:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 18
11:16:35:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 26
11:16:35:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 27
11:16:35:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 21
11:16:35:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 20
11:16:35:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 28
11:16:35:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 29
11:16:35:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 23
11:16:35:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 22
11:16:36:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 30
11:16:36:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 31
11:16:37:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 24), (1, 25)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 30), (1, 31)
  Clock Phase Characteristic:
    Optimal Phase: 30
    Window Length: 70
    Eye Windows:
      Uplink 16: ____________________________________________________________________XXXXXXXX____
      Uplink 17: ____________________________________________________________________XXXXXXXX____
      Uplink 18: _____________________________________________________________________XXXXXXX____
      Uplink 19: _____________________________________________________________________XXXXXXX____
      Uplink 20: ____________________________________________________________________XXXXXXXX____
      Uplink 21: ____________________________________________________________________XXXXXXXX____
      Uplink 22: ____________________________________________________________________XXXXXX______
      Uplink 23: ____________________________________________________________________XXXXXX______
      Uplink 24: ___________________________________________________________________XXXXXXXX_____
      Uplink 25: ___________________________________________________________________XXXXXXXX_____
      Uplink 26: __________________________________________________________________XXXXXXXXX_____
      Uplink 27: __________________________________________________________________XXXXXXXXX_____
      Uplink 28: ____________________________________________________________________XXXXXXXX____
      Uplink 29: ____________________________________________________________________XXXXXXXX____
      Uplink 30: ____________________________________________________________________XXXXXXX_____
      Uplink 31: ____________________________________________________________________XXXXXXX_____
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 38
      Window Length: 36
      Eye Window: _________________XXXX___________________
    Uplink 17:
      Optimal Phase: 34
      Window Length: 36
      Eye Window: _____________XXXX_______________________
    Uplink 18:
      Optimal Phase: 35
      Window Length: 36
      Eye Window: ______________XXXX______________________
    Uplink 19:
      Optimal Phase: 32
      Window Length: 36
      Eye Window: ___________XXXX_________________________
    Uplink 20:
      Optimal Phase: 30
      Window Length: 36
      Eye Window: _________XXXX___________________________
    Uplink 21:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 22:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 23:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 24:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 25:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 26:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 27:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 28:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX
    Uplink 29:
      Optimal Phase: 21
      Window Length: 33
      Eye Window: XXXXX_________________________________XX
    Uplink 30:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 31:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXX_

11:16:37:setup_element:INFO:	Performing Elink synchronization
11:16:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:16:37:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
11:16:37:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
11:16:37:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
11:16:37:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 3
11:16:37:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:16:37:ST3_emu:INFO:	Number of chips: 8
11:16:37:ST3_emu:INFO:	Chip address:  	0x0
11:16:37:ST3_emu:INFO:	Chip address:  	0x1
11:16:37:ST3_emu:INFO:	Chip address:  	0x2
11:16:37:ST3_emu:INFO:	Chip address:  	0x3
11:16:37:ST3_emu:INFO:	Chip address:  	0x4
11:16:37:ST3_emu:INFO:	Chip address:  	0x5
11:16:37:ST3_emu:INFO:	Chip address:  	0x6
11:16:37:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_0
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_2
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_3
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_4
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_6
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
11:16:38:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
11:16:38:febtest:INFO:	0-0 | XA-000-08-002-001-006-226-02 |  37.7 | 1212.7
11:16:38:febtest:INFO:	0-1 | XA-000-08-002-001-006-239-02 |  31.4 | 1236.2
11:16:39:febtest:INFO:	0-2 | XA-000-08-002-001-006-230-02 |  40.9 | 1212.7
11:16:39:febtest:INFO:	0-3 | XA-000-08-002-001-006-241-05 |  53.6 | 1165.6
11:16:39:febtest:INFO:	0-4 | XA-000-08-002-001-006-228-02 |  34.6 | 1218.6
11:16:39:febtest:INFO:	0-5 | XA-000-08-002-001-006-222-11 |  40.9 | 1189.2
11:16:39:febtest:INFO:	0-6 | XA-000-08-002-001-006-233-02 |  34.6 | 1212.7
11:16:40:febtest:INFO:	0-7 | XA-000-08-002-001-006-224-02 |  37.7 | 1201.0
11:16:40:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:16:44:ST3_smx:INFO:	chip: 0-0 	 40.898880 C 	 1189.190035 mV
11:16:44:ST3_smx:INFO:	# loops 0
11:16:45:ST3_smx:INFO:	# loops 1
11:16:47:ST3_smx:INFO:	# loops 2
11:16:49:ST3_smx:INFO:	# loops 3
11:16:50:ST3_smx:INFO:	# loops 4
11:16:52:ST3_smx:INFO:	Total # of broken channels: 0
11:16:52:ST3_smx:INFO:	List of broken channels: []
11:16:52:ST3_smx:INFO:	Total # of broken channels: 0
11:16:52:ST3_smx:INFO:	List of broken channels: []
11:16:53:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:16:57:ST3_smx:INFO:	chip: 0-1 	 25.062742 C 	 1242.040240 mV
11:16:57:ST3_smx:INFO:	# loops 0
11:16:58:ST3_smx:INFO:	# loops 1
11:17:00:ST3_smx:INFO:	# loops 2
11:17:02:ST3_smx:INFO:	# loops 3
11:17:03:ST3_smx:INFO:	# loops 4
11:17:05:ST3_smx:INFO:	Total # of broken channels: 0
11:17:05:ST3_smx:INFO:	List of broken channels: []
11:17:05:ST3_smx:INFO:	Total # of broken channels: 0
11:17:05:ST3_smx:INFO:	List of broken channels: []
11:17:06:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:17:10:ST3_smx:INFO:	chip: 0-2 	 40.898880 C 	 1195.082160 mV
11:17:10:ST3_smx:INFO:	# loops 0
11:17:11:ST3_smx:INFO:	# loops 1
11:17:13:ST3_smx:INFO:	# loops 2
11:17:15:ST3_smx:INFO:	# loops 3
11:17:17:ST3_smx:INFO:	# loops 4
11:17:18:ST3_smx:INFO:	Total # of broken channels: 0
11:17:18:ST3_smx:INFO:	List of broken channels: []
11:17:18:ST3_smx:INFO:	Total # of broken channels: 0
11:17:18:ST3_smx:INFO:	List of broken channels: []
11:17:19:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:17:23:ST3_smx:INFO:	chip: 0-3 	 53.612520 C 	 1147.806000 mV
11:17:23:ST3_smx:INFO:	# loops 0
11:17:24:ST3_smx:INFO:	# loops 1
11:17:26:ST3_smx:INFO:	# loops 2
11:17:28:ST3_smx:INFO:	# loops 3
11:17:30:ST3_smx:INFO:	# loops 4
11:17:31:ST3_smx:INFO:	Total # of broken channels: 0
11:17:31:ST3_smx:INFO:	List of broken channels: []
11:17:31:ST3_smx:INFO:	Total # of broken channels: 0
11:17:31:ST3_smx:INFO:	List of broken channels: []
11:17:32:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:17:36:ST3_smx:INFO:	chip: 0-4 	 34.556970 C 	 1200.969315 mV
11:17:36:ST3_smx:INFO:	# loops 0
11:17:37:ST3_smx:INFO:	# loops 1
11:17:39:ST3_smx:INFO:	# loops 2
11:17:41:ST3_smx:INFO:	# loops 3
11:17:42:ST3_smx:INFO:	# loops 4
11:17:44:ST3_smx:INFO:	Total # of broken channels: 0
11:17:44:ST3_smx:INFO:	List of broken channels: []
11:17:44:ST3_smx:INFO:	Total # of broken channels: 0
11:17:44:ST3_smx:INFO:	List of broken channels: []
11:17:45:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:17:48:ST3_smx:INFO:	chip: 0-5 	 40.898880 C 	 1177.390875 mV
11:17:48:ST3_smx:INFO:	# loops 0
11:17:50:ST3_smx:INFO:	# loops 1
11:17:52:ST3_smx:INFO:	# loops 2
11:17:54:ST3_smx:INFO:	# loops 3
11:17:55:ST3_smx:INFO:	# loops 4
11:17:57:ST3_smx:INFO:	Total # of broken channels: 0
11:17:57:ST3_smx:INFO:	List of broken channels: []
11:17:57:ST3_smx:INFO:	Total # of broken channels: 0
11:17:57:ST3_smx:INFO:	List of broken channels: []
11:17:58:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:18:01:ST3_smx:INFO:	chip: 0-6 	 40.898880 C 	 1177.390875 mV
11:18:01:ST3_smx:INFO:	# loops 0
11:18:03:ST3_smx:INFO:	# loops 1
11:18:05:ST3_smx:INFO:	# loops 2
11:18:07:ST3_smx:INFO:	# loops 3
11:18:08:ST3_smx:INFO:	# loops 4
11:18:10:ST3_smx:INFO:	Total # of broken channels: 0
11:18:10:ST3_smx:INFO:	List of broken channels: []
11:18:10:ST3_smx:INFO:	Total # of broken channels: 0
11:18:10:ST3_smx:INFO:	List of broken channels: []
11:18:11:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:18:14:ST3_smx:INFO:	chip: 0-7 	 37.726682 C 	 1195.082160 mV
11:18:14:ST3_smx:INFO:	# loops 0
11:18:16:ST3_smx:INFO:	# loops 1
11:18:18:ST3_smx:INFO:	# loops 2
11:18:20:ST3_smx:INFO:	# loops 3
11:18:21:ST3_smx:INFO:	# loops 4
11:18:23:ST3_smx:INFO:	Total # of broken channels: 0
11:18:23:ST3_smx:INFO:	List of broken channels: []
11:18:23:ST3_smx:INFO:	Total # of broken channels: 0
11:18:23:ST3_smx:INFO:	List of broken channels: []
11:18:24:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
11:18:24:febtest:INFO:	0-0 | XA-000-08-002-001-006-226-02 |  47.3 | 1177.4
11:18:24:febtest:INFO:	0-1 | XA-000-08-002-001-006-239-02 |  28.2 | 1236.2
11:18:24:febtest:INFO:	0-2 | XA-000-08-002-001-006-230-02 |  44.1 | 1189.2
11:18:25:febtest:INFO:	0-3 | XA-000-08-002-001-006-241-05 |  56.8 | 1141.9
11:18:25:febtest:INFO:	0-4 | XA-000-08-002-001-006-228-02 |  37.7 | 1201.0
11:18:25:febtest:INFO:	0-5 | XA-000-08-002-001-006-222-11 |  44.1 | 1177.4
11:18:25:febtest:INFO:	0-6 | XA-000-08-002-001-006-233-02 |  44.1 | 1177.4
11:18:25:febtest:INFO:	0-7 | XA-000-08-002-001-006-224-02 |  37.7 | 1195.1
11:18:33:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_1017/A//TestDate_2023_09_05-11_16_26/