07:48:12:ST3_hmp4040:INFO:	HAMEG,HMP2030,017836163,HW50010002/SW2.30
07:48:13:febtest:INFO:	FEB8.2 selected
07:48:30:ST3_Shared:INFO:	Listo of operators:Olga B.; 
07:48:34:febtest:INFO:	FEB 8-2 A @ GSI
07:49:19:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
07:49:19:ST3_emu:ERROR:	device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!
07:49:22:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
07:49:22:ST3_emu:ERROR:	device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!
07:49:26:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
07:49:28:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:49:28:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
07:49:28:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:49:28:febtest:INFO:	Tsting FEB with SN 1017
07:49:30:smx_tester:INFO:	Scanning setup
07:49:30:elinks:INFO:	Disabling clock on downlink 0
07:49:30:elinks:INFO:	Disabling clock on downlink 1
07:49:30:elinks:INFO:	Disabling clock on downlink 2
07:49:30:elinks:INFO:	Disabling clock on downlink 3
07:49:30:elinks:INFO:	Disabling clock on downlink 4
07:49:30:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:49:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
07:49:30:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:49:30:elinks:INFO:	Disabling clock on downlink 0
07:49:30:elinks:INFO:	Disabling clock on downlink 1
07:49:30:elinks:INFO:	Disabling clock on downlink 2
07:49:30:elinks:INFO:	Disabling clock on downlink 3
07:49:30:elinks:INFO:	Disabling clock on downlink 4
07:49:30:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:49:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:49:30:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:49:30:elinks:INFO:	Disabling clock on downlink 0
07:49:30:elinks:INFO:	Disabling clock on downlink 1
07:49:30:elinks:INFO:	Disabling clock on downlink 2
07:49:30:elinks:INFO:	Disabling clock on downlink 3
07:49:30:elinks:INFO:	Disabling clock on downlink 4
07:49:30:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:49:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:49:30:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:49:30:elinks:INFO:	Disabling clock on downlink 0
07:49:30:elinks:INFO:	Disabling clock on downlink 1
07:49:30:elinks:INFO:	Disabling clock on downlink 2
07:49:30:elinks:INFO:	Disabling clock on downlink 3
07:49:30:elinks:INFO:	Disabling clock on downlink 4
07:49:30:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:49:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
07:49:30:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 16
07:49:30:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 17
07:49:30:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 18
07:49:30:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 19
07:49:30:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 20
07:49:30:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 21
07:49:31:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 22
07:49:31:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 23
07:49:31:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 24
07:49:31:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 25
07:49:31:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 26
07:49:31:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 27
07:49:31:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 28
07:49:31:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 29
07:49:31:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 30
07:49:31:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 31
07:49:31:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:49:31:elinks:INFO:	Disabling clock on downlink 0
07:49:31:elinks:INFO:	Disabling clock on downlink 1
07:49:31:elinks:INFO:	Disabling clock on downlink 2
07:49:31:elinks:INFO:	Disabling clock on downlink 3
07:49:31:elinks:INFO:	Disabling clock on downlink 4
07:49:31:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:49:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
07:49:31:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:49:31:setup_element:INFO:	Scanning clock phase
07:49:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
07:49:31:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
07:49:31:setup_element:INFO:	Clock phase scan results for group 0, downlink 3
07:49:31:setup_element:INFO:	Eye window for uplink 16: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
07:49:31:setup_element:INFO:	Eye window for uplink 17: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
07:49:31:setup_element:INFO:	Eye window for uplink 18: _____________________________________________________________________XXXXXX_X___
Clock Delay: 32
07:49:31:setup_element:INFO:	Eye window for uplink 19: _____________________________________________________________________XXXXXX_X___
Clock Delay: 32
07:49:31:setup_element:INFO:	Eye window for uplink 20: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
07:49:31:setup_element:INFO:	Eye window for uplink 21: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
07:49:31:setup_element:INFO:	Eye window for uplink 22: ____________________________________________________________________XXXXXX______
Clock Delay: 30
07:49:31:setup_element:INFO:	Eye window for uplink 23: ____________________________________________________________________XXXXXX______
Clock Delay: 30
07:49:31:setup_element:INFO:	Eye window for uplink 24: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
07:49:31:setup_element:INFO:	Eye window for uplink 25: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
07:49:31:setup_element:INFO:	Eye window for uplink 26: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
07:49:31:setup_element:INFO:	Eye window for uplink 27: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
07:49:31:setup_element:INFO:	Eye window for uplink 28: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
07:49:31:setup_element:INFO:	Eye window for uplink 29: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
07:49:31:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
07:49:31:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
07:49:31:setup_element:INFO:	Setting the clock phase to 31 for group 0, downlink 3
07:49:31:setup_element:INFO:	Scanning data phases
07:49:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
07:49:31:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
07:49:37:setup_element:INFO:	Data phase scan results for group 0, downlink 3
07:49:37:setup_element:INFO:	Eye window for uplink 16: __________________XXXX__________________
Data delay found: 39
07:49:37:setup_element:INFO:	Eye window for uplink 17: ______________XXXX______________________
Data delay found: 35
07:49:37:setup_element:INFO:	Eye window for uplink 18: ______________XXXX______________________
Data delay found: 35
07:49:37:setup_element:INFO:	Eye window for uplink 19: ___________XXXXX________________________
Data delay found: 33
07:49:37:setup_element:INFO:	Eye window for uplink 20: _________XXXXX__________________________
Data delay found: 31
07:49:37:setup_element:INFO:	Eye window for uplink 21: _______XXXXXX___________________________
Data delay found: 29
07:49:37:setup_element:INFO:	Eye window for uplink 22: _____XXXXX______________________________
Data delay found: 27
07:49:37:setup_element:INFO:	Eye window for uplink 23: __XXXXX_________________________________
Data delay found: 24
07:49:37:setup_element:INFO:	Eye window for uplink 24: XX__________________________________XXXX
Data delay found: 18
07:49:37:setup_element:INFO:	Eye window for uplink 25: XXXXX__________________________________X
Data delay found: 21
07:49:37:setup_element:INFO:	Eye window for uplink 26: _________________________________XXXXXX_
Data delay found: 15
07:49:37:setup_element:INFO:	Eye window for uplink 27: XXX_X_________________________________XX
Data delay found: 21
07:49:37:setup_element:INFO:	Eye window for uplink 28: XXX__________________________________XXX
Data delay found: 19
07:49:37:setup_element:INFO:	Eye window for uplink 29: XXXXX__________________________________X
Data delay found: 21
07:49:37:setup_element:INFO:	Eye window for uplink 30: XX__________________________________XXXX
Data delay found: 18
07:49:37:setup_element:INFO:	Eye window for uplink 31: X_________________________________XXXXXX
Data delay found: 17
07:49:37:setup_element:INFO:	Setting the data phase to 39 for uplink 16
07:49:37:setup_element:INFO:	Setting the data phase to 35 for uplink 17
07:49:37:setup_element:INFO:	Setting the data phase to 35 for uplink 18
07:49:37:setup_element:INFO:	Setting the data phase to 33 for uplink 19
07:49:37:setup_element:INFO:	Setting the data phase to 31 for uplink 20
07:49:37:setup_element:INFO:	Setting the data phase to 29 for uplink 21
07:49:37:setup_element:INFO:	Setting the data phase to 27 for uplink 22
07:49:37:setup_element:INFO:	Setting the data phase to 24 for uplink 23
07:49:37:setup_element:INFO:	Setting the data phase to 18 for uplink 24
07:49:37:setup_element:INFO:	Setting the data phase to 21 for uplink 25
07:49:37:setup_element:INFO:	Setting the data phase to 15 for uplink 26
07:49:37:setup_element:INFO:	Setting the data phase to 21 for uplink 27
07:49:37:setup_element:INFO:	Setting the data phase to 19 for uplink 28
07:49:37:setup_element:INFO:	Setting the data phase to 21 for uplink 29
07:49:37:setup_element:INFO:	Setting the data phase to 18 for uplink 30
07:49:37:setup_element:INFO:	Setting the data phase to 17 for uplink 31
07:49:37:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 31
    Window Length: 70
    Eye Windows:
      Uplink 16: _____________________________________________________________________XXXXXXX____
      Uplink 17: _____________________________________________________________________XXXXXXX____
      Uplink 18: _____________________________________________________________________XXXXXX_X___
      Uplink 19: _____________________________________________________________________XXXXXX_X___
      Uplink 20: ____________________________________________________________________XXXXXXXX____
      Uplink 21: ____________________________________________________________________XXXXXXXX____
      Uplink 22: ____________________________________________________________________XXXXXX______
      Uplink 23: ____________________________________________________________________XXXXXX______
      Uplink 24: ___________________________________________________________________XXXXXXXXX____
      Uplink 25: ___________________________________________________________________XXXXXXXXX____
      Uplink 26: ___________________________________________________________________XXXXXXXX_____
      Uplink 27: ___________________________________________________________________XXXXXXXX_____
      Uplink 28: ____________________________________________________________________XXXXXXXX____
      Uplink 29: ____________________________________________________________________XXXXXXXX____
      Uplink 30: _____________________________________________________________________XXXXXX_____
      Uplink 31: _____________________________________________________________________XXXXXX_____
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 39
      Window Length: 36
      Eye Window: __________________XXXX__________________
    Uplink 17:
      Optimal Phase: 35
      Window Length: 36
      Eye Window: ______________XXXX______________________
    Uplink 18:
      Optimal Phase: 35
      Window Length: 36
      Eye Window: ______________XXXX______________________
    Uplink 19:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 20:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 21:
      Optimal Phase: 29
      Window Length: 34
      Eye Window: _______XXXXXX___________________________
    Uplink 22:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 23:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 24:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 25:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 26:
      Optimal Phase: 15
      Window Length: 34
      Eye Window: _________________________________XXXXXX_
    Uplink 27:
      Optimal Phase: 21
      Window Length: 33
      Eye Window: XXX_X_________________________________XX
    Uplink 28:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 29:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 30:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 31:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXXX
]
07:49:37:setup_element:INFO:	Beginning SMX ASICs map scan
07:49:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
07:49:37:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
07:49:37:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
07:49:37:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
07:49:37:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
07:49:37:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 17
07:49:37:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 16
07:49:37:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 24
07:49:37:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 25
07:49:37:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 19
07:49:37:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 18
07:49:38:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 26
07:49:38:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 27
07:49:38:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 21
07:49:38:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 20
07:49:38:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 28
07:49:38:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 29
07:49:38:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 23
07:49:38:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 22
07:49:38:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 30
07:49:38:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 31
07:49:40:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 24), (1, 25)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 30), (1, 31)
  Clock Phase Characteristic:
    Optimal Phase: 31
    Window Length: 70
    Eye Windows:
      Uplink 16: _____________________________________________________________________XXXXXXX____
      Uplink 17: _____________________________________________________________________XXXXXXX____
      Uplink 18: _____________________________________________________________________XXXXXX_X___
      Uplink 19: _____________________________________________________________________XXXXXX_X___
      Uplink 20: ____________________________________________________________________XXXXXXXX____
      Uplink 21: ____________________________________________________________________XXXXXXXX____
      Uplink 22: ____________________________________________________________________XXXXXX______
      Uplink 23: ____________________________________________________________________XXXXXX______
      Uplink 24: ___________________________________________________________________XXXXXXXXX____
      Uplink 25: ___________________________________________________________________XXXXXXXXX____
      Uplink 26: ___________________________________________________________________XXXXXXXX_____
      Uplink 27: ___________________________________________________________________XXXXXXXX_____
      Uplink 28: ____________________________________________________________________XXXXXXXX____
      Uplink 29: ____________________________________________________________________XXXXXXXX____
      Uplink 30: _____________________________________________________________________XXXXXX_____
      Uplink 31: _____________________________________________________________________XXXXXX_____
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 39
      Window Length: 36
      Eye Window: __________________XXXX__________________
    Uplink 17:
      Optimal Phase: 35
      Window Length: 36
      Eye Window: ______________XXXX______________________
    Uplink 18:
      Optimal Phase: 35
      Window Length: 36
      Eye Window: ______________XXXX______________________
    Uplink 19:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 20:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 21:
      Optimal Phase: 29
      Window Length: 34
      Eye Window: _______XXXXXX___________________________
    Uplink 22:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 23:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 24:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 25:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 26:
      Optimal Phase: 15
      Window Length: 34
      Eye Window: _________________________________XXXXXX_
    Uplink 27:
      Optimal Phase: 21
      Window Length: 33
      Eye Window: XXX_X_________________________________XX
    Uplink 28:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 29:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 30:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 31:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXXX

07:49:40:setup_element:INFO:	Performing Elink synchronization
07:49:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
07:49:40:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
07:49:40:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
07:49:40:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
07:49:40:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 3
07:49:40:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
07:49:40:ST3_emu:INFO:	Number of chips: 8
07:49:40:ST3_emu:INFO:	Chip address:  	0x0
07:49:40:ST3_emu:INFO:	Chip address:  	0x1
07:49:40:ST3_emu:INFO:	Chip address:  	0x2
07:49:40:ST3_emu:INFO:	Chip address:  	0x3
07:49:40:ST3_emu:INFO:	Chip address:  	0x4
07:49:40:ST3_emu:INFO:	Chip address:  	0x5
07:49:40:ST3_emu:INFO:	Chip address:  	0x6
07:49:40:ST3_emu:INFO:	Chip address:  	0x7
07:49:41:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
07:49:41:febtest:INFO:	0-0 | XA-000-08-002-001-006-226-02 |  18.7 | 1224.5
07:49:41:febtest:INFO:	0-1 | XA-000-08-002-001-006-239-02 |  15.6 | 1230.3
07:49:42:febtest:INFO:	0-2 | XA-000-08-002-001-006-230-02 |  21.9 | 1224.5
07:49:42:febtest:INFO:	0-3 | XA-000-08-002-001-006-241-05 |  37.7 | 1165.6
07:49:42:febtest:INFO:	0-4 | XA-000-08-002-001-006-228-02 |  18.7 | 1224.5
07:49:42:febtest:INFO:	0-5 | XA-000-08-002-001-006-222-11 |  28.2 | 1171.5
07:49:43:febtest:INFO:	0-6 | XA-000-08-002-001-006-233-02 |  18.7 | 1224.5
07:49:43:febtest:INFO:	0-7 | XA-000-08-002-001-006-224-02 |  25.1 | 1195.1
07:49:43:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
07:49:47:ST3_smx:INFO:	chip: 0-0 	 21.902970 C 	 1200.969315 mV
07:49:47:ST3_smx:INFO:	# loops 0
07:49:48:ST3_smx:INFO:	# loops 1
07:49:50:ST3_smx:INFO:	# loops 2
07:49:51:ST3_smx:INFO:	# loops 3
07:49:53:ST3_smx:INFO:	# loops 4
07:49:55:ST3_smx:INFO:	Total # of broken channels: 0
07:49:55:ST3_smx:INFO:	List of broken channels: []
07:49:55:ST3_smx:INFO:	Total # of broken channels: 0
07:49:55:ST3_smx:INFO:	List of broken channels: []
07:49:56:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
07:49:59:ST3_smx:INFO:	chip: 0-1 	 6.141382 C 	 1253.730060 mV
07:49:59:ST3_smx:INFO:	# loops 0
07:50:01:ST3_smx:INFO:	# loops 1
07:50:03:ST3_smx:INFO:	# loops 2
07:50:04:ST3_smx:INFO:	# loops 3
07:50:06:ST3_smx:INFO:	# loops 4
07:50:07:ST3_smx:INFO:	Total # of broken channels: 0
07:50:07:ST3_smx:INFO:	List of broken channels: []
07:50:07:ST3_smx:INFO:	Total # of broken channels: 0
07:50:07:ST3_smx:INFO:	List of broken channels: []
07:50:08:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
07:50:12:ST3_smx:INFO:	chip: 0-2 	 25.062742 C 	 1195.082160 mV
07:50:12:ST3_smx:INFO:	# loops 0
07:50:13:ST3_smx:INFO:	# loops 1
07:50:15:ST3_smx:INFO:	# loops 2
07:50:16:ST3_smx:INFO:	# loops 3
07:50:18:ST3_smx:INFO:	# loops 4
07:50:20:ST3_smx:INFO:	Total # of broken channels: 0
07:50:20:ST3_smx:INFO:	List of broken channels: []
07:50:20:ST3_smx:INFO:	Total # of broken channels: 0
07:50:20:ST3_smx:INFO:	List of broken channels: []
07:50:20:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
07:50:24:ST3_smx:INFO:	chip: 0-3 	 40.898880 C 	 1141.874115 mV
07:50:24:ST3_smx:INFO:	# loops 0
07:50:26:ST3_smx:INFO:	# loops 1
07:50:27:ST3_smx:INFO:	# loops 2
07:50:29:ST3_smx:INFO:	# loops 3
07:50:30:ST3_smx:INFO:	# loops 4
07:50:32:ST3_smx:INFO:	Total # of broken channels: 0
07:50:32:ST3_smx:INFO:	List of broken channels: []
07:50:32:ST3_smx:INFO:	Total # of broken channels: 0
07:50:32:ST3_smx:INFO:	List of broken channels: []
07:50:33:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
07:50:36:ST3_smx:INFO:	chip: 0-4 	 18.745682 C 	 1212.728715 mV
07:50:36:ST3_smx:INFO:	# loops 0
07:50:38:ST3_smx:INFO:	# loops 1
07:50:40:ST3_smx:INFO:	# loops 2
07:50:41:ST3_smx:INFO:	# loops 3
07:50:43:ST3_smx:INFO:	# loops 4
07:50:44:ST3_smx:INFO:	Total # of broken channels: 0
07:50:44:ST3_smx:INFO:	List of broken channels: []
07:50:44:ST3_smx:INFO:	Total # of broken channels: 0
07:50:44:ST3_smx:INFO:	List of broken channels: []
07:50:45:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
07:50:49:ST3_smx:INFO:	chip: 0-5 	 28.225000 C 	 1177.390875 mV
07:50:49:ST3_smx:INFO:	# loops 0
07:50:50:ST3_smx:INFO:	# loops 1
07:50:52:ST3_smx:INFO:	# loops 2
07:50:54:ST3_smx:INFO:	# loops 3
07:50:55:ST3_smx:INFO:	# loops 4
07:50:57:ST3_smx:INFO:	Total # of broken channels: 0
07:50:57:ST3_smx:INFO:	List of broken channels: []
07:50:57:ST3_smx:INFO:	Total # of broken channels: 0
07:50:57:ST3_smx:INFO:	List of broken channels: []
07:50:57:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
07:51:01:ST3_smx:INFO:	chip: 0-6 	 28.225000 C 	 1189.190035 mV
07:51:01:ST3_smx:INFO:	# loops 0
07:51:03:ST3_smx:INFO:	# loops 1
07:51:04:ST3_smx:INFO:	# loops 2
07:51:06:ST3_smx:INFO:	# loops 3
07:51:08:ST3_smx:INFO:	# loops 4
07:51:09:ST3_smx:INFO:	Total # of broken channels: 0
07:51:09:ST3_smx:INFO:	List of broken channels: []
07:51:09:ST3_smx:INFO:	Total # of broken channels: 0
07:51:09:ST3_smx:INFO:	List of broken channels: []
07:51:10:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
07:51:13:ST3_smx:INFO:	chip: 0-7 	 25.062742 C 	 1189.190035 mV
07:51:13:ST3_smx:INFO:	# loops 0
07:51:15:ST3_smx:INFO:	# loops 1
07:51:17:ST3_smx:INFO:	# loops 2
07:51:18:ST3_smx:INFO:	# loops 3
07:51:20:ST3_smx:INFO:	# loops 4
07:51:22:ST3_smx:INFO:	Total # of broken channels: 0
07:51:22:ST3_smx:INFO:	List of broken channels: []
07:51:22:ST3_smx:INFO:	Total # of broken channels: 0
07:51:22:ST3_smx:INFO:	List of broken channels: []
07:51:22:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
07:51:22:febtest:INFO:	0-0 | XA-000-08-002-001-006-226-02 |  28.2 | 1189.2
07:51:23:febtest:INFO:	0-1 | XA-000-08-002-001-006-239-02 |   9.3 | 1242.0
07:51:23:febtest:INFO:	0-2 | XA-000-08-002-001-006-230-02 |  28.2 | 1189.2
07:51:23:febtest:INFO:	0-3 | XA-000-08-002-001-006-241-05 |  40.9 | 1135.9
07:51:23:febtest:INFO:	0-4 | XA-000-08-002-001-006-228-02 |  21.9 | 1206.9
07:51:24:febtest:INFO:	0-5 | XA-000-08-002-001-006-222-11 |  28.2 | 1177.4
07:51:24:febtest:INFO:	0-6 | XA-000-08-002-001-006-233-02 |  31.4 | 1189.2
07:51:24:febtest:INFO:	0-7 | XA-000-08-002-001-006-224-02 |  25.1 | 1189.2
07:51:46:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_1017/TestDate_2023_10_13-07_49_28/