FEB_1018    08.09.23 10:55:24

TextEdit.txt
            10:54:19:ST3_hmp4040:INFO:	HAMEG,HMP2030,017836163,HW50010002/SW2.30
10:54:19:febtest:INFO:	FEB8.2 selected
10:54:19:febtest:INFO:	FEB8.2 selected
10:55:11:ST3_Shared:INFO:	Listo of operators:Oleksandr S.; 
10:55:20:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
10:55:20:ST3_emu:ERROR:	device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!
10:55:22:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
10:55:24:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:55:24:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
10:55:24:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:55:24:febtest:INFO:	Tsting FEB with SN 1018
10:55:25:smx_tester:INFO:	Scanning setup
10:55:25:elinks:INFO:	Disabling clock on downlink 0
10:55:25:elinks:INFO:	Disabling clock on downlink 1
10:55:25:elinks:INFO:	Disabling clock on downlink 2
10:55:25:elinks:INFO:	Disabling clock on downlink 3
10:55:25:elinks:INFO:	Disabling clock on downlink 4
10:55:25:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:55:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:55:25:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:55:25:elinks:INFO:	Disabling clock on downlink 0
10:55:25:elinks:INFO:	Disabling clock on downlink 1
10:55:25:elinks:INFO:	Disabling clock on downlink 2
10:55:25:elinks:INFO:	Disabling clock on downlink 3
10:55:25:elinks:INFO:	Disabling clock on downlink 4
10:55:25:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:55:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:55:25:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:55:25:elinks:INFO:	Disabling clock on downlink 0
10:55:25:elinks:INFO:	Disabling clock on downlink 1
10:55:26:elinks:INFO:	Disabling clock on downlink 2
10:55:26:elinks:INFO:	Disabling clock on downlink 3
10:55:26:elinks:INFO:	Disabling clock on downlink 4
10:55:26:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:55:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:55:26:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:55:26:elinks:INFO:	Disabling clock on downlink 0
10:55:26:elinks:INFO:	Disabling clock on downlink 1
10:55:26:elinks:INFO:	Disabling clock on downlink 2
10:55:26:elinks:INFO:	Disabling clock on downlink 3
10:55:26:elinks:INFO:	Disabling clock on downlink 4
10:55:26:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:55:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:55:26:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 24
10:55:26:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 25
10:55:26:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 26
10:55:26:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 27
10:55:26:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 28
10:55:26:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 29
10:55:26:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 30
10:55:26:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 31
10:55:26:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:55:26:elinks:INFO:	Disabling clock on downlink 0
10:55:26:elinks:INFO:	Disabling clock on downlink 1
10:55:26:elinks:INFO:	Disabling clock on downlink 2
10:55:26:elinks:INFO:	Disabling clock on downlink 3
10:55:26:elinks:INFO:	Disabling clock on downlink 4
10:55:26:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:55:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:55:26:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:55:26:setup_element:INFO:	Scanning clock phase
10:55:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:55:26:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:55:26:setup_element:INFO:	Clock phase scan results for group 0, downlink 3
10:55:26:setup_element:INFO:	Eye window for uplink 24: _________________________________________________________________XXXXXXXXX______
Clock Delay: 29
10:55:26:setup_element:INFO:	Eye window for uplink 25: _________________________________________________________________XXXXXXXXX______
Clock Delay: 29
10:55:26:setup_element:INFO:	Eye window for uplink 26: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
10:55:26:setup_element:INFO:	Eye window for uplink 27: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
10:55:26:setup_element:INFO:	Eye window for uplink 28: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
10:55:26:setup_element:INFO:	Eye window for uplink 29: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
10:55:26:setup_element:INFO:	Eye window for uplink 30: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
10:55:26:setup_element:INFO:	Eye window for uplink 31: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
10:55:26:setup_element:INFO:	Setting the clock phase to 29 for group 0, downlink 3
10:55:26:setup_element:INFO:	Scanning data phases
10:55:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:55:26:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:55:32:setup_element:INFO:	Data phase scan results for group 0, downlink 3
10:55:32:setup_element:INFO:	Eye window for uplink 24: XXXX__________________________________XX
Data delay found: 20
10:55:32:setup_element:INFO:	Eye window for uplink 25: __XXXXX_________________________________
Data delay found: 24
10:55:32:setup_element:INFO:	Eye window for uplink 26: XXX___________________________________XX
Data delay found: 20
10:55:32:setup_element:INFO:	Eye window for uplink 27: __XXXXX_________________________________
Data delay found: 24
10:55:32:setup_element:INFO:	Eye window for uplink 28: XXXX___________________________________X
Data delay found: 21
10:55:32:setup_element:INFO:	Eye window for uplink 29: __XXXX__________________________________
Data delay found: 23
10:55:32:setup_element:INFO:	Eye window for uplink 30: XXXXXX__________________________________
Data delay found: 22
10:55:32:setup_element:INFO:	Eye window for uplink 31: XXXXX________________________________XXX
Data delay found: 20
10:55:32:setup_element:INFO:	Setting the data phase to 20 for uplink 24
10:55:32:setup_element:INFO:	Setting the data phase to 24 for uplink 25
10:55:32:setup_element:INFO:	Setting the data phase to 20 for uplink 26
10:55:32:setup_element:INFO:	Setting the data phase to 24 for uplink 27
10:55:32:setup_element:INFO:	Setting the data phase to 21 for uplink 28
10:55:32:setup_element:INFO:	Setting the data phase to 23 for uplink 29
10:55:32:setup_element:INFO:	Setting the data phase to 22 for uplink 30
10:55:32:setup_element:INFO:	Setting the data phase to 20 for uplink 31
10:55:32:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 29
    Window Length: 71
    Eye Windows:
      Uplink 24: _________________________________________________________________XXXXXXXXX______
      Uplink 25: _________________________________________________________________XXXXXXXXX______
      Uplink 26: __________________________________________________________________XXXXXXXX______
      Uplink 27: __________________________________________________________________XXXXXXXX______
      Uplink 28: __________________________________________________________________XXXXXXXX______
      Uplink 29: __________________________________________________________________XXXXXXXX______
      Uplink 30: __________________________________________________________________XXXXXXXX______
      Uplink 31: __________________________________________________________________XXXXXXXX______
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 25:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 26:
      Optimal Phase: 20
      Window Length: 35
      Eye Window: XXX___________________________________XX
    Uplink 27:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 28:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 29:
      Optimal Phase: 23
      Window Length: 36
      Eye Window: __XXXX__________________________________
    Uplink 30:
      Optimal Phase: 22
      Window Length: 34
      Eye Window: XXXXXX__________________________________
    Uplink 31:
      Optimal Phase: 20
      Window Length: 32
      Eye Window: XXXXX________________________________XXX
]
10:55:32:setup_element:INFO:	Beginning SMX ASICs map scan
10:55:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:55:32:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:55:32:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
10:55:32:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
10:55:32:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
10:55:32:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 24
10:55:32:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 25
10:55:32:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 26
10:55:32:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 27
10:55:33:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 28
10:55:33:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 29
10:55:33:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 30
10:55:33:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 31
10:55:34:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 24), (1, 25)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 30), (1, 31)
  Clock Phase Characteristic:
    Optimal Phase: 29
    Window Length: 71
    Eye Windows:
      Uplink 24: _________________________________________________________________XXXXXXXXX______
      Uplink 25: _________________________________________________________________XXXXXXXXX______
      Uplink 26: __________________________________________________________________XXXXXXXX______
      Uplink 27: __________________________________________________________________XXXXXXXX______
      Uplink 28: __________________________________________________________________XXXXXXXX______
      Uplink 29: __________________________________________________________________XXXXXXXX______
      Uplink 30: __________________________________________________________________XXXXXXXX______
      Uplink 31: __________________________________________________________________XXXXXXXX______
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 25:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 26:
      Optimal Phase: 20
      Window Length: 35
      Eye Window: XXX___________________________________XX
    Uplink 27:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 28:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 29:
      Optimal Phase: 23
      Window Length: 36
      Eye Window: __XXXX__________________________________
    Uplink 30:
      Optimal Phase: 22
      Window Length: 34
      Eye Window: XXXXXX__________________________________
    Uplink 31:
      Optimal Phase: 20
      Window Length: 32
      Eye Window: XXXXX________________________________XXX

10:55:34:setup_element:INFO:	Performing Elink synchronization
10:55:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:55:34:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:55:34:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
10:55:34:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
10:55:34:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 3
10:55:34:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
10:55:35:ST3_emu:INFO:	Number of chips: 4
10:55:35:ST3_emu:INFO:	Chip address:  	0x1
10:55:35:ST3_emu:INFO:	Chip address:  	0x3
10:55:35:ST3_emu:INFO:	Chip address:  	0x5
10:55:35:ST3_emu:INFO:	Chip address:  	0x7
10:55:35:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:55:36:febtest:INFO:	0-1 | XA-000-08-002-000-002-228-12 |  18.7 | 1218.6
10:55:36:febtest:INFO:	0-3 | XA-000-08-002-000-002-245-11 |  21.9 | 1206.9
10:55:36:febtest:INFO:	0-5 | XA-000-08-002-000-002-243-11 |  12.4 | 1247.9
10:55:36:febtest:INFO:	0-7 | XA-000-08-002-000-002-242-11 |  31.4 | 1171.5
10:55:36:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:55:40:ST3_smx:INFO:	chip: 0-1 	 28.225000 C 	 1177.390875 mV
10:55:40:ST3_smx:INFO:	# loops 0
10:55:42:ST3_smx:INFO:	# loops 1
10:55:44:ST3_smx:INFO:	# loops 2
10:55:45:ST3_smx:INFO:	# loops 3
10:55:47:ST3_smx:INFO:	# loops 4
10:55:49:ST3_smx:INFO:	Total # of broken channels: 0
10:55:49:ST3_smx:INFO:	List of broken channels: []
10:55:49:ST3_smx:INFO:	Total # of broken channels: 0
10:55:49:ST3_smx:INFO:	List of broken channels: []
10:55:50:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:55:53:ST3_smx:INFO:	chip: 0-3 	 21.902970 C 	 1189.190035 mV
10:55:53:ST3_smx:INFO:	# loops 0
10:55:55:ST3_smx:INFO:	# loops 1
10:55:57:ST3_smx:INFO:	# loops 2
10:55:58:ST3_smx:INFO:	# loops 3
10:56:00:ST3_smx:INFO:	# loops 4
10:56:02:ST3_smx:INFO:	Total # of broken channels: 0
10:56:02:ST3_smx:INFO:	List of broken channels: []
10:56:02:ST3_smx:INFO:	Total # of broken channels: 1
10:56:02:ST3_smx:INFO:	List of broken channels: [39]
10:56:02:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:56:06:ST3_smx:INFO:	chip: 0-5 	 15.590880 C 	 1212.728715 mV
10:56:06:ST3_smx:INFO:	# loops 0
10:56:08:ST3_smx:INFO:	# loops 1
10:56:09:ST3_smx:INFO:	# loops 2
10:56:11:ST3_smx:INFO:	# loops 3
10:56:13:ST3_smx:INFO:	# loops 4
10:56:14:ST3_smx:INFO:	Total # of broken channels: 0
10:56:14:ST3_smx:INFO:	List of broken channels: []
10:56:14:ST3_smx:INFO:	Total # of broken channels: 0
10:56:14:ST3_smx:INFO:	List of broken channels: []
10:56:15:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:56:19:ST3_smx:INFO:	chip: 0-7 	 31.389742 C 	 1165.571835 mV
10:56:19:ST3_smx:INFO:	# loops 0
10:56:21:ST3_smx:INFO:	# loops 1
10:56:22:ST3_smx:INFO:	# loops 2
10:56:24:ST3_smx:INFO:	# loops 3
10:56:26:ST3_smx:INFO:	# loops 4
10:56:27:ST3_smx:INFO:	Total # of broken channels: 0
10:56:27:ST3_smx:INFO:	List of broken channels: []
10:56:27:ST3_smx:INFO:	Total # of broken channels: 0
10:56:27:ST3_smx:INFO:	List of broken channels: []
10:56:28:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:56:28:febtest:INFO:	0-1 | XA-000-08-002-000-002-228-12 |  31.4 | 1165.6
10:56:28:febtest:INFO:	0-3 | XA-000-08-002-000-002-245-11 |  25.1 | 1183.3
10:56:28:febtest:INFO:	0-5 | XA-000-08-002-000-002-243-11 |  18.7 | 1212.7
10:56:29:febtest:INFO:	0-7 | XA-000-08-002-000-002-242-11 |  31.4 | 1165.6
10:56:32:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_1018/A//TestDate_2023_09_08-10_55_24/