
FEB_1018 11.09.23 10:51:09
TextEdit.txt
10:49:40:ST3_hmp4040:INFO: 10:49:41:febtest:INFO: FEB8.2 selected 10:49:41:febtest:INFO: FEB8.2 selected 10:50:16:ST3_Shared:INFO: Listo of operators:Oleksandr S.; 10:50:28:smx_tester:INFO: Setting Elink clock mode to 160 MHz 10:50:28:ST3_emu:ERROR: device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!! 10:50:31:smx_tester:INFO: Setting Elink clock mode to 160 MHz 10:51:09:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:51:09:ST3_Shared:INFO: -----------------------FEB-Microcable----------------------- 10:51:09:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:51:09:febtest:INFO: Tsting FEB with SN 1018 10:51:10:smx_tester:INFO: Scanning setup 10:51:10:elinks:INFO: Disabling clock on downlink 0 10:51:10:elinks:INFO: Disabling clock on downlink 1 10:51:10:elinks:INFO: Disabling clock on downlink 2 10:51:10:elinks:INFO: Disabling clock on downlink 3 10:51:10:elinks:INFO: Disabling clock on downlink 4 10:51:10:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:51:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 10:51:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:51:11:elinks:INFO: Disabling clock on downlink 0 10:51:11:elinks:INFO: Disabling clock on downlink 1 10:51:11:elinks:INFO: Disabling clock on downlink 2 10:51:11:elinks:INFO: Disabling clock on downlink 3 10:51:11:elinks:INFO: Disabling clock on downlink 4 10:51:11:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:51:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:51:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:51:11:elinks:INFO: Disabling clock on downlink 0 10:51:11:elinks:INFO: Disabling clock on downlink 1 10:51:11:elinks:INFO: Disabling clock on downlink 2 10:51:11:elinks:INFO: Disabling clock on downlink 3 10:51:11:elinks:INFO: Disabling clock on downlink 4 10:51:11:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:51:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:51:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:51:11:elinks:INFO: Disabling clock on downlink 0 10:51:11:elinks:INFO: Disabling clock on downlink 1 10:51:11:elinks:INFO: Disabling clock on downlink 2 10:51:11:elinks:INFO: Disabling clock on downlink 3 10:51:11:elinks:INFO: Disabling clock on downlink 4 10:51:11:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:51:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 10:51:11:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 16 10:51:11:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 17 10:51:11:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 18 10:51:11:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 19 10:51:11:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 20 10:51:11:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 21 10:51:11:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 22 10:51:11:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 23 10:51:11:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 24 10:51:11:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 25 10:51:11:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 26 10:51:11:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 27 10:51:11:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 28 10:51:11:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 29 10:51:11:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 30 10:51:11:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 31 10:51:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:51:11:elinks:INFO: Disabling clock on downlink 0 10:51:11:elinks:INFO: Disabling clock on downlink 1 10:51:11:elinks:INFO: Disabling clock on downlink 2 10:51:11:elinks:INFO: Disabling clock on downlink 3 10:51:11:elinks:INFO: Disabling clock on downlink 4 10:51:11:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:51:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 10:51:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:51:11:setup_element:INFO: Scanning clock phase 10:51:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 10:51:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3] 10:51:12:setup_element:INFO: Clock phase scan results for group 0, downlink 3 10:51:12:setup_element:INFO: Eye window for uplink 16: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 10:51:12:setup_element:INFO: Eye window for uplink 17: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 10:51:12:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 10:51:12:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 10:51:12:setup_element:INFO: Eye window for uplink 20: ___________________________________________________________________XXXXXXXX_____ Clock Delay: 30 10:51:12:setup_element:INFO: Eye window for uplink 21: ___________________________________________________________________XXXXXXXX_____ Clock Delay: 30 10:51:12:setup_element:INFO: Eye window for uplink 22: ____________________________________________________________________XXXXXXX_____ Clock Delay: 31 10:51:12:setup_element:INFO: Eye window for uplink 23: ____________________________________________________________________XXXXXXX_____ Clock Delay: 31 10:51:12:setup_element:INFO: Eye window for uplink 24: __________________________________________________________________XXXXXXXX______ Clock Delay: 29 10:51:12:setup_element:INFO: Eye window for uplink 25: __________________________________________________________________XXXXXXXX______ Clock Delay: 29 10:51:12:setup_element:INFO: Eye window for uplink 26: __________________________________________________________________XXXXXXXX______ Clock Delay: 29 10:51:12:setup_element:INFO: Eye window for uplink 27: __________________________________________________________________XXXXXXXX______ Clock Delay: 29 10:51:12:setup_element:INFO: Eye window for uplink 28: ___________________________________________________________________XXXXXXXX_____ Clock Delay: 30 10:51:12:setup_element:INFO: Eye window for uplink 29: ___________________________________________________________________XXXXXXXX_____ Clock Delay: 30 10:51:12:setup_element:INFO: Eye window for uplink 30: ___________________________________________________________________XXXXXXXX_____ Clock Delay: 30 10:51:12:setup_element:INFO: Eye window for uplink 31: ___________________________________________________________________XXXXXXXX_____ Clock Delay: 30 10:51:12:setup_element:INFO: Setting the clock phase to 30 for group 0, downlink 3 10:51:12:setup_element:INFO: Scanning data phases 10:51:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 10:51:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3] 10:51:17:setup_element:INFO: Data phase scan results for group 0, downlink 3 10:51:17:setup_element:INFO: Eye window for uplink 16: __________________XXXX__________________ Data delay found: 39 10:51:17:setup_element:INFO: Eye window for uplink 17: ______________XXXXX_____________________ Data delay found: 36 10:51:17:setup_element:INFO: Eye window for uplink 18: _____________XXXXX______________________ Data delay found: 35 10:51:17:setup_element:INFO: Eye window for uplink 19: __________XXXXX_________________________ Data delay found: 32 10:51:17:setup_element:INFO: Eye window for uplink 20: _______XXXXX____________________________ Data delay found: 29 10:51:17:setup_element:INFO: Eye window for uplink 21: ______XXXXX_____________________________ Data delay found: 28 10:51:17:setup_element:INFO: Eye window for uplink 22: _____XXXX_______________________________ Data delay found: 26 10:51:17:setup_element:INFO: Eye window for uplink 23: ___XXXX_________________________________ Data delay found: 24 10:51:17:setup_element:INFO: Eye window for uplink 24: __________________________________XXXXX_ Data delay found: 16 10:51:17:setup_element:INFO: Eye window for uplink 25: XXX__________________________________XXX Data delay found: 19 10:51:17:setup_element:INFO: Eye window for uplink 26: __________________________________XXXX__ Data delay found: 15 10:51:17:setup_element:INFO: Eye window for uplink 27: XXXX__________________________________XX Data delay found: 20 10:51:17:setup_element:INFO: Eye window for uplink 28: XX__________________________________XXXX Data delay found: 18 10:51:17:setup_element:INFO: Eye window for uplink 29: XXXX__________________________________XX Data delay found: 20 10:51:17:setup_element:INFO: Eye window for uplink 30: XXX_________________________________XXXX Data delay found: 19 10:51:17:setup_element:INFO: Eye window for uplink 31: XX_________________________________XXXXX Data delay found: 18 10:51:17:setup_element:INFO: Setting the data phase to 39 for uplink 16 10:51:17:setup_element:INFO: Setting the data phase to 36 for uplink 17 10:51:17:setup_element:INFO: Setting the data phase to 35 for uplink 18 10:51:17:setup_element:INFO: Setting the data phase to 32 for uplink 19 10:51:17:setup_element:INFO: Setting the data phase to 29 for uplink 20 10:51:17:setup_element:INFO: Setting the data phase to 28 for uplink 21 10:51:17:setup_element:INFO: Setting the data phase to 26 for uplink 22 10:51:18:setup_element:INFO: Setting the data phase to 24 for uplink 23 10:51:18:setup_element:INFO: Setting the data phase to 16 for uplink 24 10:51:18:setup_element:INFO: Setting the data phase to 19 for uplink 25 10:51:18:setup_element:INFO: Setting the data phase to 15 for uplink 26 10:51:18:setup_element:INFO: Setting the data phase to 20 for uplink 27 10:51:18:setup_element:INFO: Setting the data phase to 18 for uplink 28 10:51:18:setup_element:INFO: Setting the data phase to 20 for uplink 29 10:51:18:setup_element:INFO: Setting the data phase to 19 for uplink 30 10:51:18:setup_element:INFO: Setting the data phase to 18 for uplink 31 10:51:18:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 3 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 30 Window Length: 70 Eye Windows: Uplink 16: _____________________________________________________________________XXXXXXX____ Uplink 17: _____________________________________________________________________XXXXXXX____ Uplink 18: _____________________________________________________________________XXXXXXX____ Uplink 19: _____________________________________________________________________XXXXXXX____ Uplink 20: ___________________________________________________________________XXXXXXXX_____ Uplink 21: ___________________________________________________________________XXXXXXXX_____ Uplink 22: ____________________________________________________________________XXXXXXX_____ Uplink 23: ____________________________________________________________________XXXXXXX_____ Uplink 24: __________________________________________________________________XXXXXXXX______ Uplink 25: __________________________________________________________________XXXXXXXX______ Uplink 26: __________________________________________________________________XXXXXXXX______ Uplink 27: __________________________________________________________________XXXXXXXX______ Uplink 28: ___________________________________________________________________XXXXXXXX_____ Uplink 29: ___________________________________________________________________XXXXXXXX_____ Uplink 30: ___________________________________________________________________XXXXXXXX_____ Uplink 31: ___________________________________________________________________XXXXXXXX_____ Data phase characteristics: Uplink 16: Optimal Phase: 39 Window Length: 36 Eye Window: __________________XXXX__________________ Uplink 17: Optimal Phase: 36 Window Length: 35 Eye Window: ______________XXXXX_____________________ Uplink 18: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 19: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 20: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 21: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 22: Optimal Phase: 26 Window Length: 36 Eye Window: _____XXXX_______________________________ Uplink 23: Optimal Phase: 24 Window Length: 36 Eye Window: ___XXXX_________________________________ Uplink 24: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 25: Optimal Phase: 19 Window Length: 34 Eye Window: XXX__________________________________XXX Uplink 26: Optimal Phase: 15 Window Length: 36 Eye Window: __________________________________XXXX__ Uplink 27: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 28: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 29: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 30: Optimal Phase: 19 Window Length: 33 Eye Window: XXX_________________________________XXXX Uplink 31: Optimal Phase: 18 Window Length: 33 Eye Window: XX_________________________________XXXXX ] 10:51:18:setup_element:INFO: Beginning SMX ASICs map scan 10:51:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 10:51:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3] 10:51:18:master:INFO: Setting encoding mode EOS for groups [0], downlinks [3] 10:51:18:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [3] 10:51:18:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 10:51:18:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 17 10:51:18:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 16 10:51:18:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 24 10:51:18:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 25 10:51:18:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 19 10:51:18:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 18 10:51:18:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 26 10:51:18:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 27 10:51:18:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 21 10:51:18:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 20 10:51:19:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 28 10:51:19:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 29 10:51:19:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 23 10:51:19:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 22 10:51:19:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 30 10:51:19:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 31 10:51:20:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 3 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x1: (ASIC uplink, uplink): (0, 24), (1, 25) ASIC address 0x2: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x3: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x4: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x5: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x6: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x7: (ASIC uplink, uplink): (0, 30), (1, 31) Clock Phase Characteristic: Optimal Phase: 30 Window Length: 70 Eye Windows: Uplink 16: _____________________________________________________________________XXXXXXX____ Uplink 17: _____________________________________________________________________XXXXXXX____ Uplink 18: _____________________________________________________________________XXXXXXX____ Uplink 19: _____________________________________________________________________XXXXXXX____ Uplink 20: ___________________________________________________________________XXXXXXXX_____ Uplink 21: ___________________________________________________________________XXXXXXXX_____ Uplink 22: ____________________________________________________________________XXXXXXX_____ Uplink 23: ____________________________________________________________________XXXXXXX_____ Uplink 24: __________________________________________________________________XXXXXXXX______ Uplink 25: __________________________________________________________________XXXXXXXX______ Uplink 26: __________________________________________________________________XXXXXXXX______ Uplink 27: __________________________________________________________________XXXXXXXX______ Uplink 28: ___________________________________________________________________XXXXXXXX_____ Uplink 29: ___________________________________________________________________XXXXXXXX_____ Uplink 30: ___________________________________________________________________XXXXXXXX_____ Uplink 31: ___________________________________________________________________XXXXXXXX_____ Data phase characteristics: Uplink 16: Optimal Phase: 39 Window Length: 36 Eye Window: __________________XXXX__________________ Uplink 17: Optimal Phase: 36 Window Length: 35 Eye Window: ______________XXXXX_____________________ Uplink 18: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 19: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 20: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 21: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 22: Optimal Phase: 26 Window Length: 36 Eye Window: _____XXXX_______________________________ Uplink 23: Optimal Phase: 24 Window Length: 36 Eye Window: ___XXXX_________________________________ Uplink 24: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 25: Optimal Phase: 19 Window Length: 34 Eye Window: XXX__________________________________XXX Uplink 26: Optimal Phase: 15 Window Length: 36 Eye Window: __________________________________XXXX__ Uplink 27: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 28: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 29: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 30: Optimal Phase: 19 Window Length: 33 Eye Window: XXX_________________________________XXXX Uplink 31: Optimal Phase: 18 Window Length: 33 Eye Window: XX_________________________________XXXXX 10:51:20:setup_element:INFO: Performing Elink synchronization 10:51:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 10:51:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3] 10:51:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [3] 10:51:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [3] 10:51:20:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 3 10:51:20:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 10:51:21:ST3_emu:INFO: Number of chips: 8 10:51:21:ST3_emu:INFO: Chip address: 0x0 10:51:21:ST3_emu:INFO: Chip address: 0x1 10:51:21:ST3_emu:INFO: Chip address: 0x2 10:51:21:ST3_emu:INFO: Chip address: 0x3 10:51:21:ST3_emu:INFO: Chip address: 0x4 10:51:21:ST3_emu:INFO: Chip address: 0x5 10:51:21:ST3_emu:INFO: Chip address: 0x6 10:51:21:ST3_emu:INFO: Chip address: 0x7 10:51:22:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 10:51:22:febtest:INFO: 0-0 | XA-000-08-002-000-002-240-11 | 37.7 | 1165.6 10:51:22:febtest:INFO: 0-1 | XA-000-08-002-000-002-228-12 | 21.9 | 1218.6 10:51:22:febtest:INFO: 0-2 | XA-000-08-002-000-002-254-11 | 21.9 | 1212.7 10:51:23:febtest:INFO: 0-3 | XA-000-08-002-000-002-245-11 | 25.1 | 1206.9 10:51:23:febtest:INFO: 0-4 | XA-000-08-002-000-002-225-12 | 12.4 | 1242.0 10:51:23:febtest:INFO: 0-5 | XA-000-08-002-000-002-243-11 | 18.7 | 1230.3 10:51:23:febtest:INFO: 0-6 | XA-000-08-002-000-002-233-12 | 34.6 | 1165.6 10:51:23:febtest:INFO: 0-7 | XA-000-08-002-000-002-242-11 | 28.2 | 1189.2 10:51:24:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:51:27:ST3_smx:INFO: chip: 0-0 28.225000 C 1183.292940 mV 10:51:27:ST3_smx:INFO: # loops 0 10:51:29:ST3_smx:INFO: # loops 1 10:51:30:ST3_smx:INFO: # loops 2 10:51:32:ST3_smx:INFO: # loops 3 10:51:33:ST3_smx:INFO: # loops 4 10:51:35:ST3_smx:INFO: Total # of broken channels: 0 10:51:35:ST3_smx:INFO: List of broken channels: [] 10:51:35:ST3_smx:INFO: Total # of broken channels: 0 10:51:35:ST3_smx:INFO: List of broken channels: [] 10:51:36:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:51:39:ST3_smx:INFO: chip: 0-1 34.556970 C 1165.571835 mV 10:51:39:ST3_smx:INFO: # loops 0 10:51:41:ST3_smx:INFO: # loops 1 10:51:43:ST3_smx:INFO: # loops 2 10:51:44:ST3_smx:INFO: # loops 3 10:51:46:ST3_smx:INFO: # loops 4 10:51:47:ST3_smx:INFO: Total # of broken channels: 0 10:51:47:ST3_smx:INFO: List of broken channels: [] 10:51:47:ST3_smx:INFO: Total # of broken channels: 0 10:51:47:ST3_smx:INFO: List of broken channels: [] 10:51:48:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:51:51:ST3_smx:INFO: chip: 0-2 34.556970 C 1171.483840 mV 10:51:51:ST3_smx:INFO: # loops 0 10:51:53:ST3_smx:INFO: # loops 1 10:51:55:ST3_smx:INFO: # loops 2 10:51:56:ST3_smx:INFO: # loops 3 10:51:58:ST3_smx:INFO: # loops 4 10:51:59:ST3_smx:INFO: Total # of broken channels: 0 10:51:59:ST3_smx:INFO: List of broken channels: [] 10:51:59:ST3_smx:INFO: Total # of broken channels: 0 10:51:59:ST3_smx:INFO: List of broken channels: [] 10:52:00:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:52:03:ST3_smx:INFO: chip: 0-3 31.389742 C 1183.292940 mV 10:52:03:ST3_smx:INFO: # loops 0 10:52:05:ST3_smx:INFO: # loops 1 10:52:07:ST3_smx:INFO: # loops 2 10:52:08:ST3_smx:INFO: # loops 3 10:52:10:ST3_smx:INFO: # loops 4 10:52:11:ST3_smx:INFO: Total # of broken channels: 0 10:52:11:ST3_smx:INFO: List of broken channels: [] 10:52:11:ST3_smx:INFO: Total # of broken channels: 0 10:52:11:ST3_smx:INFO: List of broken channels: [] 10:52:12:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:52:15:ST3_smx:INFO: chip: 0-4 25.062742 C 1195.082160 mV 10:52:15:ST3_smx:INFO: # loops 0 10:52:17:ST3_smx:INFO: # loops 1 10:52:18:ST3_smx:INFO: # loops 2 10:52:20:ST3_smx:INFO: # loops 3 10:52:21:ST3_smx:INFO: # loops 4 10:52:23:ST3_smx:INFO: Total # of broken channels: 0 10:52:23:ST3_smx:INFO: List of broken channels: [] 10:52:23:ST3_smx:INFO: Total # of broken channels: 0 10:52:23:ST3_smx:INFO: List of broken channels: [] 10:52:24:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:52:27:ST3_smx:INFO: chip: 0-5 28.225000 C 1195.082160 mV 10:52:27:ST3_smx:INFO: # loops 0 10:52:29:ST3_smx:INFO: # loops 1 10:52:30:ST3_smx:INFO: # loops 2 10:52:32:ST3_smx:INFO: # loops 3 10:52:33:ST3_smx:INFO: # loops 4 10:52:35:ST3_smx:INFO: Total # of broken channels: 0 10:52:35:ST3_smx:INFO: List of broken channels: [] 10:52:35:ST3_smx:INFO: Total # of broken channels: 0 10:52:35:ST3_smx:INFO: List of broken channels: [] 10:52:35:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:52:39:ST3_smx:INFO: chip: 0-6 25.062742 C 1200.969315 mV 10:52:39:ST3_smx:INFO: # loops 0 10:52:40:ST3_smx:INFO: # loops 1 10:52:42:ST3_smx:INFO: # loops 2 10:52:44:ST3_smx:INFO: # loops 3 10:52:45:ST3_smx:INFO: # loops 4 10:52:47:ST3_smx:INFO: Total # of broken channels: 0 10:52:47:ST3_smx:INFO: List of broken channels: [] 10:52:47:ST3_smx:INFO: Total # of broken channels: 0 10:52:47:ST3_smx:INFO: List of broken channels: [] 10:52:48:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:52:51:ST3_smx:INFO: chip: 0-7 31.389742 C 1183.292940 mV 10:52:51:ST3_smx:INFO: # loops 0 10:52:53:ST3_smx:INFO: # loops 1 10:52:55:ST3_smx:INFO: # loops 2 10:52:56:ST3_smx:INFO: # loops 3 10:52:58:ST3_smx:INFO: # loops 4 10:52:59:ST3_smx:INFO: Total # of broken channels: 0 10:52:59:ST3_smx:INFO: List of broken channels: [] 10:52:59:ST3_smx:INFO: Total # of broken channels: 0 10:52:59:ST3_smx:INFO: List of broken channels: [] 10:53:00:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 10:53:00:febtest:INFO: 0-0 | XA-000-08-002-000-002-240-11 | 37.7 | 1171.5 10:53:00:febtest:INFO: 0-1 | XA-000-08-002-000-002-228-12 | 40.9 | 1159.7 10:53:01:febtest:INFO: 0-2 | XA-000-08-002-000-002-254-11 | 37.7 | 1165.6 10:53:01:febtest:INFO: 0-3 | XA-000-08-002-000-002-245-11 | 34.6 | 1171.5 10:53:01:febtest:INFO: 0-4 | XA-000-08-002-000-002-225-12 | 31.4 | 1189.2 10:53:01:febtest:INFO: 0-5 | XA-000-08-002-000-002-243-11 | 31.4 | 1189.2 10:53:01:febtest:INFO: 0-6 | XA-000-08-002-000-002-233-12 | 28.2 | 1195.1 10:53:02:febtest:INFO: 0-7 | XA-000-08-002-000-002-242-11 | 31.4 | 1183.3 10:53:03:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1018/A//TestDate_2023_09_11-10_51_09/