11:12:02:ST3_hmp4040:INFO:	HAMEG,HMP2030,017836163,HW50010002/SW2.30
11:12:02:febtest:INFO:	FEB8.2 selected
11:12:25:febtest:INFO:	FEB 8-2 A @ GSI
11:12:42:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
11:12:43:ST3_emu:ERROR:	device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!
11:12:46:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
11:12:53:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:12:53:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
11:12:53:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:12:54:febtest:INFO:	Tsting FEB with SN 1021
11:12:55:smx_tester:INFO:	Scanning setup
11:12:55:elinks:INFO:	Disabling clock on downlink 0
11:12:55:elinks:INFO:	Disabling clock on downlink 1
11:12:55:elinks:INFO:	Disabling clock on downlink 2
11:12:55:elinks:INFO:	Disabling clock on downlink 3
11:12:55:elinks:INFO:	Disabling clock on downlink 4
11:12:55:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:12:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:12:55:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:12:55:elinks:INFO:	Disabling clock on downlink 0
11:12:55:elinks:INFO:	Disabling clock on downlink 1
11:12:55:elinks:INFO:	Disabling clock on downlink 2
11:12:55:elinks:INFO:	Disabling clock on downlink 3
11:12:55:elinks:INFO:	Disabling clock on downlink 4
11:12:55:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:12:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:12:55:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:12:55:elinks:INFO:	Disabling clock on downlink 0
11:12:55:elinks:INFO:	Disabling clock on downlink 1
11:12:55:elinks:INFO:	Disabling clock on downlink 2
11:12:55:elinks:INFO:	Disabling clock on downlink 3
11:12:55:elinks:INFO:	Disabling clock on downlink 4
11:12:55:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:12:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:12:55:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:12:55:elinks:INFO:	Disabling clock on downlink 0
11:12:55:elinks:INFO:	Disabling clock on downlink 1
11:12:55:elinks:INFO:	Disabling clock on downlink 2
11:12:55:elinks:INFO:	Disabling clock on downlink 3
11:12:55:elinks:INFO:	Disabling clock on downlink 4
11:12:55:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:12:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:12:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 16
11:12:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 17
11:12:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 18
11:12:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 19
11:12:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 20
11:12:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 21
11:12:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 22
11:12:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 23
11:12:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 24
11:12:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 25
11:12:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 26
11:12:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 27
11:12:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 28
11:12:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 29
11:12:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 30
11:12:56:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 31
11:12:56:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:12:56:elinks:INFO:	Disabling clock on downlink 0
11:12:56:elinks:INFO:	Disabling clock on downlink 1
11:12:56:elinks:INFO:	Disabling clock on downlink 2
11:12:56:elinks:INFO:	Disabling clock on downlink 3
11:12:56:elinks:INFO:	Disabling clock on downlink 4
11:12:56:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:12:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
11:12:56:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:12:56:setup_element:INFO:	Scanning clock phase
11:12:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:12:56:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
11:12:56:setup_element:INFO:	Clock phase scan results for group 0, downlink 3
11:12:56:setup_element:INFO:	Eye window for uplink 16: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:12:56:setup_element:INFO:	Eye window for uplink 17: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:12:56:setup_element:INFO:	Eye window for uplink 18: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
11:12:56:setup_element:INFO:	Eye window for uplink 19: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
11:12:56:setup_element:INFO:	Eye window for uplink 20: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
11:12:56:setup_element:INFO:	Eye window for uplink 21: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
11:12:56:setup_element:INFO:	Eye window for uplink 22: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
11:12:56:setup_element:INFO:	Eye window for uplink 23: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
11:12:56:setup_element:INFO:	Eye window for uplink 24: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
11:12:56:setup_element:INFO:	Eye window for uplink 25: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
11:12:56:setup_element:INFO:	Eye window for uplink 26: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
11:12:56:setup_element:INFO:	Eye window for uplink 27: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
11:12:56:setup_element:INFO:	Eye window for uplink 28: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
11:12:56:setup_element:INFO:	Eye window for uplink 29: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
11:12:56:setup_element:INFO:	Eye window for uplink 30: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
11:12:56:setup_element:INFO:	Eye window for uplink 31: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
11:12:56:setup_element:INFO:	Setting the clock phase to 30 for group 0, downlink 3
11:12:56:setup_element:INFO:	Scanning data phases
11:12:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:12:56:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
11:13:02:setup_element:INFO:	Data phase scan results for group 0, downlink 3
11:13:02:setup_element:INFO:	Eye window for uplink 16: __________________XXXX__________________
Data delay found: 39
11:13:02:setup_element:INFO:	Eye window for uplink 17: _____________XXXXX______________________
Data delay found: 35
11:13:02:setup_element:INFO:	Eye window for uplink 18: _____________XXXXX______________________
Data delay found: 35
11:13:02:setup_element:INFO:	Eye window for uplink 19: __________XXXXX_________________________
Data delay found: 32
11:13:02:setup_element:INFO:	Eye window for uplink 20: __________XXXX__________________________
Data delay found: 31
11:13:02:setup_element:INFO:	Eye window for uplink 21: ________XXXXX___________________________
Data delay found: 30
11:13:02:setup_element:INFO:	Eye window for uplink 22: ______XXXX______________________________
Data delay found: 27
11:13:02:setup_element:INFO:	Eye window for uplink 23: ___XXXX_________________________________
Data delay found: 24
11:13:02:setup_element:INFO:	Eye window for uplink 24: XX_________________________________XXXXX
Data delay found: 18
11:13:02:setup_element:INFO:	Eye window for uplink 25: XXX____________________________________X
Data delay found: 20
11:13:02:setup_element:INFO:	Eye window for uplink 26: X__________________________________XXXXX
Data delay found: 17
11:13:02:setup_element:INFO:	Eye window for uplink 27: XXXXX__________________________________X
Data delay found: 21
11:13:02:setup_element:INFO:	Eye window for uplink 28: XXX__________________________________XXX
Data delay found: 19
11:13:02:setup_element:INFO:	Eye window for uplink 29: _XXXX__________________________________X
Data delay found: 21
11:13:02:setup_element:INFO:	Eye window for uplink 30: XXX________________________________XXXXX
Data delay found: 18
11:13:02:setup_element:INFO:	Eye window for uplink 31: _________________________________XXXXXX_
Data delay found: 15
11:13:02:setup_element:INFO:	Setting the data phase to 39 for uplink 16
11:13:02:setup_element:INFO:	Setting the data phase to 35 for uplink 17
11:13:02:setup_element:INFO:	Setting the data phase to 35 for uplink 18
11:13:02:setup_element:INFO:	Setting the data phase to 32 for uplink 19
11:13:02:setup_element:INFO:	Setting the data phase to 31 for uplink 20
11:13:02:setup_element:INFO:	Setting the data phase to 30 for uplink 21
11:13:02:setup_element:INFO:	Setting the data phase to 27 for uplink 22
11:13:02:setup_element:INFO:	Setting the data phase to 24 for uplink 23
11:13:02:setup_element:INFO:	Setting the data phase to 18 for uplink 24
11:13:02:setup_element:INFO:	Setting the data phase to 20 for uplink 25
11:13:02:setup_element:INFO:	Setting the data phase to 17 for uplink 26
11:13:02:setup_element:INFO:	Setting the data phase to 21 for uplink 27
11:13:02:setup_element:INFO:	Setting the data phase to 19 for uplink 28
11:13:02:setup_element:INFO:	Setting the data phase to 21 for uplink 29
11:13:02:setup_element:INFO:	Setting the data phase to 18 for uplink 30
11:13:02:setup_element:INFO:	Setting the data phase to 15 for uplink 31
11:13:02:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 30
    Window Length: 70
    Eye Windows:
      Uplink 16: ____________________________________________________________________XXXXXXXX____
      Uplink 17: ____________________________________________________________________XXXXXXXX____
      Uplink 18: ____________________________________________________________________XXXXXXX_____
      Uplink 19: ____________________________________________________________________XXXXXXX_____
      Uplink 20: ____________________________________________________________________XXXXXXX_____
      Uplink 21: ____________________________________________________________________XXXXXXX_____
      Uplink 22: ____________________________________________________________________XXXXXXX_____
      Uplink 23: ____________________________________________________________________XXXXXXX_____
      Uplink 24: __________________________________________________________________XXXXXXXX______
      Uplink 25: __________________________________________________________________XXXXXXXX______
      Uplink 26: ___________________________________________________________________XXXXXXXX_____
      Uplink 27: ___________________________________________________________________XXXXXXXX_____
      Uplink 28: ___________________________________________________________________XXXXXXXX_____
      Uplink 29: ___________________________________________________________________XXXXXXXX_____
      Uplink 30: ___________________________________________________________________XXXXXXX______
      Uplink 31: ___________________________________________________________________XXXXXXX______
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 39
      Window Length: 36
      Eye Window: __________________XXXX__________________
    Uplink 17:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 18:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 19:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 20:
      Optimal Phase: 31
      Window Length: 36
      Eye Window: __________XXXX__________________________
    Uplink 21:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 22:
      Optimal Phase: 27
      Window Length: 36
      Eye Window: ______XXXX______________________________
    Uplink 23:
      Optimal Phase: 24
      Window Length: 36
      Eye Window: ___XXXX_________________________________
    Uplink 24:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 25:
      Optimal Phase: 20
      Window Length: 36
      Eye Window: XXX____________________________________X
    Uplink 26:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 27:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 28:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 29:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: _XXXX__________________________________X
    Uplink 30:
      Optimal Phase: 18
      Window Length: 32
      Eye Window: XXX________________________________XXXXX
    Uplink 31:
      Optimal Phase: 15
      Window Length: 34
      Eye Window: _________________________________XXXXXX_
]
11:13:02:setup_element:INFO:	Beginning SMX ASICs map scan
11:13:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:13:02:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
11:13:02:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
11:13:02:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
11:13:02:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:13:02:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 17
11:13:02:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 16
11:13:02:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 24
11:13:02:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 25
11:13:02:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 19
11:13:02:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 18
11:13:03:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 26
11:13:03:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 27
11:13:03:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 21
11:13:03:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 20
11:13:03:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 28
11:13:03:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 29
11:13:03:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 23
11:13:03:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 22
11:13:03:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 30
11:13:03:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 31
11:13:05:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 24), (1, 25)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 30), (1, 31)
  Clock Phase Characteristic:
    Optimal Phase: 30
    Window Length: 70
    Eye Windows:
      Uplink 16: ____________________________________________________________________XXXXXXXX____
      Uplink 17: ____________________________________________________________________XXXXXXXX____
      Uplink 18: ____________________________________________________________________XXXXXXX_____
      Uplink 19: ____________________________________________________________________XXXXXXX_____
      Uplink 20: ____________________________________________________________________XXXXXXX_____
      Uplink 21: ____________________________________________________________________XXXXXXX_____
      Uplink 22: ____________________________________________________________________XXXXXXX_____
      Uplink 23: ____________________________________________________________________XXXXXXX_____
      Uplink 24: __________________________________________________________________XXXXXXXX______
      Uplink 25: __________________________________________________________________XXXXXXXX______
      Uplink 26: ___________________________________________________________________XXXXXXXX_____
      Uplink 27: ___________________________________________________________________XXXXXXXX_____
      Uplink 28: ___________________________________________________________________XXXXXXXX_____
      Uplink 29: ___________________________________________________________________XXXXXXXX_____
      Uplink 30: ___________________________________________________________________XXXXXXX______
      Uplink 31: ___________________________________________________________________XXXXXXX______
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 39
      Window Length: 36
      Eye Window: __________________XXXX__________________
    Uplink 17:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 18:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 19:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 20:
      Optimal Phase: 31
      Window Length: 36
      Eye Window: __________XXXX__________________________
    Uplink 21:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 22:
      Optimal Phase: 27
      Window Length: 36
      Eye Window: ______XXXX______________________________
    Uplink 23:
      Optimal Phase: 24
      Window Length: 36
      Eye Window: ___XXXX_________________________________
    Uplink 24:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 25:
      Optimal Phase: 20
      Window Length: 36
      Eye Window: XXX____________________________________X
    Uplink 26:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 27:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 28:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 29:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: _XXXX__________________________________X
    Uplink 30:
      Optimal Phase: 18
      Window Length: 32
      Eye Window: XXX________________________________XXXXX
    Uplink 31:
      Optimal Phase: 15
      Window Length: 34
      Eye Window: _________________________________XXXXXX_

11:13:05:setup_element:INFO:	Performing Elink synchronization
11:13:05:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:13:05:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
11:13:05:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
11:13:05:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
11:13:05:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 3
11:13:05:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:13:05:ST3_emu:INFO:	Number of chips: 8
11:13:05:ST3_emu:INFO:	Chip address:  	0x0
11:13:05:ST3_emu:INFO:	Chip address:  	0x1
11:13:05:ST3_emu:INFO:	Chip address:  	0x2
11:13:05:ST3_emu:INFO:	Chip address:  	0x3
11:13:05:ST3_emu:INFO:	Chip address:  	0x4
11:13:05:ST3_emu:INFO:	Chip address:  	0x5
11:13:05:ST3_emu:INFO:	Chip address:  	0x6
11:13:05:ST3_emu:INFO:	Chip address:  	0x7
11:13:06:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
11:13:06:febtest:INFO:	0-0 | XA-000-08-002-000-003-014-00 |  28.2 | 1189.2
11:13:06:febtest:INFO:	0-1 | XA-000-08-002-000-002-249-11 |  21.9 | 1206.9
11:13:06:febtest:INFO:	0-2 | XA-000-08-002-000-003-013-00 |  21.9 | 1206.9
11:13:07:febtest:INFO:	0-3 | XA-000-08-002-000-002-252-11 |  25.1 | 1195.1
11:13:07:febtest:INFO:	0-4 | XA-000-08-002-000-003-001-00 |  34.6 | 1177.4
11:13:07:febtest:INFO:	0-5 | XA-000-08-002-000-003-002-00 |  31.4 | 1177.4
11:13:07:febtest:INFO:	0-6 | XA-000-08-002-000-002-255-11 |  21.9 | 1230.3
11:13:08:febtest:INFO:	0-7 | XA-000-08-002-000-002-247-11 |  25.1 | 1212.7
11:13:08:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:13:11:ST3_smx:INFO:	chip: 0-0 	 31.389742 C 	 1159.654860 mV
11:13:11:ST3_smx:INFO:	# loops 0
11:13:13:ST3_smx:INFO:	# loops 1
11:13:15:ST3_smx:INFO:	# loops 2
11:13:17:ST3_smx:INFO:	# loops 3
11:13:18:ST3_smx:INFO:	# loops 4
11:13:20:ST3_smx:INFO:	Total # of broken channels: 0
11:13:20:ST3_smx:INFO:	List of broken channels: []
11:13:20:ST3_smx:INFO:	Total # of broken channels: 0
11:13:20:ST3_smx:INFO:	List of broken channels: []
11:13:21:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:13:25:ST3_smx:INFO:	chip: 0-1 	 25.062742 C 	 1183.292940 mV
11:13:25:ST3_smx:INFO:	# loops 0
11:13:26:ST3_smx:INFO:	# loops 1
11:13:28:ST3_smx:INFO:	# loops 2
11:13:30:ST3_smx:INFO:	# loops 3
11:13:31:ST3_smx:INFO:	# loops 4
11:13:33:ST3_smx:INFO:	Total # of broken channels: 1
11:13:33:ST3_smx:INFO:	List of broken channels: [1]
11:13:33:ST3_smx:INFO:	Total # of broken channels: 1
11:13:33:ST3_smx:INFO:	List of broken channels: [1]
11:13:34:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:13:38:ST3_smx:INFO:	chip: 0-2 	 15.590880 C 	 1218.600960 mV
11:13:38:ST3_smx:INFO:	# loops 0
11:13:39:ST3_smx:INFO:	# loops 1
11:13:41:ST3_smx:INFO:	# loops 2
11:13:43:ST3_smx:INFO:	# loops 3
11:13:44:ST3_smx:INFO:	# loops 4
11:13:46:ST3_smx:INFO:	Total # of broken channels: 0
11:13:46:ST3_smx:INFO:	List of broken channels: []
11:13:46:ST3_smx:INFO:	Total # of broken channels: 0
11:13:46:ST3_smx:INFO:	List of broken channels: []
11:13:47:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:13:51:ST3_smx:INFO:	chip: 0-3 	 28.225000 C 	 1177.390875 mV
11:13:51:ST3_smx:INFO:	# loops 0
11:13:52:ST3_smx:INFO:	# loops 1
11:13:54:ST3_smx:INFO:	# loops 2
11:13:56:ST3_smx:INFO:	# loops 3
11:13:57:ST3_smx:INFO:	# loops 4
11:13:59:ST3_smx:INFO:	Total # of broken channels: 0
11:13:59:ST3_smx:INFO:	List of broken channels: []
11:13:59:ST3_smx:INFO:	Total # of broken channels: 0
11:13:59:ST3_smx:INFO:	List of broken channels: []
11:14:00:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:14:03:ST3_smx:INFO:	chip: 0-4 	 34.556970 C 	 1171.483840 mV
11:14:04:ST3_smx:INFO:	# loops 0
11:14:05:ST3_smx:INFO:	# loops 1
11:14:07:ST3_smx:INFO:	# loops 2
11:14:09:ST3_smx:INFO:	# loops 3
11:14:10:ST3_smx:INFO:	# loops 4
11:14:12:ST3_smx:INFO:	Total # of broken channels: 0
11:14:12:ST3_smx:INFO:	List of broken channels: []
11:14:12:ST3_smx:INFO:	Total # of broken channels: 0
11:14:12:ST3_smx:INFO:	List of broken channels: []
11:14:13:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:14:16:ST3_smx:INFO:	chip: 0-5 	 25.062742 C 	 1183.292940 mV
11:14:16:ST3_smx:INFO:	# loops 0
11:14:18:ST3_smx:INFO:	# loops 1
11:14:20:ST3_smx:INFO:	# loops 2
11:14:22:ST3_smx:INFO:	# loops 3
11:14:23:ST3_smx:INFO:	# loops 4
11:14:25:ST3_smx:INFO:	Total # of broken channels: 0
11:14:25:ST3_smx:INFO:	List of broken channels: []
11:14:25:ST3_smx:INFO:	Total # of broken channels: 0
11:14:25:ST3_smx:INFO:	List of broken channels: []
11:14:25:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:14:29:ST3_smx:INFO:	chip: 0-6 	 28.225000 C 	 1195.082160 mV
11:14:29:ST3_smx:INFO:	# loops 0
11:14:31:ST3_smx:INFO:	# loops 1
11:14:33:ST3_smx:INFO:	# loops 2
11:14:34:ST3_smx:INFO:	# loops 3
11:14:36:ST3_smx:INFO:	# loops 4
11:14:38:ST3_smx:INFO:	Total # of broken channels: 0
11:14:38:ST3_smx:INFO:	List of broken channels: []
11:14:38:ST3_smx:INFO:	Total # of broken channels: 0
11:14:38:ST3_smx:INFO:	List of broken channels: []
11:14:38:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:14:42:ST3_smx:INFO:	chip: 0-7 	 31.389742 C 	 1183.292940 mV
11:14:42:ST3_smx:INFO:	# loops 0
11:14:44:ST3_smx:INFO:	# loops 1
11:14:46:ST3_smx:INFO:	# loops 2
11:14:47:ST3_smx:INFO:	# loops 3
11:14:49:ST3_smx:INFO:	# loops 4
11:14:51:ST3_smx:INFO:	Total # of broken channels: 1
11:14:51:ST3_smx:INFO:	List of broken channels: [13]
11:14:51:ST3_smx:INFO:	Total # of broken channels: 2
11:14:51:ST3_smx:INFO:	List of broken channels: [0, 13]
11:14:51:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
11:14:51:febtest:INFO:	0-0 | XA-000-08-002-000-003-014-00 |  37.7 | 1153.7
11:14:52:febtest:INFO:	0-1 | XA-000-08-002-000-002-249-11 |  31.4 | 1177.4
11:14:52:febtest:INFO:	0-2 | XA-000-08-002-000-003-013-00 |  18.7 | 1212.7
11:14:52:febtest:INFO:	0-3 | XA-000-08-002-000-002-252-11 |  31.4 | 1171.5
11:14:52:febtest:INFO:	0-4 | XA-000-08-002-000-003-001-00 |  37.7 | 1165.6
11:14:53:febtest:INFO:	0-5 | XA-000-08-002-000-003-002-00 |  28.2 | 1183.3
11:14:53:febtest:INFO:	0-6 | XA-000-08-002-000-002-255-11 |  31.4 | 1195.1
11:14:53:febtest:INFO:	0-7 | XA-000-08-002-000-002-247-11 |  34.6 | 1183.3
11:15:07:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_1021/TestDate_2023_10_20-11_12_53/