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FEB_1023 20.09.23 13:44:03
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13:44:03:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:44:03:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
13:44:03:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:44:03:febtest:INFO: Tsting FEB with SN 1023
13:44:04:smx_tester:INFO: Scanning setup
13:44:04:elinks:INFO: Disabling clock on downlink 0
13:44:04:elinks:INFO: Disabling clock on downlink 1
13:44:04:elinks:INFO: Disabling clock on downlink 2
13:44:04:elinks:INFO: Disabling clock on downlink 3
13:44:04:elinks:INFO: Disabling clock on downlink 4
13:44:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:44:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:44:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:44:04:elinks:INFO: Disabling clock on downlink 0
13:44:04:elinks:INFO: Disabling clock on downlink 1
13:44:04:elinks:INFO: Disabling clock on downlink 2
13:44:04:elinks:INFO: Disabling clock on downlink 3
13:44:04:elinks:INFO: Disabling clock on downlink 4
13:44:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:44:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:44:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:44:05:elinks:INFO: Disabling clock on downlink 0
13:44:05:elinks:INFO: Disabling clock on downlink 1
13:44:05:elinks:INFO: Disabling clock on downlink 2
13:44:05:elinks:INFO: Disabling clock on downlink 3
13:44:05:elinks:INFO: Disabling clock on downlink 4
13:44:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:44:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:44:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:44:05:elinks:INFO: Disabling clock on downlink 0
13:44:05:elinks:INFO: Disabling clock on downlink 1
13:44:05:elinks:INFO: Disabling clock on downlink 2
13:44:05:elinks:INFO: Disabling clock on downlink 3
13:44:05:elinks:INFO: Disabling clock on downlink 4
13:44:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:44:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:44:05:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 26
13:44:05:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 27
13:44:05:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 28
13:44:05:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 29
13:44:05:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 30
13:44:05:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 31
13:44:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:44:05:elinks:INFO: Disabling clock on downlink 0
13:44:05:elinks:INFO: Disabling clock on downlink 1
13:44:05:elinks:INFO: Disabling clock on downlink 2
13:44:05:elinks:INFO: Disabling clock on downlink 3
13:44:05:elinks:INFO: Disabling clock on downlink 4
13:44:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:44:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:44:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:44:05:setup_element:INFO: Scanning clock phase
13:44:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:44:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
13:44:05:setup_element:INFO: Clock phase scan results for group 0, downlink 3
13:44:05:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
13:44:05:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
13:44:05:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________XXXXXXXX________
Clock Delay: 27
13:44:05:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________XXXXXXXX________
Clock Delay: 27
13:44:05:setup_element:INFO: Eye window for uplink 30: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
13:44:05:setup_element:INFO: Eye window for uplink 31: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
13:44:05:setup_element:INFO: Setting the clock phase to 28 for group 0, downlink 3
13:44:05:setup_element:INFO: Scanning data phases
13:44:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:44:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
13:44:11:setup_element:INFO: Data phase scan results for group 0, downlink 3
13:44:11:setup_element:INFO: Eye window for uplink 26: XXX__________________________________XXX
Data delay found: 19
13:44:11:setup_element:INFO: Eye window for uplink 27: _XXXXXX_________________________________
Data delay found: 23
13:44:11:setup_element:INFO: Eye window for uplink 28: XX__________________________________X_XX
Data delay found: 18
13:44:11:setup_element:INFO: Eye window for uplink 29: XXXX__________________________________XX
Data delay found: 20
13:44:11:setup_element:INFO: Eye window for uplink 30: XXX__________________________________XXX
Data delay found: 19
13:44:11:setup_element:INFO: Eye window for uplink 31: XX_________________________________XXXXX
Data delay found: 18
13:44:11:setup_element:INFO: Setting the data phase to 19 for uplink 26
13:44:11:setup_element:INFO: Setting the data phase to 23 for uplink 27
13:44:11:setup_element:INFO: Setting the data phase to 18 for uplink 28
13:44:11:setup_element:INFO: Setting the data phase to 20 for uplink 29
13:44:11:setup_element:INFO: Setting the data phase to 19 for uplink 30
13:44:11:setup_element:INFO: Setting the data phase to 18 for uplink 31
13:44:11:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 3
Uplinks: [26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 28
Window Length: 70
Eye Windows:
Uplink 26: _________________________________________________________________XXXXXXXX_______
Uplink 27: _________________________________________________________________XXXXXXXX_______
Uplink 28: ________________________________________________________________XXXXXXXX________
Uplink 29: ________________________________________________________________XXXXXXXX________
Uplink 30: __________________________________________________________________XXXXXXXX______
Uplink 31: __________________________________________________________________XXXXXXXX______
Data phase characteristics:
Uplink 26:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 27:
Optimal Phase: 23
Window Length: 34
Eye Window: _XXXXXX_________________________________
Uplink 28:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________X_XX
Uplink 29:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 30:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 31:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
]
13:44:11:setup_element:INFO: Beginning SMX ASICs map scan
13:44:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:44:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
13:44:11:master:INFO: Setting encoding mode EOS for groups [0], downlinks [3]
13:44:11:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [3]
13:44:11:uplink:INFO: Setting uplinks mask [26, 27, 28, 29, 30, 31]
13:44:11:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 26
13:44:11:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 27
13:44:12:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 28
13:44:12:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 29
13:44:12:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 30
13:44:12:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 31
13:44:13:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 3
Uplinks: [26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x3: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x5: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x7: (ASIC uplink, uplink): (0, 30), (1, 31)
Clock Phase Characteristic:
Optimal Phase: 28
Window Length: 70
Eye Windows:
Uplink 26: _________________________________________________________________XXXXXXXX_______
Uplink 27: _________________________________________________________________XXXXXXXX_______
Uplink 28: ________________________________________________________________XXXXXXXX________
Uplink 29: ________________________________________________________________XXXXXXXX________
Uplink 30: __________________________________________________________________XXXXXXXX______
Uplink 31: __________________________________________________________________XXXXXXXX______
Data phase characteristics:
Uplink 26:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 27:
Optimal Phase: 23
Window Length: 34
Eye Window: _XXXXXX_________________________________
Uplink 28:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________X_XX
Uplink 29:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 30:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 31:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
13:44:13:setup_element:INFO: Performing Elink synchronization
13:44:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:44:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
13:44:13:master:INFO: Setting encoding mode EOS for groups [0], downlinks [3]
13:44:13:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [3]
13:44:13:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 3
13:44:13:uplink:INFO: Enabling uplinks [26, 27, 28, 29, 30, 31]
13:44:13:ST3_emu:INFO: Number of chips: 3
13:44:13:ST3_emu:INFO: Chip address: 0x3
13:44:13:ST3_emu:INFO: Chip address: 0x5
13:44:13:ST3_emu:INFO: Chip address: 0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_3
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
13:44:14:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
13:44:14:febtest:INFO: 0-3 | XA-000-08-001-064-051-008-04 | 56.8 | 1124.0
13:44:14:febtest:INFO: 0-5 | XA-000-08-001-064-051-040-10 | 34.6 | 1201.0
13:44:15:febtest:INFO: 0-7 | XA-000-08-001-064-051-016-03 | 50.4 | 1141.9
13:44:15:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
13:44:19:ST3_smx:INFO: chip: 0-3 44.073563 C 1147.806000 mV
13:44:19:ST3_smx:INFO: # loops 0
13:44:20:ST3_smx:INFO: # loops 1
13:44:22:ST3_smx:INFO: # loops 2
13:44:24:ST3_smx:INFO: # loops 3
13:44:25:ST3_smx:INFO: # loops 4
13:44:27:ST3_smx:INFO: Total # of broken channels: 0
13:44:27:ST3_smx:INFO: List of broken channels: []
13:44:27:ST3_smx:INFO: Total # of broken channels: 0
13:44:27:ST3_smx:INFO: List of broken channels: []
13:44:28:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
13:44:31:ST3_smx:INFO: chip: 0-5 40.898880 C 1165.571835 mV
13:44:31:ST3_smx:INFO: # loops 0
13:44:33:ST3_smx:INFO: # loops 1
13:44:35:ST3_smx:INFO: # loops 2
13:44:36:ST3_smx:INFO: # loops 3
13:44:38:ST3_smx:INFO: # loops 4
13:44:40:ST3_smx:INFO: Total # of broken channels: 0
13:44:40:ST3_smx:INFO: List of broken channels: []
13:44:40:ST3_smx:INFO: Total # of broken channels: 4
13:44:40:ST3_smx:INFO: List of broken channels: [0, 2, 4, 8]
13:44:40:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
13:44:44:ST3_smx:INFO: chip: 0-7 44.073563 C 1153.732915 mV
13:44:44:ST3_smx:INFO: # loops 0
13:44:46:ST3_smx:INFO: # loops 1
13:44:48:ST3_smx:INFO: # loops 2
13:44:49:ST3_smx:INFO: # loops 3
13:44:51:ST3_smx:INFO: # loops 4
13:44:53:ST3_smx:INFO: Total # of broken channels: 0
13:44:53:ST3_smx:INFO: List of broken channels: []
13:44:53:ST3_smx:INFO: Total # of broken channels: 0
13:44:53:ST3_smx:INFO: List of broken channels: []
13:44:53:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
13:44:54:febtest:INFO: 0-3 | XA-000-08-001-064-051-008-04 | 47.3 | 1141.9
13:44:54:febtest:INFO: 0-5 | XA-000-08-001-064-051-040-10 | 44.1 | 1159.7
13:44:54:febtest:INFO: 0-7 | XA-000-08-001-064-051-016-03 | 44.1 | 1153.7
13:46:45:ST3_Shared:INFO: Listo of operators:Oleksandr S.; Robert V.;
13:46:47:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1023/A//TestDate_2023_09_20-13_44_03/