FEB_1031    01.09.23 10:04:48

TextEdit.txt
            10:01:44:ST3_hmp4040:INFO:	HAMEG,HMP2030,017836163,HW50010002/SW2.30
10:01:44:febtest:INFO:	FEB8.2 selected
10:01:45:febtest:INFO:	FEB8.2 selected
10:01:55:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
10:01:55:ST3_emu:ERROR:	device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!
10:02:02:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
10:02:04:ST3_Shared:INFO:	Listo of operators:Olga B.; 
10:02:04:ST3_Shared:INFO:	Listo of operators:Olga B.; Oleksandr S.; 
10:02:27:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:02:27:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
10:02:27:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:02:28:febtest:INFO:	Tsting FEB with SN 1031
10:02:29:smx_tester:INFO:	Scanning setup
10:02:29:elinks:INFO:	Disabling clock on downlink 0
10:02:29:elinks:INFO:	Disabling clock on downlink 1
10:02:29:elinks:INFO:	Disabling clock on downlink 2
10:02:29:elinks:INFO:	Disabling clock on downlink 3
10:02:29:elinks:INFO:	Disabling clock on downlink 4
10:02:29:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:02:29:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:02:29:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:02:29:elinks:INFO:	Disabling clock on downlink 0
10:02:29:elinks:INFO:	Disabling clock on downlink 1
10:02:29:elinks:INFO:	Disabling clock on downlink 2
10:02:29:elinks:INFO:	Disabling clock on downlink 3
10:02:29:elinks:INFO:	Disabling clock on downlink 4
10:02:29:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:02:29:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:02:29:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:02:29:elinks:INFO:	Disabling clock on downlink 0
10:02:29:elinks:INFO:	Disabling clock on downlink 1
10:02:29:elinks:INFO:	Disabling clock on downlink 2
10:02:29:elinks:INFO:	Disabling clock on downlink 3
10:02:29:elinks:INFO:	Disabling clock on downlink 4
10:02:29:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:02:29:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:02:29:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:02:29:elinks:INFO:	Disabling clock on downlink 0
10:02:29:elinks:INFO:	Disabling clock on downlink 1
10:02:29:elinks:INFO:	Disabling clock on downlink 2
10:02:29:elinks:INFO:	Disabling clock on downlink 3
10:02:29:elinks:INFO:	Disabling clock on downlink 4
10:02:29:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:02:29:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:02:29:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 16
10:02:29:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 17
10:02:29:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 18
10:02:30:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 19
10:02:30:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 20
10:02:30:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 21
10:02:30:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 22
10:02:30:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 23
10:02:30:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 24
10:02:30:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 25
10:02:30:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 26
10:02:30:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 27
10:02:30:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 28
10:02:30:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 29
10:02:30:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 30
10:02:30:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 31
10:02:30:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:02:30:elinks:INFO:	Disabling clock on downlink 0
10:02:30:elinks:INFO:	Disabling clock on downlink 1
10:02:30:elinks:INFO:	Disabling clock on downlink 2
10:02:30:elinks:INFO:	Disabling clock on downlink 3
10:02:30:elinks:INFO:	Disabling clock on downlink 4
10:02:30:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:02:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:02:30:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:02:30:setup_element:INFO:	Scanning clock phase
10:02:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:02:30:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:02:30:setup_element:INFO:	Clock phase scan results for group 0, downlink 3
10:02:30:setup_element:INFO:	Eye window for uplink 16: ________________________________________________________________________________
Clock Delay: 40
10:02:30:setup_element:INFO:	Eye window for uplink 17: ________________________________________________________________________________
Clock Delay: 40
10:02:30:setup_element:INFO:	Eye window for uplink 18: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:02:30:setup_element:INFO:	Eye window for uplink 19: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:02:30:setup_element:INFO:	Eye window for uplink 20: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
10:02:30:setup_element:INFO:	Eye window for uplink 21: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
10:02:30:setup_element:INFO:	Eye window for uplink 22: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
10:02:30:setup_element:INFO:	Eye window for uplink 23: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
10:02:30:setup_element:INFO:	Eye window for uplink 24: ________________________________________________________________________________
Clock Delay: 40
10:02:30:setup_element:INFO:	Eye window for uplink 25: ________________________________________________________________________________
Clock Delay: 40
10:02:30:setup_element:INFO:	Eye window for uplink 26: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
10:02:30:setup_element:INFO:	Eye window for uplink 27: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
10:02:30:setup_element:INFO:	Eye window for uplink 28: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
10:02:30:setup_element:INFO:	Eye window for uplink 29: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
10:02:30:setup_element:INFO:	Eye window for uplink 30: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
10:02:30:setup_element:INFO:	Eye window for uplink 31: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
10:02:30:setup_element:INFO:	Setting the clock phase to 30 for group 0, downlink 3
10:02:30:setup_element:INFO:	Scanning data phases
10:02:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:02:30:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:02:36:setup_element:INFO:	Data phase scan results for group 0, downlink 3
10:02:36:setup_element:INFO:	Eye window for uplink 16: _______________XXXX_____________________
Data delay found: 36
10:02:36:setup_element:INFO:	Eye window for uplink 17: ___________XXXX_________________________
Data delay found: 32
10:02:36:setup_element:INFO:	Eye window for uplink 18: _____________XXXXX______________________
Data delay found: 35
10:02:36:setup_element:INFO:	Eye window for uplink 19: __________XXXXX_________________________
Data delay found: 32
10:02:36:setup_element:INFO:	Eye window for uplink 20: __________XXXX__________________________
Data delay found: 31
10:02:36:setup_element:INFO:	Eye window for uplink 21: ________XXXXX___________________________
Data delay found: 30
10:02:36:setup_element:INFO:	Eye window for uplink 22: _____XXXXX______________________________
Data delay found: 27
10:02:36:setup_element:INFO:	Eye window for uplink 23: ___XXXX_________________________________
Data delay found: 24
10:02:36:setup_element:INFO:	Eye window for uplink 24: X__________________________________XXXXX
Data delay found: 17
10:02:36:setup_element:INFO:	Eye window for uplink 25: XXXX___________________________________X
Data delay found: 21
10:02:36:setup_element:INFO:	Eye window for uplink 26: _______________________________XXXXX____
Data delay found: 13
10:02:36:setup_element:INFO:	Eye window for uplink 27: X__________________________________XXXXX
Data delay found: 17
10:02:36:setup_element:INFO:	Eye window for uplink 28: _________________________________XXXXX__
Data delay found: 15
10:02:36:setup_element:INFO:	Eye window for uplink 29: X___________________________________XXXX
Data delay found: 18
10:02:36:setup_element:INFO:	Eye window for uplink 30: __________________________________XXXXX_
Data delay found: 16
10:02:36:setup_element:INFO:	Eye window for uplink 31: ________________________________XXXXX___
Data delay found: 14
10:02:36:setup_element:INFO:	Setting the data phase to 36 for uplink 16
10:02:36:setup_element:INFO:	Setting the data phase to 32 for uplink 17
10:02:36:setup_element:INFO:	Setting the data phase to 35 for uplink 18
10:02:36:setup_element:INFO:	Setting the data phase to 32 for uplink 19
10:02:36:setup_element:INFO:	Setting the data phase to 31 for uplink 20
10:02:36:setup_element:INFO:	Setting the data phase to 30 for uplink 21
10:02:36:setup_element:INFO:	Setting the data phase to 27 for uplink 22
10:02:36:setup_element:INFO:	Setting the data phase to 24 for uplink 23
10:02:36:setup_element:INFO:	Setting the data phase to 17 for uplink 24
10:02:36:setup_element:INFO:	Setting the data phase to 21 for uplink 25
10:02:36:setup_element:INFO:	Setting the data phase to 13 for uplink 26
10:02:36:setup_element:INFO:	Setting the data phase to 17 for uplink 27
10:02:36:setup_element:INFO:	Setting the data phase to 15 for uplink 28
10:02:36:setup_element:INFO:	Setting the data phase to 18 for uplink 29
10:02:36:setup_element:INFO:	Setting the data phase to 16 for uplink 30
10:02:36:setup_element:INFO:	Setting the data phase to 14 for uplink 31
10:02:36:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 30
    Window Length: 70
    Eye Windows:
      Uplink 16: ________________________________________________________________________________
      Uplink 17: ________________________________________________________________________________
      Uplink 18: ____________________________________________________________________XXXXXXXX____
      Uplink 19: ____________________________________________________________________XXXXXXXX____
      Uplink 20: ____________________________________________________________________XXXXXXX_____
      Uplink 21: ____________________________________________________________________XXXXXXX_____
      Uplink 22: ____________________________________________________________________XXXXXXX_____
      Uplink 23: ____________________________________________________________________XXXXXXX_____
      Uplink 24: ________________________________________________________________________________
      Uplink 25: ________________________________________________________________________________
      Uplink 26: __________________________________________________________________XXXXXXXX______
      Uplink 27: __________________________________________________________________XXXXXXXX______
      Uplink 28: __________________________________________________________________XXXXXXX_______
      Uplink 29: __________________________________________________________________XXXXXXX_______
      Uplink 30: ___________________________________________________________________XXXXXXX______
      Uplink 31: ___________________________________________________________________XXXXXXX______
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 36
      Window Length: 36
      Eye Window: _______________XXXX_____________________
    Uplink 17:
      Optimal Phase: 32
      Window Length: 36
      Eye Window: ___________XXXX_________________________
    Uplink 18:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 19:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 20:
      Optimal Phase: 31
      Window Length: 36
      Eye Window: __________XXXX__________________________
    Uplink 21:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 22:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 23:
      Optimal Phase: 24
      Window Length: 36
      Eye Window: ___XXXX_________________________________
    Uplink 24:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 25:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 26:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 27:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 28:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 29:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 30:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 31:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
]
10:02:36:setup_element:INFO:	Beginning SMX ASICs map scan
10:02:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:02:36:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:02:36:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
10:02:36:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
10:02:36:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:02:36:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 17
10:02:36:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 16
10:02:36:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 24
10:02:36:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 25
10:02:36:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 19
10:02:36:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 18
10:02:36:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 26
10:02:36:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 27
10:02:36:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 21
10:02:37:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 20
10:02:37:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 28
10:02:37:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 29
10:02:37:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 23
10:02:37:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 22
10:02:37:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 30
10:02:37:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 31
10:02:38:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 24), (1, 25)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 30), (1, 31)
  Clock Phase Characteristic:
    Optimal Phase: 30
    Window Length: 70
    Eye Windows:
      Uplink 16: ________________________________________________________________________________
      Uplink 17: ________________________________________________________________________________
      Uplink 18: ____________________________________________________________________XXXXXXXX____
      Uplink 19: ____________________________________________________________________XXXXXXXX____
      Uplink 20: ____________________________________________________________________XXXXXXX_____
      Uplink 21: ____________________________________________________________________XXXXXXX_____
      Uplink 22: ____________________________________________________________________XXXXXXX_____
      Uplink 23: ____________________________________________________________________XXXXXXX_____
      Uplink 24: ________________________________________________________________________________
      Uplink 25: ________________________________________________________________________________
      Uplink 26: __________________________________________________________________XXXXXXXX______
      Uplink 27: __________________________________________________________________XXXXXXXX______
      Uplink 28: __________________________________________________________________XXXXXXX_______
      Uplink 29: __________________________________________________________________XXXXXXX_______
      Uplink 30: ___________________________________________________________________XXXXXXX______
      Uplink 31: ___________________________________________________________________XXXXXXX______
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 36
      Window Length: 36
      Eye Window: _______________XXXX_____________________
    Uplink 17:
      Optimal Phase: 32
      Window Length: 36
      Eye Window: ___________XXXX_________________________
    Uplink 18:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 19:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 20:
      Optimal Phase: 31
      Window Length: 36
      Eye Window: __________XXXX__________________________
    Uplink 21:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 22:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 23:
      Optimal Phase: 24
      Window Length: 36
      Eye Window: ___XXXX_________________________________
    Uplink 24:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 25:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 26:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 27:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 28:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 29:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 30:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 31:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___

10:02:38:setup_element:INFO:	Performing Elink synchronization
10:02:38:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:02:38:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:02:38:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
10:02:38:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
10:02:38:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 3
10:02:38:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:02:38:ST3_emu:INFO:	Number of chips: 8
10:02:38:ST3_emu:INFO:	Chip address:  	0x0
10:02:39:ST3_emu:INFO:	Chip address:  	0x1
10:02:39:ST3_emu:INFO:	Chip address:  	0x2
10:02:39:ST3_emu:INFO:	Chip address:  	0x3
10:02:39:ST3_emu:INFO:	Chip address:  	0x4
10:02:39:ST3_emu:INFO:	Chip address:  	0x5
10:02:39:ST3_emu:INFO:	Chip address:  	0x6
10:02:39:ST3_emu:INFO:	Chip address:  	0x7
10:02:39:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:02:40:febtest:INFO:	0-0 | XA-000-08-002-000-000-244-08 |  37.7 | 1171.5
10:02:40:febtest:INFO:	0-1 | XA-000-08-001-064-059-184-11 |  18.7 | 1236.2
10:02:40:febtest:INFO:	0-2 | XA-000-08-001-064-060-008-00 |  28.2 | 1206.9
10:02:40:febtest:INFO:	0-3 | XA-000-08-001-064-060-000-00 |  37.7 | 1165.6
10:02:40:febtest:INFO:	0-4 | XA-000-08-001-064-059-232-09 |  28.2 | 1206.9
10:02:41:febtest:INFO:	0-5 | XA-000-08-001-064-059-168-12 |  25.1 | 1218.6
10:02:41:febtest:INFO:	0-6 | XA-000-08-001-064-040-160-14 |  18.7 | 1253.7
10:02:41:febtest:INFO:	0-7 | XA-000-08-001-064-052-040-02 |  47.3 | 1141.9
10:02:41:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:02:45:ST3_smx:INFO:	chip: 0-0 	 31.389742 C 	 1177.390875 mV
10:02:45:ST3_smx:INFO:	# loops 0
10:02:47:ST3_smx:INFO:	# loops 1
10:02:48:ST3_smx:INFO:	# loops 2
10:02:50:ST3_smx:INFO:	# loops 3
10:02:52:ST3_smx:INFO:	# loops 4
10:02:54:ST3_smx:INFO:	Total # of broken channels: 0
10:02:54:ST3_smx:INFO:	List of broken channels: []
10:02:54:ST3_smx:INFO:	Total # of broken channels: 48
10:02:54:ST3_smx:INFO:	List of broken channels: [3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 81, 83, 85, 87, 93, 95, 97, 103, 105, 111]
10:02:54:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:02:58:ST3_smx:INFO:	chip: 0-1 	 28.225000 C 	 1195.082160 mV
10:02:58:ST3_smx:INFO:	# loops 0
10:03:00:ST3_smx:INFO:	# loops 1
10:03:02:ST3_smx:INFO:	# loops 2
10:03:03:ST3_smx:INFO:	# loops 3
10:03:05:ST3_smx:INFO:	# loops 4
10:03:07:ST3_smx:INFO:	Total # of broken channels: 0
10:03:07:ST3_smx:INFO:	List of broken channels: []
10:03:07:ST3_smx:INFO:	Total # of broken channels: 0
10:03:07:ST3_smx:INFO:	List of broken channels: []
10:03:07:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:03:11:ST3_smx:INFO:	chip: 0-2 	 28.225000 C 	 1195.082160 mV
10:03:11:ST3_smx:INFO:	# loops 0
10:03:13:ST3_smx:INFO:	# loops 1
10:03:15:ST3_smx:INFO:	# loops 2
10:03:16:ST3_smx:INFO:	# loops 3
10:03:18:ST3_smx:INFO:	# loops 4
10:03:20:ST3_smx:INFO:	Total # of broken channels: 0
10:03:20:ST3_smx:INFO:	List of broken channels: []
10:03:20:ST3_smx:INFO:	Total # of broken channels: 0
10:03:20:ST3_smx:INFO:	List of broken channels: []
10:03:20:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:03:24:ST3_smx:INFO:	chip: 0-3 	 47.250730 C 	 1141.874115 mV
10:03:24:ST3_smx:INFO:	# loops 0
10:03:26:ST3_smx:INFO:	# loops 1
10:03:27:ST3_smx:INFO:	# loops 2
10:03:29:ST3_smx:INFO:	# loops 3
10:03:31:ST3_smx:INFO:	# loops 4
10:03:32:ST3_smx:INFO:	Total # of broken channels: 0
10:03:32:ST3_smx:INFO:	List of broken channels: []
10:03:32:ST3_smx:INFO:	Total # of broken channels: 0
10:03:32:ST3_smx:INFO:	List of broken channels: []
10:03:33:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:03:37:ST3_smx:INFO:	chip: 0-4 	 28.225000 C 	 1206.851500 mV
10:03:37:ST3_smx:INFO:	# loops 0
10:03:38:ST3_smx:INFO:	# loops 1
10:03:40:ST3_smx:INFO:	# loops 2
10:03:42:ST3_smx:INFO:	# loops 3
10:03:43:ST3_smx:INFO:	# loops 4
10:03:45:ST3_smx:INFO:	Total # of broken channels: 0
10:03:45:ST3_smx:INFO:	List of broken channels: []
10:03:45:ST3_smx:INFO:	Total # of broken channels: 0
10:03:45:ST3_smx:INFO:	List of broken channels: []
10:03:46:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:03:49:ST3_smx:INFO:	chip: 0-5 	 40.898880 C 	 1177.390875 mV
10:03:49:ST3_smx:INFO:	# loops 0
10:03:51:ST3_smx:INFO:	# loops 1
10:03:53:ST3_smx:INFO:	# loops 2
10:03:54:ST3_smx:INFO:	# loops 3
10:03:56:ST3_smx:INFO:	# loops 4
10:03:58:ST3_smx:INFO:	Total # of broken channels: 6
10:03:58:ST3_smx:INFO:	List of broken channels: [3, 5, 7, 9, 11, 13]
10:03:58:ST3_smx:INFO:	Total # of broken channels: 6
10:03:58:ST3_smx:INFO:	List of broken channels: [3, 5, 7, 9, 11, 13]
10:03:58:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:04:02:ST3_smx:INFO:	chip: 0-6 	 25.062742 C 	 1230.330540 mV
10:04:02:ST3_smx:INFO:	# loops 0
10:04:04:ST3_smx:INFO:	# loops 1
10:04:05:ST3_smx:INFO:	# loops 2
10:04:07:ST3_smx:INFO:	# loops 3
10:04:09:ST3_smx:INFO:	# loops 4
10:04:10:ST3_smx:INFO:	Total # of broken channels: 0
10:04:10:ST3_smx:INFO:	List of broken channels: []
10:04:10:ST3_smx:INFO:	Total # of broken channels: 0
10:04:10:ST3_smx:INFO:	List of broken channels: []
10:04:11:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:04:15:ST3_smx:INFO:	chip: 0-7 	 53.612520 C 	 1135.937260 mV
10:04:15:ST3_smx:INFO:	# loops 0
10:04:16:ST3_smx:INFO:	# loops 1
10:04:18:ST3_smx:INFO:	# loops 2
10:04:20:ST3_smx:INFO:	# loops 3
10:04:21:ST3_smx:INFO:	# loops 4
10:04:23:ST3_smx:INFO:	Total # of broken channels: 0
10:04:23:ST3_smx:INFO:	List of broken channels: []
10:04:23:ST3_smx:INFO:	Total # of broken channels: 0
10:04:23:ST3_smx:INFO:	List of broken channels: []
10:04:24:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:04:24:febtest:INFO:	0-0 | XA-000-08-002-000-000-244-08 |  40.9 | 1159.7
10:04:24:febtest:INFO:	0-1 | XA-000-08-001-064-059-184-11 |  34.6 | 1183.3
10:04:24:febtest:INFO:	0-2 | XA-000-08-001-064-060-008-00 |  34.6 | 1189.2
10:04:24:febtest:INFO:	0-3 | XA-000-08-001-064-060-000-00 |  50.4 | 1135.9
10:04:25:febtest:INFO:	0-4 | XA-000-08-001-064-059-232-09 |  34.6 | 1201.0
10:04:25:febtest:INFO:	0-5 | XA-000-08-001-064-059-168-12 |  44.1 | 1165.6
10:04:25:febtest:INFO:	0-6 | XA-000-08-001-064-040-160-14 |  31.4 | 1224.5
10:04:25:febtest:INFO:	0-7 | XA-000-08-001-064-052-040-02 |  56.8 | 1135.9
10:04:48:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:04:48:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
10:04:48:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:04:48:febtest:INFO:	Tsting FEB with SN 1031
10:04:49:smx_tester:INFO:	Scanning setup
10:04:49:elinks:INFO:	Disabling clock on downlink 0
10:04:49:elinks:INFO:	Disabling clock on downlink 1
10:04:49:elinks:INFO:	Disabling clock on downlink 2
10:04:49:elinks:INFO:	Disabling clock on downlink 3
10:04:49:elinks:INFO:	Disabling clock on downlink 4
10:04:49:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:04:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:04:49:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:04:50:elinks:INFO:	Disabling clock on downlink 0
10:04:50:elinks:INFO:	Disabling clock on downlink 1
10:04:50:elinks:INFO:	Disabling clock on downlink 2
10:04:50:elinks:INFO:	Disabling clock on downlink 3
10:04:50:elinks:INFO:	Disabling clock on downlink 4
10:04:50:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:04:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:04:50:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:04:50:elinks:INFO:	Disabling clock on downlink 0
10:04:50:elinks:INFO:	Disabling clock on downlink 1
10:04:50:elinks:INFO:	Disabling clock on downlink 2
10:04:50:elinks:INFO:	Disabling clock on downlink 3
10:04:50:elinks:INFO:	Disabling clock on downlink 4
10:04:50:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:04:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:04:50:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:04:50:elinks:INFO:	Disabling clock on downlink 0
10:04:50:elinks:INFO:	Disabling clock on downlink 1
10:04:50:elinks:INFO:	Disabling clock on downlink 2
10:04:50:elinks:INFO:	Disabling clock on downlink 3
10:04:50:elinks:INFO:	Disabling clock on downlink 4
10:04:50:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:04:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:04:50:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 16
10:04:50:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 17
10:04:50:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 18
10:04:50:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 19
10:04:50:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 20
10:04:50:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 21
10:04:50:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 22
10:04:50:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 23
10:04:50:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 24
10:04:50:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 25
10:04:50:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 26
10:04:50:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 27
10:04:50:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 28
10:04:50:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 29
10:04:50:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 30
10:04:50:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 31
10:04:50:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:04:50:elinks:INFO:	Disabling clock on downlink 0
10:04:50:elinks:INFO:	Disabling clock on downlink 1
10:04:50:elinks:INFO:	Disabling clock on downlink 2
10:04:50:elinks:INFO:	Disabling clock on downlink 3
10:04:50:elinks:INFO:	Disabling clock on downlink 4
10:04:50:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:04:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:04:50:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:04:50:setup_element:INFO:	Scanning clock phase
10:04:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:04:50:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:04:51:setup_element:INFO:	Clock phase scan results for group 0, downlink 3
10:04:51:setup_element:INFO:	Eye window for uplink 16: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:04:51:setup_element:INFO:	Eye window for uplink 17: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:04:51:setup_element:INFO:	Eye window for uplink 18: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:04:51:setup_element:INFO:	Eye window for uplink 19: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:04:51:setup_element:INFO:	Eye window for uplink 20: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
10:04:51:setup_element:INFO:	Eye window for uplink 21: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
10:04:51:setup_element:INFO:	Eye window for uplink 22: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
10:04:51:setup_element:INFO:	Eye window for uplink 23: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
10:04:51:setup_element:INFO:	Eye window for uplink 24: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
10:04:51:setup_element:INFO:	Eye window for uplink 25: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
10:04:51:setup_element:INFO:	Eye window for uplink 26: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
10:04:51:setup_element:INFO:	Eye window for uplink 27: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
10:04:51:setup_element:INFO:	Eye window for uplink 28: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
10:04:51:setup_element:INFO:	Eye window for uplink 29: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
10:04:51:setup_element:INFO:	Eye window for uplink 30: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
10:04:51:setup_element:INFO:	Eye window for uplink 31: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
10:04:51:setup_element:INFO:	Setting the clock phase to 30 for group 0, downlink 3
10:04:51:setup_element:INFO:	Scanning data phases
10:04:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:04:51:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:04:56:setup_element:INFO:	Data phase scan results for group 0, downlink 3
10:04:56:setup_element:INFO:	Eye window for uplink 16: ______________XXXX______________________
Data delay found: 35
10:04:56:setup_element:INFO:	Eye window for uplink 17: __________XXXXX_________________________
Data delay found: 32
10:04:57:setup_element:INFO:	Eye window for uplink 18: ____________XXXXXX______________________
Data delay found: 34
10:04:57:setup_element:INFO:	Eye window for uplink 19: __________XXXXX_________________________
Data delay found: 32
10:04:57:setup_element:INFO:	Eye window for uplink 20: _________XXXXX__________________________
Data delay found: 31
10:04:57:setup_element:INFO:	Eye window for uplink 21: _______XXXXX____________________________
Data delay found: 29
10:04:57:setup_element:INFO:	Eye window for uplink 22: _____XXXX_______________________________
Data delay found: 26
10:04:57:setup_element:INFO:	Eye window for uplink 23: __XXXX__________________________________
Data delay found: 23
10:04:57:setup_element:INFO:	Eye window for uplink 24: __________________________________XXXXX_
Data delay found: 16
10:04:57:setup_element:INFO:	Eye window for uplink 25: XXX___________________________________XX
Data delay found: 20
10:04:57:setup_element:INFO:	Eye window for uplink 26: _______________________________XXXX_____
Data delay found: 12
10:04:57:setup_element:INFO:	Eye window for uplink 27: X_________________________________XXXXXX
Data delay found: 17
10:04:57:setup_element:INFO:	Eye window for uplink 28: _________________________________XXXXX__
Data delay found: 15
10:04:57:setup_element:INFO:	Eye window for uplink 29: __________________________________XXXXX_
Data delay found: 16
10:04:57:setup_element:INFO:	Eye window for uplink 30: _________________________________XXXXX__
Data delay found: 15
10:04:57:setup_element:INFO:	Eye window for uplink 31: _______________________________XXXXX____
Data delay found: 13
10:04:57:setup_element:INFO:	Setting the data phase to 35 for uplink 16
10:04:57:setup_element:INFO:	Setting the data phase to 32 for uplink 17
10:04:57:setup_element:INFO:	Setting the data phase to 34 for uplink 18
10:04:57:setup_element:INFO:	Setting the data phase to 32 for uplink 19
10:04:57:setup_element:INFO:	Setting the data phase to 31 for uplink 20
10:04:57:setup_element:INFO:	Setting the data phase to 29 for uplink 21
10:04:57:setup_element:INFO:	Setting the data phase to 26 for uplink 22
10:04:57:setup_element:INFO:	Setting the data phase to 23 for uplink 23
10:04:57:setup_element:INFO:	Setting the data phase to 16 for uplink 24
10:04:57:setup_element:INFO:	Setting the data phase to 20 for uplink 25
10:04:57:setup_element:INFO:	Setting the data phase to 12 for uplink 26
10:04:57:setup_element:INFO:	Setting the data phase to 17 for uplink 27
10:04:57:setup_element:INFO:	Setting the data phase to 15 for uplink 28
10:04:57:setup_element:INFO:	Setting the data phase to 16 for uplink 29
10:04:57:setup_element:INFO:	Setting the data phase to 15 for uplink 30
10:04:57:setup_element:INFO:	Setting the data phase to 13 for uplink 31
10:04:57:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 30
    Window Length: 69
    Eye Windows:
      Uplink 16: ___________________________________________________________________XXXXXXXX_____
      Uplink 17: ___________________________________________________________________XXXXXXXX_____
      Uplink 18: _____________________________________________________________________XXXXXXX____
      Uplink 19: _____________________________________________________________________XXXXXXX____
      Uplink 20: ____________________________________________________________________XXXXXXX_____
      Uplink 21: ____________________________________________________________________XXXXXXX_____
      Uplink 22: ____________________________________________________________________XXXXXXX_____
      Uplink 23: ____________________________________________________________________XXXXXXX_____
      Uplink 24: __________________________________________________________________XXXXXXXX______
      Uplink 25: __________________________________________________________________XXXXXXXX______
      Uplink 26: _________________________________________________________________XXXXXXXX_______
      Uplink 27: _________________________________________________________________XXXXXXXX_______
      Uplink 28: __________________________________________________________________XXXXXXX_______
      Uplink 29: __________________________________________________________________XXXXXXX_______
      Uplink 30: __________________________________________________________________XXXXXXX_______
      Uplink 31: __________________________________________________________________XXXXXXX_______
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 35
      Window Length: 36
      Eye Window: ______________XXXX______________________
    Uplink 17:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 18:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________
    Uplink 19:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 20:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 21:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 22:
      Optimal Phase: 26
      Window Length: 36
      Eye Window: _____XXXX_______________________________
    Uplink 23:
      Optimal Phase: 23
      Window Length: 36
      Eye Window: __XXXX__________________________________
    Uplink 24:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 25:
      Optimal Phase: 20
      Window Length: 35
      Eye Window: XXX___________________________________XX
    Uplink 26:
      Optimal Phase: 12
      Window Length: 36
      Eye Window: _______________________________XXXX_____
    Uplink 27:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXXX
    Uplink 28:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 29:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 30:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 31:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
]
10:04:57:setup_element:INFO:	Beginning SMX ASICs map scan
10:04:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:04:57:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:04:57:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
10:04:57:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
10:04:57:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:04:57:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 17
10:04:57:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 16
10:04:57:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 24
10:04:57:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 25
10:04:57:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 19
10:04:57:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 18
10:04:57:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 26
10:04:57:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 27
10:04:57:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 21
10:04:58:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 20
10:04:58:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 28
10:04:58:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 29
10:04:58:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 23
10:04:58:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 22
10:04:58:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 30
10:04:58:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 31
10:04:59:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 24), (1, 25)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 30), (1, 31)
  Clock Phase Characteristic:
    Optimal Phase: 30
    Window Length: 69
    Eye Windows:
      Uplink 16: ___________________________________________________________________XXXXXXXX_____
      Uplink 17: ___________________________________________________________________XXXXXXXX_____
      Uplink 18: _____________________________________________________________________XXXXXXX____
      Uplink 19: _____________________________________________________________________XXXXXXX____
      Uplink 20: ____________________________________________________________________XXXXXXX_____
      Uplink 21: ____________________________________________________________________XXXXXXX_____
      Uplink 22: ____________________________________________________________________XXXXXXX_____
      Uplink 23: ____________________________________________________________________XXXXXXX_____
      Uplink 24: __________________________________________________________________XXXXXXXX______
      Uplink 25: __________________________________________________________________XXXXXXXX______
      Uplink 26: _________________________________________________________________XXXXXXXX_______
      Uplink 27: _________________________________________________________________XXXXXXXX_______
      Uplink 28: __________________________________________________________________XXXXXXX_______
      Uplink 29: __________________________________________________________________XXXXXXX_______
      Uplink 30: __________________________________________________________________XXXXXXX_______
      Uplink 31: __________________________________________________________________XXXXXXX_______
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 35
      Window Length: 36
      Eye Window: ______________XXXX______________________
    Uplink 17:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 18:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________
    Uplink 19:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 20:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 21:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 22:
      Optimal Phase: 26
      Window Length: 36
      Eye Window: _____XXXX_______________________________
    Uplink 23:
      Optimal Phase: 23
      Window Length: 36
      Eye Window: __XXXX__________________________________
    Uplink 24:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 25:
      Optimal Phase: 20
      Window Length: 35
      Eye Window: XXX___________________________________XX
    Uplink 26:
      Optimal Phase: 12
      Window Length: 36
      Eye Window: _______________________________XXXX_____
    Uplink 27:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXXX
    Uplink 28:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 29:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 30:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 31:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____

10:04:59:setup_element:INFO:	Performing Elink synchronization
10:04:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:05:00:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:05:00:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
10:05:00:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
10:05:00:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 3
10:05:00:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:05:00:ST3_emu:INFO:	Number of chips: 8
10:05:00:ST3_emu:INFO:	Chip address:  	0x0
10:05:00:ST3_emu:INFO:	Chip address:  	0x1
10:05:00:ST3_emu:INFO:	Chip address:  	0x2
10:05:00:ST3_emu:INFO:	Chip address:  	0x3
10:05:00:ST3_emu:INFO:	Chip address:  	0x4
10:05:00:ST3_emu:INFO:	Chip address:  	0x5
10:05:00:ST3_emu:INFO:	Chip address:  	0x6
10:05:00:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_0
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_2
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_3
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_4
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_6
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
10:05:01:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:05:01:febtest:INFO:	0-0 | XA-000-08-002-000-000-244-08 |  44.1 | 1165.6
10:05:01:febtest:INFO:	0-1 | XA-000-08-001-064-059-184-11 |  25.1 | 1236.2
10:05:01:febtest:INFO:	0-2 | XA-000-08-001-064-060-008-00 |  31.4 | 1212.7
10:05:02:febtest:INFO:	0-3 | XA-000-08-001-064-060-000-00 |  44.1 | 1177.4
10:05:02:febtest:INFO:	0-4 | XA-000-08-001-064-059-232-09 |  28.2 | 1236.2
10:05:02:febtest:INFO:	0-5 | XA-000-08-001-064-059-168-12 |  25.1 | 1236.2
10:05:02:febtest:INFO:	0-6 | XA-000-08-001-064-040-160-14 |  25.1 | 1247.9
10:05:03:febtest:INFO:	0-7 | XA-000-08-001-064-052-040-02 |  56.8 | 1135.9
10:05:03:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:05:06:ST3_smx:INFO:	chip: 0-0 	 37.726682 C 	 1171.483840 mV
10:05:06:ST3_smx:INFO:	# loops 0
10:05:08:ST3_smx:INFO:	# loops 1
10:05:10:ST3_smx:INFO:	# loops 2
10:05:11:ST3_smx:INFO:	# loops 3
10:05:13:ST3_smx:INFO:	# loops 4
10:05:15:ST3_smx:INFO:	Total # of broken channels: 0
10:05:15:ST3_smx:INFO:	List of broken channels: []
10:05:15:ST3_smx:INFO:	Total # of broken channels: 0
10:05:15:ST3_smx:INFO:	List of broken channels: []
10:05:15:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:05:19:ST3_smx:INFO:	chip: 0-1 	 34.556970 C 	 1189.190035 mV
10:05:19:ST3_smx:INFO:	# loops 0
10:05:21:ST3_smx:INFO:	# loops 1
10:05:22:ST3_smx:INFO:	# loops 2
10:05:24:ST3_smx:INFO:	# loops 3
10:05:25:ST3_smx:INFO:	# loops 4
10:05:27:ST3_smx:INFO:	Total # of broken channels: 0
10:05:27:ST3_smx:INFO:	List of broken channels: []
10:05:27:ST3_smx:INFO:	Total # of broken channels: 0
10:05:27:ST3_smx:INFO:	List of broken channels: []
10:05:28:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:05:31:ST3_smx:INFO:	chip: 0-2 	 34.556970 C 	 1195.082160 mV
10:05:31:ST3_smx:INFO:	# loops 0
10:05:33:ST3_smx:INFO:	# loops 1
10:05:34:ST3_smx:INFO:	# loops 2
10:05:36:ST3_smx:INFO:	# loops 3
10:05:38:ST3_smx:INFO:	# loops 4
10:05:39:ST3_smx:INFO:	Total # of broken channels: 0
10:05:39:ST3_smx:INFO:	List of broken channels: []
10:05:39:ST3_smx:INFO:	Total # of broken channels: 0
10:05:39:ST3_smx:INFO:	List of broken channels: []
10:05:40:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:05:43:ST3_smx:INFO:	chip: 0-3 	 50.430383 C 	 1141.874115 mV
10:05:43:ST3_smx:INFO:	# loops 0
10:05:45:ST3_smx:INFO:	# loops 1
10:05:47:ST3_smx:INFO:	# loops 2
10:05:48:ST3_smx:INFO:	# loops 3
10:05:50:ST3_smx:INFO:	# loops 4
10:05:52:ST3_smx:INFO:	Total # of broken channels: 0
10:05:52:ST3_smx:INFO:	List of broken channels: []
10:05:52:ST3_smx:INFO:	Total # of broken channels: 0
10:05:52:ST3_smx:INFO:	List of broken channels: []
10:05:52:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:05:56:ST3_smx:INFO:	chip: 0-4 	 31.389742 C 	 1218.600960 mV
10:05:56:ST3_smx:INFO:	# loops 0
10:05:58:ST3_smx:INFO:	# loops 1
10:05:59:ST3_smx:INFO:	# loops 2
10:06:01:ST3_smx:INFO:	# loops 3
10:06:02:ST3_smx:INFO:	# loops 4
10:06:04:ST3_smx:INFO:	Total # of broken channels: 0
10:06:04:ST3_smx:INFO:	List of broken channels: []
10:06:04:ST3_smx:INFO:	Total # of broken channels: 0
10:06:04:ST3_smx:INFO:	List of broken channels: []
10:06:05:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:06:08:ST3_smx:INFO:	chip: 0-5 	 40.898880 C 	 1171.483840 mV
10:06:08:ST3_smx:INFO:	# loops 0
10:06:10:ST3_smx:INFO:	# loops 1
10:06:12:ST3_smx:INFO:	# loops 2
10:06:13:ST3_smx:INFO:	# loops 3
10:06:15:ST3_smx:INFO:	# loops 4
10:06:17:ST3_smx:INFO:	Total # of broken channels: 6
10:06:17:ST3_smx:INFO:	List of broken channels: [3, 5, 7, 9, 11, 13]
10:06:17:ST3_smx:INFO:	Total # of broken channels: 6
10:06:17:ST3_smx:INFO:	List of broken channels: [3, 5, 7, 9, 11, 13]
10:06:17:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:06:21:ST3_smx:INFO:	chip: 0-6 	 28.225000 C 	 1230.330540 mV
10:06:21:ST3_smx:INFO:	# loops 0
10:06:22:ST3_smx:INFO:	# loops 1
10:06:24:ST3_smx:INFO:	# loops 2
10:06:26:ST3_smx:INFO:	# loops 3
10:06:27:ST3_smx:INFO:	# loops 4
10:06:29:ST3_smx:INFO:	Total # of broken channels: 0
10:06:29:ST3_smx:INFO:	List of broken channels: []
10:06:29:ST3_smx:INFO:	Total # of broken channels: 0
10:06:29:ST3_smx:INFO:	List of broken channels: []
10:06:29:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:06:33:ST3_smx:INFO:	chip: 0-7 	 56.797143 C 	 1135.937260 mV
10:06:33:ST3_smx:INFO:	# loops 0
10:06:35:ST3_smx:INFO:	# loops 1
10:06:36:ST3_smx:INFO:	# loops 2
10:06:38:ST3_smx:INFO:	# loops 3
10:06:40:ST3_smx:INFO:	# loops 4
10:06:41:ST3_smx:INFO:	Total # of broken channels: 0
10:06:41:ST3_smx:INFO:	List of broken channels: []
10:06:41:ST3_smx:INFO:	Total # of broken channels: 0
10:06:41:ST3_smx:INFO:	List of broken channels: []
10:06:42:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:06:42:febtest:INFO:	0-0 | XA-000-08-002-000-000-244-08 |  44.1 | 1159.7
10:06:42:febtest:INFO:	0-1 | XA-000-08-001-064-059-184-11 |  40.9 | 1177.4
10:06:43:febtest:INFO:	0-2 | XA-000-08-001-064-060-008-00 |  37.7 | 1189.2
10:06:43:febtest:INFO:	0-3 | XA-000-08-001-064-060-000-00 |  53.6 | 1141.9
10:06:43:febtest:INFO:	0-4 | XA-000-08-001-064-059-232-09 |  31.4 | 1212.7
10:06:43:febtest:INFO:	0-5 | XA-000-08-001-064-059-168-12 |  47.3 | 1165.6
10:06:44:febtest:INFO:	0-6 | XA-000-08-001-064-040-160-14 |  28.2 | 1224.5
10:06:44:febtest:INFO:	0-7 | XA-000-08-001-064-052-040-02 |  56.8 | 1135.9
10:06:46:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_1031/A//TestDate_2023_09_01-10_04_48/