FEB_1033    18.10.23 10:30:51

TextEdit.txt
            10:29:58:ST3_hmp4040:INFO:	HAMEG,HMP2030,017836163,HW50010002/SW2.30
10:29:58:febtest:INFO:	FEB8.2 selected
10:30:06:ST3_Shared:INFO:	Listo of operators:Oleksandr S.; 
10:30:13:febtest:INFO:	FEB 8-2 A @ GSI
10:30:17:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
10:30:51:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:30:51:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
10:30:51:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:30:52:febtest:INFO:	Tsting FEB with SN 1033
10:30:53:smx_tester:INFO:	Scanning setup
10:30:53:elinks:INFO:	Disabling clock on downlink 0
10:30:53:elinks:INFO:	Disabling clock on downlink 1
10:30:53:elinks:INFO:	Disabling clock on downlink 2
10:30:53:elinks:INFO:	Disabling clock on downlink 3
10:30:53:elinks:INFO:	Disabling clock on downlink 4
10:30:53:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:30:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:30:53:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:30:53:elinks:INFO:	Disabling clock on downlink 0
10:30:53:elinks:INFO:	Disabling clock on downlink 1
10:30:53:elinks:INFO:	Disabling clock on downlink 2
10:30:53:elinks:INFO:	Disabling clock on downlink 3
10:30:53:elinks:INFO:	Disabling clock on downlink 4
10:30:53:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:30:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:30:53:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:30:53:elinks:INFO:	Disabling clock on downlink 0
10:30:53:elinks:INFO:	Disabling clock on downlink 1
10:30:53:elinks:INFO:	Disabling clock on downlink 2
10:30:53:elinks:INFO:	Disabling clock on downlink 3
10:30:53:elinks:INFO:	Disabling clock on downlink 4
10:30:53:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:30:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:30:53:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:30:53:elinks:INFO:	Disabling clock on downlink 0
10:30:53:elinks:INFO:	Disabling clock on downlink 1
10:30:53:elinks:INFO:	Disabling clock on downlink 2
10:30:53:elinks:INFO:	Disabling clock on downlink 3
10:30:53:elinks:INFO:	Disabling clock on downlink 4
10:30:53:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:30:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:30:54:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 16
10:30:54:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 17
10:30:54:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 18
10:30:54:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 19
10:30:54:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 20
10:30:54:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 21
10:30:54:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 22
10:30:54:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 23
10:30:54:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 24
10:30:54:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 25
10:30:54:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 26
10:30:54:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 27
10:30:54:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 28
10:30:54:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 29
10:30:54:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 30
10:30:54:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 31
10:30:54:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:30:54:elinks:INFO:	Disabling clock on downlink 0
10:30:54:elinks:INFO:	Disabling clock on downlink 1
10:30:54:elinks:INFO:	Disabling clock on downlink 2
10:30:54:elinks:INFO:	Disabling clock on downlink 3
10:30:54:elinks:INFO:	Disabling clock on downlink 4
10:30:54:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:30:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:30:54:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:30:54:setup_element:INFO:	Scanning clock phase
10:30:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:30:54:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:30:54:setup_element:INFO:	Clock phase scan results for group 0, downlink 3
10:30:54:setup_element:INFO:	Eye window for uplink 16: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:30:54:setup_element:INFO:	Eye window for uplink 17: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:30:54:setup_element:INFO:	Eye window for uplink 18: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
10:30:54:setup_element:INFO:	Eye window for uplink 19: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
10:30:54:setup_element:INFO:	Eye window for uplink 20: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
10:30:54:setup_element:INFO:	Eye window for uplink 21: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
10:30:54:setup_element:INFO:	Eye window for uplink 22: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:30:54:setup_element:INFO:	Eye window for uplink 23: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:30:54:setup_element:INFO:	Eye window for uplink 24: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
10:30:54:setup_element:INFO:	Eye window for uplink 25: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
10:30:54:setup_element:INFO:	Eye window for uplink 26: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
10:30:54:setup_element:INFO:	Eye window for uplink 27: __________________________________________________________________XXXXXXXXX_____
Clock Delay: 30
10:30:54:setup_element:INFO:	Eye window for uplink 28: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:30:54:setup_element:INFO:	Eye window for uplink 29: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
10:30:54:setup_element:INFO:	Eye window for uplink 30: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
10:30:54:setup_element:INFO:	Eye window for uplink 31: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
10:30:54:setup_element:INFO:	Setting the clock phase to 30 for group 0, downlink 3
10:30:54:setup_element:INFO:	Scanning data phases
10:30:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:30:54:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:31:00:setup_element:INFO:	Data phase scan results for group 0, downlink 3
10:31:00:setup_element:INFO:	Eye window for uplink 16: __________________XXXX__________________
Data delay found: 39
10:31:00:setup_element:INFO:	Eye window for uplink 17: _____________XXXXX______________________
Data delay found: 35
10:31:00:setup_element:INFO:	Eye window for uplink 18: ____________XXXXX_______________________
Data delay found: 34
10:31:00:setup_element:INFO:	Eye window for uplink 19: _________XXXXX__________________________
Data delay found: 31
10:31:00:setup_element:INFO:	Eye window for uplink 20: _________XXXX___________________________
Data delay found: 30
10:31:00:setup_element:INFO:	Eye window for uplink 21: _______XXXXX____________________________
Data delay found: 29
10:31:00:setup_element:INFO:	Eye window for uplink 22: _____XXXXX______________________________
Data delay found: 27
10:31:00:setup_element:INFO:	Eye window for uplink 23: __XXXXX_________________________________
Data delay found: 24
10:31:00:setup_element:INFO:	Eye window for uplink 24: X___________________________________XXXX
Data delay found: 18
10:31:00:setup_element:INFO:	Eye window for uplink 25: XXXX____________________________________
Data delay found: 21
10:31:00:setup_element:INFO:	Eye window for uplink 26: _________________________________XXXXX__
Data delay found: 15
10:31:00:setup_element:INFO:	Eye window for uplink 27: XXX__________________________________XXX
Data delay found: 19
10:31:00:setup_element:INFO:	Eye window for uplink 28: XX__________________________________X_XX
Data delay found: 18
10:31:00:setup_element:INFO:	Eye window for uplink 29: XXXX___________________________________X
Data delay found: 21
10:31:00:setup_element:INFO:	Eye window for uplink 30: XXX_________________________________XXXX
Data delay found: 19
10:31:00:setup_element:INFO:	Eye window for uplink 31: X_________________________________XXXXX_
Data delay found: 17
10:31:00:setup_element:INFO:	Setting the data phase to 39 for uplink 16
10:31:00:setup_element:INFO:	Setting the data phase to 35 for uplink 17
10:31:00:setup_element:INFO:	Setting the data phase to 34 for uplink 18
10:31:00:setup_element:INFO:	Setting the data phase to 31 for uplink 19
10:31:00:setup_element:INFO:	Setting the data phase to 30 for uplink 20
10:31:00:setup_element:INFO:	Setting the data phase to 29 for uplink 21
10:31:00:setup_element:INFO:	Setting the data phase to 27 for uplink 22
10:31:00:setup_element:INFO:	Setting the data phase to 24 for uplink 23
10:31:00:setup_element:INFO:	Setting the data phase to 18 for uplink 24
10:31:00:setup_element:INFO:	Setting the data phase to 21 for uplink 25
10:31:00:setup_element:INFO:	Setting the data phase to 15 for uplink 26
10:31:00:setup_element:INFO:	Setting the data phase to 19 for uplink 27
10:31:00:setup_element:INFO:	Setting the data phase to 18 for uplink 28
10:31:00:setup_element:INFO:	Setting the data phase to 21 for uplink 29
10:31:00:setup_element:INFO:	Setting the data phase to 19 for uplink 30
10:31:00:setup_element:INFO:	Setting the data phase to 17 for uplink 31
10:31:00:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 30
    Window Length: 70
    Eye Windows:
      Uplink 16: _____________________________________________________________________XXXXXXX____
      Uplink 17: _____________________________________________________________________XXXXXXX____
      Uplink 18: ____________________________________________________________________XXXXXXX_____
      Uplink 19: ____________________________________________________________________XXXXXXX_____
      Uplink 20: ____________________________________________________________________XXXXXXX_____
      Uplink 21: ____________________________________________________________________XXXXXXX_____
      Uplink 22: ____________________________________________________________________XXXXXXXX____
      Uplink 23: ____________________________________________________________________XXXXXXXX____
      Uplink 24: ___________________________________________________________________XXXXXXX______
      Uplink 25: ___________________________________________________________________XXXXXXX______
      Uplink 26: __________________________________________________________________XXXXXXXXX_____
      Uplink 27: __________________________________________________________________XXXXXXXXX_____
      Uplink 28: ___________________________________________________________________XXXXXXXX_____
      Uplink 29: ___________________________________________________________________XXXXXXXX_____
      Uplink 30: ____________________________________________________________________XXXXXXX_____
      Uplink 31: ____________________________________________________________________XXXXXXX_____
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 39
      Window Length: 36
      Eye Window: __________________XXXX__________________
    Uplink 17:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 18:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 19:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 20:
      Optimal Phase: 30
      Window Length: 36
      Eye Window: _________XXXX___________________________
    Uplink 21:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 22:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 23:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 24:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 25:
      Optimal Phase: 21
      Window Length: 36
      Eye Window: XXXX____________________________________
    Uplink 26:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 27:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 28:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________X_XX
    Uplink 29:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 30:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX
    Uplink 31:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXX_
]
10:31:00:setup_element:INFO:	Beginning SMX ASICs map scan
10:31:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:31:00:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:31:00:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
10:31:00:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
10:31:00:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:31:00:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 17
10:31:00:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 16
10:31:00:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 24
10:31:00:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 25
10:31:00:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 19
10:31:00:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 18
10:31:01:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 26
10:31:01:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 27
10:31:01:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 21
10:31:01:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 20
10:31:01:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 28
10:31:01:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 29
10:31:01:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 23
10:31:01:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 22
10:31:01:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 30
10:31:01:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 31
10:31:03:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 24), (1, 25)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 30), (1, 31)
  Clock Phase Characteristic:
    Optimal Phase: 30
    Window Length: 70
    Eye Windows:
      Uplink 16: _____________________________________________________________________XXXXXXX____
      Uplink 17: _____________________________________________________________________XXXXXXX____
      Uplink 18: ____________________________________________________________________XXXXXXX_____
      Uplink 19: ____________________________________________________________________XXXXXXX_____
      Uplink 20: ____________________________________________________________________XXXXXXX_____
      Uplink 21: ____________________________________________________________________XXXXXXX_____
      Uplink 22: ____________________________________________________________________XXXXXXXX____
      Uplink 23: ____________________________________________________________________XXXXXXXX____
      Uplink 24: ___________________________________________________________________XXXXXXX______
      Uplink 25: ___________________________________________________________________XXXXXXX______
      Uplink 26: __________________________________________________________________XXXXXXXXX_____
      Uplink 27: __________________________________________________________________XXXXXXXXX_____
      Uplink 28: ___________________________________________________________________XXXXXXXX_____
      Uplink 29: ___________________________________________________________________XXXXXXXX_____
      Uplink 30: ____________________________________________________________________XXXXXXX_____
      Uplink 31: ____________________________________________________________________XXXXXXX_____
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 39
      Window Length: 36
      Eye Window: __________________XXXX__________________
    Uplink 17:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 18:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 19:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 20:
      Optimal Phase: 30
      Window Length: 36
      Eye Window: _________XXXX___________________________
    Uplink 21:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 22:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 23:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 24:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 25:
      Optimal Phase: 21
      Window Length: 36
      Eye Window: XXXX____________________________________
    Uplink 26:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 27:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 28:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________X_XX
    Uplink 29:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 30:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX
    Uplink 31:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXX_

10:31:03:setup_element:INFO:	Performing Elink synchronization
10:31:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:31:03:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
10:31:03:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
10:31:03:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
10:31:03:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 3
10:31:03:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:31:03:ST3_emu:INFO:	Number of chips: 8
10:31:03:ST3_emu:INFO:	Chip address:  	0x0
10:31:03:ST3_emu:INFO:	Chip address:  	0x1
10:31:03:ST3_emu:INFO:	Chip address:  	0x2
10:31:03:ST3_emu:INFO:	Chip address:  	0x3
10:31:03:ST3_emu:INFO:	Chip address:  	0x4
10:31:03:ST3_emu:INFO:	Chip address:  	0x5
10:31:03:ST3_emu:INFO:	Chip address:  	0x6
10:31:03:ST3_emu:INFO:	Chip address:  	0x7
10:31:04:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:31:04:febtest:INFO:	0-0 | XA-000-08-002-000-002-188-14 |  15.6 | 1218.6
10:31:04:febtest:INFO:	0-1 | XA-000-08-002-000-002-197-02 |  25.1 | 1183.3
10:31:05:febtest:INFO:	0-2 | XA-000-08-002-000-002-192-02 |  15.6 | 1224.5
10:31:05:febtest:INFO:	0-3 | XA-000-08-002-000-002-196-02 |  18.7 | 1212.7
10:31:05:febtest:INFO:	0-4 | XA-000-08-002-000-002-198-02 |  18.7 | 1212.7
10:31:05:febtest:INFO:	0-5 | XA-000-08-002-000-002-199-02 |   3.0 | 1271.2
10:31:06:febtest:INFO:	0-6 | XA-000-08-002-000-002-203-02 |  25.1 | 1189.2
10:31:06:febtest:INFO:	0-7 | XA-000-08-002-000-002-201-02 |  15.6 | 1224.5
10:31:06:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:31:09:ST3_smx:INFO:	chip: 0-0 	 15.590880 C 	 1200.969315 mV
10:31:09:ST3_smx:INFO:	# loops 0
10:31:11:ST3_smx:INFO:	# loops 1
10:31:13:ST3_smx:INFO:	# loops 2
10:31:14:ST3_smx:INFO:	# loops 3
10:31:16:ST3_smx:INFO:	# loops 4
10:31:17:ST3_smx:INFO:	Total # of broken channels: 0
10:31:17:ST3_smx:INFO:	List of broken channels: []
10:31:17:ST3_smx:INFO:	Total # of broken channels: 0
10:31:17:ST3_smx:INFO:	List of broken channels: []
10:31:18:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:31:22:ST3_smx:INFO:	chip: 0-1 	 18.745682 C 	 1195.082160 mV
10:31:22:ST3_smx:INFO:	# loops 0
10:31:24:ST3_smx:INFO:	# loops 1
10:31:26:ST3_smx:INFO:	# loops 2
10:31:27:ST3_smx:INFO:	# loops 3
10:31:29:ST3_smx:INFO:	# loops 4
10:31:30:ST3_smx:INFO:	Total # of broken channels: 0
10:31:30:ST3_smx:INFO:	List of broken channels: []
10:31:30:ST3_smx:INFO:	Total # of broken channels: 0
10:31:30:ST3_smx:INFO:	List of broken channels: []
10:31:31:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:31:34:ST3_smx:INFO:	chip: 0-2 	 28.225000 C 	 1177.390875 mV
10:31:34:ST3_smx:INFO:	# loops 0
10:31:36:ST3_smx:INFO:	# loops 1
10:31:38:ST3_smx:INFO:	# loops 2
10:31:39:ST3_smx:INFO:	# loops 3
10:31:41:ST3_smx:INFO:	# loops 4
10:31:42:ST3_smx:INFO:	Total # of broken channels: 0
10:31:42:ST3_smx:INFO:	List of broken channels: []
10:31:42:ST3_smx:INFO:	Total # of broken channels: 0
10:31:42:ST3_smx:INFO:	List of broken channels: []
10:31:43:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:31:46:ST3_smx:INFO:	chip: 0-3 	 9.288730 C 	 1236.187875 mV
10:31:46:ST3_smx:INFO:	# loops 0
10:31:48:ST3_smx:INFO:	# loops 1
10:31:49:ST3_smx:INFO:	# loops 2
10:31:51:ST3_smx:INFO:	# loops 3
10:31:53:ST3_smx:INFO:	# loops 4
10:31:54:ST3_smx:INFO:	Total # of broken channels: 0
10:31:54:ST3_smx:INFO:	List of broken channels: []
10:31:54:ST3_smx:INFO:	Total # of broken channels: 0
10:31:54:ST3_smx:INFO:	List of broken channels: []
10:31:55:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:31:58:ST3_smx:INFO:	chip: 0-4 	 25.062742 C 	 1195.082160 mV
10:31:58:ST3_smx:INFO:	# loops 0
10:32:00:ST3_smx:INFO:	# loops 1
10:32:01:ST3_smx:INFO:	# loops 2
10:32:03:ST3_smx:INFO:	# loops 3
10:32:05:ST3_smx:INFO:	# loops 4
10:32:06:ST3_smx:INFO:	Total # of broken channels: 0
10:32:06:ST3_smx:INFO:	List of broken channels: []
10:32:06:ST3_smx:INFO:	Total # of broken channels: 0
10:32:06:ST3_smx:INFO:	List of broken channels: []
10:32:07:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:32:10:ST3_smx:INFO:	chip: 0-5 	 21.902970 C 	 1200.969315 mV
10:32:10:ST3_smx:INFO:	# loops 0
10:32:12:ST3_smx:INFO:	# loops 1
10:32:13:ST3_smx:INFO:	# loops 2
10:32:15:ST3_smx:INFO:	# loops 3
10:32:17:ST3_smx:INFO:	# loops 4
10:32:18:ST3_smx:INFO:	Total # of broken channels: 0
10:32:18:ST3_smx:INFO:	List of broken channels: []
10:32:18:ST3_smx:INFO:	Total # of broken channels: 0
10:32:18:ST3_smx:INFO:	List of broken channels: []
10:32:19:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:32:22:ST3_smx:INFO:	chip: 0-6 	 25.062742 C 	 1189.190035 mV
10:32:22:ST3_smx:INFO:	# loops 0
10:32:24:ST3_smx:INFO:	# loops 1
10:32:25:ST3_smx:INFO:	# loops 2
10:32:27:ST3_smx:INFO:	# loops 3
10:32:28:ST3_smx:INFO:	# loops 4
10:32:30:ST3_smx:INFO:	Total # of broken channels: 0
10:32:30:ST3_smx:INFO:	List of broken channels: []
10:32:30:ST3_smx:INFO:	Total # of broken channels: 0
10:32:30:ST3_smx:INFO:	List of broken channels: []
10:32:31:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:32:34:ST3_smx:INFO:	chip: 0-7 	 21.902970 C 	 1200.969315 mV
10:32:34:ST3_smx:INFO:	# loops 0
10:32:36:ST3_smx:INFO:	# loops 1
10:32:37:ST3_smx:INFO:	# loops 2
10:32:39:ST3_smx:INFO:	# loops 3
10:32:41:ST3_smx:INFO:	# loops 4
10:32:42:ST3_smx:INFO:	Total # of broken channels: 0
10:32:42:ST3_smx:INFO:	List of broken channels: []
10:32:42:ST3_smx:INFO:	Total # of broken channels: 1
10:32:42:ST3_smx:INFO:	List of broken channels: [1]
10:32:43:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:32:43:febtest:INFO:	0-0 | XA-000-08-002-000-002-188-14 |  21.9 | 1195.1
10:32:43:febtest:INFO:	0-1 | XA-000-08-002-000-002-197-02 |  21.9 | 1189.2
10:32:44:febtest:INFO:	0-2 | XA-000-08-002-000-002-192-02 |  31.4 | 1165.6
10:32:44:febtest:INFO:	0-3 | XA-000-08-002-000-002-196-02 |  12.4 | 1230.3
10:32:44:febtest:INFO:	0-4 | XA-000-08-002-000-002-198-02 |  28.2 | 1189.2
10:32:44:febtest:INFO:	0-5 | XA-000-08-002-000-002-199-02 |  25.1 | 1189.2
10:32:44:febtest:INFO:	0-6 | XA-000-08-002-000-002-203-02 |  28.2 | 1189.2
10:32:45:febtest:INFO:	0-7 | XA-000-08-002-000-002-201-02 |  25.1 | 1201.0
10:32:53:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_1033/TestDate_2023_10_18-10_30_51/

          
Comment.txt
M3DL1B0001120B2