
FEB_1036 08.12.23 07:41:54
TextEdit.txt
07:41:08:ST3_hmp4040:INFO: HAMEG,HMP2030,017836163,HW50010002/SW2.30 07:41:35:ST3_Shared:INFO: Listo of operators:Olga B.; 07:41:51:febtest:INFO: FEB 8-2 selected 07:41:51:smx_tester:INFO: Setting Elink clock mode to 160 MHz 07:41:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 07:41:54:ST3_Shared:INFO: -------------------------FEB-Sensor------------------------- 07:41:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 07:43:12:ST3_ModuleSelector:INFO: L4UL001055 M4UL0B3010553A2 124 B 07:43:12:ST3_ModuleSelector:INFO: 19214 07:43:12:febtest:INFO: Testing FEB with SN 1063 07:43:13:smx_tester:INFO: Scanning setup 07:43:13:elinks:INFO: Disabling clock on downlink 0 07:43:13:elinks:INFO: Disabling clock on downlink 1 07:43:13:elinks:INFO: Disabling clock on downlink 2 07:43:13:elinks:INFO: Disabling clock on downlink 3 07:43:13:elinks:INFO: Disabling clock on downlink 4 07:43:13:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:43:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 07:43:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:43:14:elinks:INFO: Disabling clock on downlink 0 07:43:14:elinks:INFO: Disabling clock on downlink 1 07:43:14:elinks:INFO: Disabling clock on downlink 2 07:43:14:elinks:INFO: Disabling clock on downlink 3 07:43:14:elinks:INFO: Disabling clock on downlink 4 07:43:14:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:43:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:43:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 07:43:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 07:43:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 07:43:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 07:43:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 07:43:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 07:43:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 07:43:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 07:43:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 07:43:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 07:43:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 07:43:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 07:43:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 07:43:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 07:43:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 07:43:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 07:43:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:43:14:elinks:INFO: Disabling clock on downlink 0 07:43:14:elinks:INFO: Disabling clock on downlink 1 07:43:14:elinks:INFO: Disabling clock on downlink 2 07:43:14:elinks:INFO: Disabling clock on downlink 3 07:43:14:elinks:INFO: Disabling clock on downlink 4 07:43:14:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:43:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:43:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:43:14:elinks:INFO: Disabling clock on downlink 0 07:43:14:elinks:INFO: Disabling clock on downlink 1 07:43:14:elinks:INFO: Disabling clock on downlink 2 07:43:14:elinks:INFO: Disabling clock on downlink 3 07:43:14:elinks:INFO: Disabling clock on downlink 4 07:43:14:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:43:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 07:43:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:43:14:elinks:INFO: Disabling clock on downlink 0 07:43:14:elinks:INFO: Disabling clock on downlink 1 07:43:14:elinks:INFO: Disabling clock on downlink 2 07:43:14:elinks:INFO: Disabling clock on downlink 3 07:43:14:elinks:INFO: Disabling clock on downlink 4 07:43:14:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:43:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 07:43:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:43:14:setup_element:INFO: Scanning clock phase 07:43:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:43:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 07:43:15:setup_element:INFO: Clock phase scan results for group 0, downlink 1 07:43:15:setup_element:INFO: Eye window for uplink 0 : __________________________________________________________________________XXXXXX Clock Delay: 36 07:43:15:setup_element:INFO: Eye window for uplink 1 : __________________________________________________________________________XXXXXX Clock Delay: 36 07:43:15:setup_element:INFO: Eye window for uplink 2 : X________________________________________________________________________XXXXXXX Clock Delay: 36 07:43:15:setup_element:INFO: Eye window for uplink 3 : X________________________________________________________________________XXXXXXX Clock Delay: 36 07:43:15:setup_element:INFO: Eye window for uplink 4 : X________________________________________________________________________XXXXXXX Clock Delay: 36 07:43:15:setup_element:INFO: Eye window for uplink 5 : X________________________________________________________________________XXXXXXX Clock Delay: 36 07:43:15:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXXXX Clock Delay: 35 07:43:15:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXXXX Clock Delay: 35 07:43:15:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 07:43:15:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 07:43:15:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 07:43:15:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 07:43:15:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 07:43:15:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 07:43:15:setup_element:INFO: Eye window for uplink 14: X_______________________________________________________________________XXXXXXXX Clock Delay: 36 07:43:15:setup_element:INFO: Eye window for uplink 15: X_______________________________________________________________________XXXXXXXX Clock Delay: 36 07:43:15:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1 07:43:15:setup_element:INFO: Scanning data phases 07:43:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:43:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 07:43:20:setup_element:INFO: Data phase scan results for group 0, downlink 1 07:43:20:setup_element:INFO: Eye window for uplink 0 : ____________XXXXX_______________________ Data delay found: 34 07:43:20:setup_element:INFO: Eye window for uplink 1 : ________XXXXX___________________________ Data delay found: 30 07:43:20:setup_element:INFO: Eye window for uplink 2 : _________XXXX___________________________ Data delay found: 30 07:43:20:setup_element:INFO: Eye window for uplink 3 : ______XXXXX_____________________________ Data delay found: 28 07:43:20:setup_element:INFO: Eye window for uplink 4 : _______XXXXX____________________________ Data delay found: 29 07:43:20:setup_element:INFO: Eye window for uplink 5 : ___XXXXX________________________________ Data delay found: 25 07:43:20:setup_element:INFO: Eye window for uplink 6 : XXX___________________________________XX Data delay found: 20 07:43:20:setup_element:INFO: Eye window for uplink 7 : __________________________________XXXX__ Data delay found: 15 07:43:20:setup_element:INFO: Eye window for uplink 8 : ___________________________XXXX_________ Data delay found: 8 07:43:20:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXXX____ Data delay found: 13 07:43:20:setup_element:INFO: Eye window for uplink 10: __________________________XXXXXX________ Data delay found: 8 07:43:20:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXX_____ Data delay found: 12 07:43:20:setup_element:INFO: Eye window for uplink 12: ____________________________XXXXX_______ Data delay found: 10 07:43:20:setup_element:INFO: Eye window for uplink 13: _______________________________XXXXX____ Data delay found: 13 07:43:20:setup_element:INFO: Eye window for uplink 14: _____________________________XXXXX______ Data delay found: 11 07:43:20:setup_element:INFO: Eye window for uplink 15: ________________________________XXXXX___ Data delay found: 14 07:43:20:setup_element:INFO: Setting the data phase to 34 for uplink 0 07:43:20:setup_element:INFO: Setting the data phase to 30 for uplink 1 07:43:20:setup_element:INFO: Setting the data phase to 30 for uplink 2 07:43:20:setup_element:INFO: Setting the data phase to 28 for uplink 3 07:43:20:setup_element:INFO: Setting the data phase to 29 for uplink 4 07:43:20:setup_element:INFO: Setting the data phase to 25 for uplink 5 07:43:20:setup_element:INFO: Setting the data phase to 20 for uplink 6 07:43:20:setup_element:INFO: Setting the data phase to 15 for uplink 7 07:43:20:setup_element:INFO: Setting the data phase to 8 for uplink 8 07:43:20:setup_element:INFO: Setting the data phase to 13 for uplink 9 07:43:20:setup_element:INFO: Setting the data phase to 8 for uplink 10 07:43:20:setup_element:INFO: Setting the data phase to 12 for uplink 11 07:43:20:setup_element:INFO: Setting the data phase to 10 for uplink 12 07:43:20:setup_element:INFO: Setting the data phase to 13 for uplink 13 07:43:20:setup_element:INFO: Setting the data phase to 11 for uplink 14 07:43:20:setup_element:INFO: Setting the data phase to 14 for uplink 15 07:43:20:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 35 Window Length: 70 Eye Windows: Uplink 0: __________________________________________________________________________XXXXXX Uplink 1: __________________________________________________________________________XXXXXX Uplink 2: X________________________________________________________________________XXXXXXX Uplink 3: X________________________________________________________________________XXXXXXX Uplink 4: X________________________________________________________________________XXXXXXX Uplink 5: X________________________________________________________________________XXXXXXX Uplink 6: ________________________________________________________________________XXXXXXXX Uplink 7: ________________________________________________________________________XXXXXXXX Uplink 8: _______________________________________________________________________XXXXXXXX_ Uplink 9: _______________________________________________________________________XXXXXXXX_ Uplink 10: _______________________________________________________________________XXXXXXXX_ Uplink 11: _______________________________________________________________________XXXXXXXX_ Uplink 12: _______________________________________________________________________XXXXXXXX_ Uplink 13: _______________________________________________________________________XXXXXXXX_ Uplink 14: X_______________________________________________________________________XXXXXXXX Uplink 15: X_______________________________________________________________________XXXXXXXX Data phase characteristics: Uplink 0: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ Uplink 1: Optimal Phase: 30 Window Length: 35 Eye Window: ________XXXXX___________________________ Uplink 2: Optimal Phase: 30 Window Length: 36 Eye Window: _________XXXX___________________________ Uplink 3: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 4: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 5: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 6: Optimal Phase: 20 Window Length: 35 Eye Window: XXX___________________________________XX Uplink 7: Optimal Phase: 15 Window Length: 36 Eye Window: __________________________________XXXX__ Uplink 8: Optimal Phase: 8 Window Length: 36 Eye Window: ___________________________XXXX_________ Uplink 9: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 10: Optimal Phase: 8 Window Length: 34 Eye Window: __________________________XXXXXX________ Uplink 11: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 12: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ Uplink 13: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 14: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 15: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ ] 07:43:20:setup_element:INFO: Beginning SMX ASICs map scan 07:43:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:43:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 07:43:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 07:43:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 07:43:20:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 07:43:21:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 07:43:21:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 07:43:21:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 07:43:21:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 07:43:21:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 07:43:21:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 07:43:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 07:43:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 07:43:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 07:43:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 07:43:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 07:43:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 07:43:22:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 07:43:22:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 07:43:22:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 07:43:22:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 07:43:23:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0) ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9) ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2) ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4) ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13) ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6) ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15) Clock Phase Characteristic: Optimal Phase: 35 Window Length: 70 Eye Windows: Uplink 0: __________________________________________________________________________XXXXXX Uplink 1: __________________________________________________________________________XXXXXX Uplink 2: X________________________________________________________________________XXXXXXX Uplink 3: X________________________________________________________________________XXXXXXX Uplink 4: X________________________________________________________________________XXXXXXX Uplink 5: X________________________________________________________________________XXXXXXX Uplink 6: ________________________________________________________________________XXXXXXXX Uplink 7: ________________________________________________________________________XXXXXXXX Uplink 8: _______________________________________________________________________XXXXXXXX_ Uplink 9: _______________________________________________________________________XXXXXXXX_ Uplink 10: _______________________________________________________________________XXXXXXXX_ Uplink 11: _______________________________________________________________________XXXXXXXX_ Uplink 12: _______________________________________________________________________XXXXXXXX_ Uplink 13: _______________________________________________________________________XXXXXXXX_ Uplink 14: X_______________________________________________________________________XXXXXXXX Uplink 15: X_______________________________________________________________________XXXXXXXX Data phase characteristics: Uplink 0: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ Uplink 1: Optimal Phase: 30 Window Length: 35 Eye Window: ________XXXXX___________________________ Uplink 2: Optimal Phase: 30 Window Length: 36 Eye Window: _________XXXX___________________________ Uplink 3: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 4: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 5: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 6: Optimal Phase: 20 Window Length: 35 Eye Window: XXX___________________________________XX Uplink 7: Optimal Phase: 15 Window Length: 36 Eye Window: __________________________________XXXX__ Uplink 8: Optimal Phase: 8 Window Length: 36 Eye Window: ___________________________XXXX_________ Uplink 9: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 10: Optimal Phase: 8 Window Length: 34 Eye Window: __________________________XXXXXX________ Uplink 11: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 12: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ Uplink 13: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 14: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 15: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ 07:43:23:setup_element:INFO: Performing Elink synchronization 07:43:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:43:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 07:43:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 07:43:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 07:43:23:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 07:43:23:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 07:43:23:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)] 07:43:25:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 07:43:25:febtest:INFO: 1-0 | XA-000-08-002-001-007-236-15 | 28.2 | 1189.2 07:43:25:febtest:INFO: 8-1 | XA-000-08-002-001-007-248-08 | 18.7 | 1212.7 07:43:25:febtest:INFO: 3-2 | XA-000-08-002-001-008-003-10 | 6.1 | 1277.1 07:43:25:febtest:INFO: 10-3 | XA-000-08-002-001-007-230-15 | 21.9 | 1206.9 07:43:26:febtest:INFO: 5-4 | XA-000-08-002-001-008-030-13 | 12.4 | 1247.9 07:43:26:febtest:INFO: 12-5 | XA-000-08-002-001-007-232-15 | 25.1 | 1195.1 07:43:26:febtest:INFO: 7-6 | XA-000-08-002-001-007-241-08 | 25.1 | 1206.9 07:43:26:febtest:INFO: 14-7 | XA-000-08-002-001-007-237-15 | 21.9 | 1224.5 07:43:27:ST3_smx:INFO: Configuring SMX FAST 07:43:29:ST3_smx:INFO: chip: 1-0 34.556970 C 1171.483840 mV 07:43:29:ST3_smx:INFO: Electrons 07:43:29:ST3_smx:INFO: # loops 0 07:43:30:ST3_smx:INFO: # loops 1 07:43:32:ST3_smx:INFO: # loops 2 07:43:34:ST3_smx:INFO: # loops 3 07:43:35:ST3_smx:INFO: # loops 4 07:43:37:ST3_smx:INFO: Total # of broken channels: 0 07:43:37:ST3_smx:INFO: List of broken channels: [] 07:43:37:ST3_smx:INFO: Total # of broken channels: 0 07:43:37:ST3_smx:INFO: List of broken channels: [] 07:43:38:ST3_smx:INFO: Configuring SMX FAST 07:43:40:ST3_smx:INFO: chip: 8-1 28.225000 C 1189.190035 mV 07:43:40:ST3_smx:INFO: Electrons 07:43:40:ST3_smx:INFO: # loops 0 07:43:41:ST3_smx:INFO: # loops 1 07:43:43:ST3_smx:INFO: # loops 2 07:43:45:ST3_smx:INFO: # loops 3 07:43:47:ST3_smx:INFO: # loops 4 07:43:48:ST3_smx:INFO: Total # of broken channels: 0 07:43:48:ST3_smx:INFO: List of broken channels: [] 07:43:48:ST3_smx:INFO: Total # of broken channels: 0 07:43:48:ST3_smx:INFO: List of broken channels: [] 07:43:49:ST3_smx:INFO: Configuring SMX FAST 07:43:51:ST3_smx:INFO: chip: 3-2 18.745682 C 1242.040240 mV 07:43:51:ST3_smx:INFO: Electrons 07:43:51:ST3_smx:INFO: # loops 0 07:43:52:ST3_smx:INFO: # loops 1 07:43:54:ST3_smx:INFO: # loops 2 07:43:56:ST3_smx:INFO: # loops 3 07:43:58:ST3_smx:INFO: # loops 4 07:43:59:ST3_smx:INFO: Total # of broken channels: 0 07:43:59:ST3_smx:INFO: List of broken channels: [] 07:43:59:ST3_smx:INFO: Total # of broken channels: 0 07:43:59:ST3_smx:INFO: List of broken channels: [] 07:44:00:ST3_smx:INFO: Configuring SMX FAST 07:44:02:ST3_smx:INFO: chip: 10-3 21.902970 C 1206.851500 mV 07:44:02:ST3_smx:INFO: Electrons 07:44:02:ST3_smx:INFO: # loops 0 07:44:03:ST3_smx:INFO: # loops 1 07:44:05:ST3_smx:INFO: # loops 2 07:44:07:ST3_smx:INFO: # loops 3 07:44:09:ST3_smx:INFO: # loops 4 07:44:10:ST3_smx:INFO: Total # of broken channels: 0 07:44:10:ST3_smx:INFO: List of broken channels: [] 07:44:10:ST3_smx:INFO: Total # of broken channels: 0 07:44:10:ST3_smx:INFO: List of broken channels: [] 07:44:11:ST3_smx:INFO: Configuring SMX FAST 07:44:13:ST3_smx:INFO: chip: 5-4 18.745682 C 1236.187875 mV 07:44:13:ST3_smx:INFO: Electrons 07:44:13:ST3_smx:INFO: # loops 0 07:44:14:ST3_smx:INFO: # loops 1 07:44:16:ST3_smx:INFO: # loops 2 07:44:18:ST3_smx:INFO: # loops 3 07:44:20:ST3_smx:INFO: # loops 4 07:44:21:ST3_smx:INFO: Total # of broken channels: 0 07:44:21:ST3_smx:INFO: List of broken channels: [] 07:44:21:ST3_smx:INFO: Total # of broken channels: 0 07:44:21:ST3_smx:INFO: List of broken channels: [] 07:44:22:ST3_smx:INFO: Configuring SMX FAST 07:44:24:ST3_smx:INFO: chip: 12-5 25.062742 C 1206.851500 mV 07:44:24:ST3_smx:INFO: Electrons 07:44:24:ST3_smx:INFO: # loops 0 07:44:25:ST3_smx:INFO: # loops 1 07:44:27:ST3_smx:INFO: # loops 2 07:44:29:ST3_smx:INFO: # loops 3 07:44:30:ST3_smx:INFO: # loops 4 07:44:32:ST3_smx:INFO: Total # of broken channels: 0 07:44:32:ST3_smx:INFO: List of broken channels: [] 07:44:32:ST3_smx:INFO: Total # of broken channels: 0 07:44:32:ST3_smx:INFO: List of broken channels: [] 07:44:33:ST3_smx:INFO: Configuring SMX FAST 07:44:35:ST3_smx:INFO: chip: 7-6 31.389742 C 1206.851500 mV 07:44:35:ST3_smx:INFO: Electrons 07:44:35:ST3_smx:INFO: # loops 0 07:44:36:ST3_smx:INFO: # loops 1 07:44:38:ST3_smx:INFO: # loops 2 07:44:40:ST3_smx:INFO: # loops 3 07:44:41:ST3_smx:INFO: # loops 4 07:44:43:ST3_smx:INFO: Total # of broken channels: 0 07:44:43:ST3_smx:INFO: List of broken channels: [] 07:44:43:ST3_smx:INFO: Total # of broken channels: 0 07:44:43:ST3_smx:INFO: List of broken channels: [] 07:44:43:ST3_smx:INFO: Configuring SMX FAST 07:44:45:ST3_smx:INFO: chip: 14-7 21.902970 C 1236.187875 mV 07:44:45:ST3_smx:INFO: Electrons 07:44:45:ST3_smx:INFO: # loops 0 07:44:47:ST3_smx:INFO: # loops 1 07:44:49:ST3_smx:INFO: # loops 2 07:44:51:ST3_smx:INFO: # loops 3 07:44:52:ST3_smx:INFO: # loops 4 07:44:54:ST3_smx:INFO: Total # of broken channels: 0 07:44:54:ST3_smx:INFO: List of broken channels: [] 07:44:54:ST3_smx:INFO: Total # of broken channels: 0 07:44:54:ST3_smx:INFO: List of broken channels: [] 07:44:55:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 07:44:55:febtest:INFO: 1-0 | XA-000-08-002-001-007-236-15 | 37.7 | 1171.5 07:44:55:febtest:INFO: 8-1 | XA-000-08-002-001-007-248-08 | 28.2 | 1189.2 07:44:55:febtest:INFO: 3-2 | XA-000-08-002-001-008-003-10 | 18.7 | 1242.0 07:44:56:febtest:INFO: 10-3 | XA-000-08-002-001-007-230-15 | 25.1 | 1206.9 07:44:56:febtest:INFO: 5-4 | XA-000-08-002-001-008-030-13 | 21.9 | 1236.2 07:44:56:febtest:INFO: 12-5 | XA-000-08-002-001-007-232-15 | 25.1 | 1206.9 07:44:56:febtest:INFO: 7-6 | XA-000-08-002-001-007-241-08 | 31.4 | 1206.9 07:44:56:febtest:INFO: 14-7 | XA-000-08-002-001-007-237-15 | 21.9 | 1236.2 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 2023_12_08-07_41_54 OPERATOR : Olga B.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : L4UL001055 M4UL0B3010553A2 124 B FEB_SN : 1063 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- SENSOR_ID: 19214 MODULE_NAME: L4UL001055 M4UL0B3010553A2 124 B MODULE_TYPE: MODULE_LADDER: MODULE_MODULE: MODULE_SIZE: 0 MODULE_GRADE: --------------------------------------- VI_before_Init : ['2.450', '1.8490', '1.851', '0.4754', '7.000', '1.5300', '7.000', '1.5300'] VI_after__Init : ['2.450', '1.9980', '1.850', '0.5981', '7.000', '1.5340', '7.000', '1.5340'] VI_at__the_End : ['0', '0', '0', '0', '0', '0'] 07:45:37:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1063/TestDate_2023_12_08-07_41_54/
Comment.txt
feb 19214