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FEB_1038 30.11.23 10:37:08
Info
10:37:01:febtest:INFO: FEB 8-2 selected
10:37:01:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:37:08:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:37:08:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
10:37:08:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:37:08:febtest:INFO: Testing FEB with SN 1038
10:37:09:smx_tester:INFO: Scanning setup
10:37:09:elinks:INFO: Disabling clock on downlink 0
10:37:09:elinks:INFO: Disabling clock on downlink 1
10:37:09:elinks:INFO: Disabling clock on downlink 2
10:37:09:elinks:INFO: Disabling clock on downlink 3
10:37:09:elinks:INFO: Disabling clock on downlink 4
10:37:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:37:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:37:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:37:09:elinks:INFO: Disabling clock on downlink 0
10:37:09:elinks:INFO: Disabling clock on downlink 1
10:37:09:elinks:INFO: Disabling clock on downlink 2
10:37:09:elinks:INFO: Disabling clock on downlink 3
10:37:09:elinks:INFO: Disabling clock on downlink 4
10:37:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:37:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:37:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
10:37:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
10:37:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
10:37:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
10:37:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
10:37:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
10:37:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
10:37:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
10:37:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:37:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:37:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:37:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:37:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:37:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:37:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:37:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:37:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:37:10:elinks:INFO: Disabling clock on downlink 0
10:37:10:elinks:INFO: Disabling clock on downlink 1
10:37:10:elinks:INFO: Disabling clock on downlink 2
10:37:10:elinks:INFO: Disabling clock on downlink 3
10:37:10:elinks:INFO: Disabling clock on downlink 4
10:37:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:37:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:37:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:37:10:elinks:INFO: Disabling clock on downlink 0
10:37:10:elinks:INFO: Disabling clock on downlink 1
10:37:10:elinks:INFO: Disabling clock on downlink 2
10:37:10:elinks:INFO: Disabling clock on downlink 3
10:37:10:elinks:INFO: Disabling clock on downlink 4
10:37:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:37:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:37:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:37:10:elinks:INFO: Disabling clock on downlink 0
10:37:10:elinks:INFO: Disabling clock on downlink 1
10:37:10:elinks:INFO: Disabling clock on downlink 2
10:37:10:elinks:INFO: Disabling clock on downlink 3
10:37:10:elinks:INFO: Disabling clock on downlink 4
10:37:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:37:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:37:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:37:10:setup_element:INFO: Scanning clock phase
10:37:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:37:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:37:11:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:37:11:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
10:37:11:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
10:37:11:setup_element:INFO: Eye window for uplink 2 : XX________________________________________________________________________XXXXXX
Clock Delay: 37
10:37:11:setup_element:INFO: Eye window for uplink 3 : XX________________________________________________________________________XXXXXX
Clock Delay: 37
10:37:11:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:37:11:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:37:11:setup_element:INFO: Eye window for uplink 6 : X_________________________________________________________________________XXXXXX
Clock Delay: 37
10:37:11:setup_element:INFO: Eye window for uplink 7 : X_________________________________________________________________________XXXXXX
Clock Delay: 37
10:37:11:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:37:11:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:37:11:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:37:11:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:37:11:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:37:11:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:37:11:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:37:11:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:37:11:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 1
10:37:11:setup_element:INFO: Scanning data phases
10:37:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:37:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:37:16:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:37:16:setup_element:INFO: Eye window for uplink 0 : __________XXXXX_________________________
Data delay found: 32
10:37:16:setup_element:INFO: Eye window for uplink 1 : _______XXXXX____________________________
Data delay found: 29
10:37:16:setup_element:INFO: Eye window for uplink 2 : _______XXXXX____________________________
Data delay found: 29
10:37:16:setup_element:INFO: Eye window for uplink 3 : _____XXXXX______________________________
Data delay found: 27
10:37:16:setup_element:INFO: Eye window for uplink 4 : ___XXXXX________________________________
Data delay found: 25
10:37:16:setup_element:INFO: Eye window for uplink 5 : XXX__________________________________XXX
Data delay found: 19
10:37:16:setup_element:INFO: Eye window for uplink 6 : XXXX___________________________________X
Data delay found: 21
10:37:16:setup_element:INFO: Eye window for uplink 7 : X_________________________________XXXXX_
Data delay found: 17
10:37:16:setup_element:INFO: Eye window for uplink 8 : ________________________XXXX____________
Data delay found: 5
10:37:16:setup_element:INFO: Eye window for uplink 9 : ____________________________XXXXX_______
Data delay found: 10
10:37:16:setup_element:INFO: Eye window for uplink 10: _________________________XXXXX__________
Data delay found: 7
10:37:16:setup_element:INFO: Eye window for uplink 11: _____________________________XXXXX______
Data delay found: 11
10:37:16:setup_element:INFO: Eye window for uplink 12: __________________________XXXXX_________
Data delay found: 8
10:37:16:setup_element:INFO: Eye window for uplink 13: ______________________________XXXX______
Data delay found: 11
10:37:16:setup_element:INFO: Eye window for uplink 14: __________________________XXXXX_________
Data delay found: 8
10:37:16:setup_element:INFO: Eye window for uplink 15: ____________________________XXXXX_______
Data delay found: 10
10:37:16:setup_element:INFO: Setting the data phase to 32 for uplink 0
10:37:16:setup_element:INFO: Setting the data phase to 29 for uplink 1
10:37:16:setup_element:INFO: Setting the data phase to 29 for uplink 2
10:37:16:setup_element:INFO: Setting the data phase to 27 for uplink 3
10:37:16:setup_element:INFO: Setting the data phase to 25 for uplink 4
10:37:16:setup_element:INFO: Setting the data phase to 19 for uplink 5
10:37:16:setup_element:INFO: Setting the data phase to 21 for uplink 6
10:37:16:setup_element:INFO: Setting the data phase to 17 for uplink 7
10:37:16:setup_element:INFO: Setting the data phase to 5 for uplink 8
10:37:16:setup_element:INFO: Setting the data phase to 10 for uplink 9
10:37:16:setup_element:INFO: Setting the data phase to 7 for uplink 10
10:37:16:setup_element:INFO: Setting the data phase to 11 for uplink 11
10:37:16:setup_element:INFO: Setting the data phase to 8 for uplink 12
10:37:16:setup_element:INFO: Setting the data phase to 11 for uplink 13
10:37:16:setup_element:INFO: Setting the data phase to 8 for uplink 14
10:37:16:setup_element:INFO: Setting the data phase to 10 for uplink 15
10:37:16:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 36
Window Length: 69
Eye Windows:
Uplink 0: _________________________________________________________________________XXXXXXX
Uplink 1: _________________________________________________________________________XXXXXXX
Uplink 2: XX________________________________________________________________________XXXXXX
Uplink 3: XX________________________________________________________________________XXXXXX
Uplink 4: ________________________________________________________________________XXXXXXXX
Uplink 5: ________________________________________________________________________XXXXXXXX
Uplink 6: X_________________________________________________________________________XXXXXX
Uplink 7: X_________________________________________________________________________XXXXXX
Uplink 8: _______________________________________________________________________XXXXXXX__
Uplink 9: _______________________________________________________________________XXXXXXX__
Uplink 10: _______________________________________________________________________XXXXXXX__
Uplink 11: _______________________________________________________________________XXXXXXX__
Uplink 12: _______________________________________________________________________XXXXXXXX_
Uplink 13: _______________________________________________________________________XXXXXXXX_
Uplink 14: _______________________________________________________________________XXXXXXXX_
Uplink 15: _______________________________________________________________________XXXXXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 1:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 2:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 3:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 4:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 5:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXX_
Uplink 8:
Optimal Phase: 5
Window Length: 36
Eye Window: ________________________XXXX____________
Uplink 9:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 10:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 11:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 12:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 13:
Optimal Phase: 11
Window Length: 36
Eye Window: ______________________________XXXX______
Uplink 14:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 15:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
]
10:37:16:setup_element:INFO: Beginning SMX ASICs map scan
10:37:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:37:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:37:16:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:37:16:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:37:16:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:37:16:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:37:16:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:37:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:37:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:37:17:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:37:17:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:37:17:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:37:17:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:37:17:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:37:17:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:37:17:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:37:17:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:37:18:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:37:18:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:37:18:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:37:18:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:37:19:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 36
Window Length: 69
Eye Windows:
Uplink 0: _________________________________________________________________________XXXXXXX
Uplink 1: _________________________________________________________________________XXXXXXX
Uplink 2: XX________________________________________________________________________XXXXXX
Uplink 3: XX________________________________________________________________________XXXXXX
Uplink 4: ________________________________________________________________________XXXXXXXX
Uplink 5: ________________________________________________________________________XXXXXXXX
Uplink 6: X_________________________________________________________________________XXXXXX
Uplink 7: X_________________________________________________________________________XXXXXX
Uplink 8: _______________________________________________________________________XXXXXXX__
Uplink 9: _______________________________________________________________________XXXXXXX__
Uplink 10: _______________________________________________________________________XXXXXXX__
Uplink 11: _______________________________________________________________________XXXXXXX__
Uplink 12: _______________________________________________________________________XXXXXXXX_
Uplink 13: _______________________________________________________________________XXXXXXXX_
Uplink 14: _______________________________________________________________________XXXXXXXX_
Uplink 15: _______________________________________________________________________XXXXXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 1:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 2:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 3:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 4:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 5:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXX_
Uplink 8:
Optimal Phase: 5
Window Length: 36
Eye Window: ________________________XXXX____________
Uplink 9:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 10:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 11:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 12:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 13:
Optimal Phase: 11
Window Length: 36
Eye Window: ______________________________XXXX______
Uplink 14:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 15:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
10:37:19:setup_element:INFO: Performing Elink synchronization
10:37:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:37:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:37:19:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:37:19:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:37:19:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:37:19:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:37:19:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
10:37:20:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:37:20:febtest:INFO: 1-0 | XA-000-08-002-000-008-147-15 | 18.7 | 1218.6
10:37:21:febtest:INFO: 8-1 | XA-000-08-002-000-007-124-10 | 28.2 | 1195.1
10:37:21:febtest:INFO: 3-2 | XA-000-08-002-000-008-164-06 | 37.7 | 1171.5
10:37:21:febtest:INFO: 10-3 | XA-000-08-002-000-007-123-10 | 18.7 | 1230.3
10:37:21:febtest:INFO: 5-4 | XA-000-08-002-000-008-159-15 | 18.7 | 1224.5
10:37:21:febtest:INFO: 12-5 | XA-000-08-002-000-007-115-10 | 40.9 | 1147.8
10:37:22:febtest:INFO: 7-6 | XA-000-08-002-000-008-155-15 | 21.9 | 1230.3
10:37:22:febtest:INFO: 14-7 | XA-000-08-002-000-007-125-10 | 31.4 | 1183.3
10:37:22:ST3_smx:INFO: Configuring SMX FAST
10:37:24:ST3_smx:INFO: chip: 1-0 31.389742 C 1183.292940 mV
10:37:24:ST3_smx:INFO: Electrons
10:37:24:ST3_smx:INFO: # loops 0
10:37:26:ST3_smx:INFO: # loops 1
10:37:28:ST3_smx:INFO: # loops 2
10:37:29:ST3_smx:INFO: # loops 3
10:37:31:ST3_smx:INFO: # loops 4
10:37:32:ST3_smx:INFO: Total # of broken channels: 0
10:37:32:ST3_smx:INFO: List of broken channels: []
10:37:32:ST3_smx:INFO: Total # of broken channels: 0
10:37:32:ST3_smx:INFO: List of broken channels: []
10:37:33:ST3_smx:INFO: Configuring SMX FAST
10:37:35:ST3_smx:INFO: chip: 8-1 28.225000 C 1195.082160 mV
10:37:35:ST3_smx:INFO: Electrons
10:37:35:ST3_smx:INFO: # loops 0
10:37:37:ST3_smx:INFO: # loops 1
10:37:38:ST3_smx:INFO: # loops 2
10:37:40:ST3_smx:INFO: # loops 3
10:37:42:ST3_smx:INFO: # loops 4
10:37:44:ST3_smx:INFO: Total # of broken channels: 0
10:37:44:ST3_smx:INFO: List of broken channels: []
10:37:44:ST3_smx:INFO: Total # of broken channels: 0
10:37:44:ST3_smx:INFO: List of broken channels: []
10:37:44:ST3_smx:INFO: Configuring SMX FAST
10:37:46:ST3_smx:INFO: chip: 3-2 37.726682 C 1171.483840 mV
10:37:46:ST3_smx:INFO: Electrons
10:37:46:ST3_smx:INFO: # loops 0
10:37:48:ST3_smx:INFO: # loops 1
10:37:50:ST3_smx:INFO: # loops 2
10:37:52:ST3_smx:INFO: # loops 3
10:37:53:ST3_smx:INFO: # loops 4
10:37:55:ST3_smx:INFO: Total # of broken channels: 0
10:37:55:ST3_smx:INFO: List of broken channels: []
10:37:55:ST3_smx:INFO: Total # of broken channels: 0
10:37:55:ST3_smx:INFO: List of broken channels: []
10:37:56:ST3_smx:INFO: Configuring SMX FAST
10:37:58:ST3_smx:INFO: chip: 10-3 25.062742 C 1212.728715 mV
10:37:58:ST3_smx:INFO: Electrons
10:37:58:ST3_smx:INFO: # loops 0
10:37:59:ST3_smx:INFO: # loops 1
10:38:01:ST3_smx:INFO: # loops 2
10:38:02:ST3_smx:INFO: # loops 3
10:38:04:ST3_smx:INFO: # loops 4
10:38:06:ST3_smx:INFO: Total # of broken channels: 0
10:38:06:ST3_smx:INFO: List of broken channels: []
10:38:06:ST3_smx:INFO: Total # of broken channels: 1
10:38:06:ST3_smx:INFO: List of broken channels: [0]
10:38:06:ST3_smx:INFO: Configuring SMX FAST
10:38:08:ST3_smx:INFO: chip: 5-4 31.389742 C 1195.082160 mV
10:38:08:ST3_smx:INFO: Electrons
10:38:08:ST3_smx:INFO: # loops 0
10:38:10:ST3_smx:INFO: # loops 1
10:38:12:ST3_smx:INFO: # loops 2
10:38:13:ST3_smx:INFO: # loops 3
10:38:15:ST3_smx:INFO: # loops 4
10:38:16:ST3_smx:INFO: Total # of broken channels: 0
10:38:16:ST3_smx:INFO: List of broken channels: []
10:38:16:ST3_smx:INFO: Total # of broken channels: 0
10:38:16:ST3_smx:INFO: List of broken channels: []
10:38:17:ST3_smx:INFO: Configuring SMX FAST
10:38:19:ST3_smx:INFO: chip: 12-5 44.073563 C 1147.806000 mV
10:38:19:ST3_smx:INFO: Electrons
10:38:19:ST3_smx:INFO: # loops 0
10:38:21:ST3_smx:INFO: # loops 1
10:38:22:ST3_smx:INFO: # loops 2
10:38:24:ST3_smx:INFO: # loops 3
10:38:26:ST3_smx:INFO: # loops 4
10:38:27:ST3_smx:INFO: Total # of broken channels: 0
10:38:27:ST3_smx:INFO: List of broken channels: []
10:38:27:ST3_smx:INFO: Total # of broken channels: 0
10:38:27:ST3_smx:INFO: List of broken channels: []
10:38:28:ST3_smx:INFO: Configuring SMX FAST
10:38:30:ST3_smx:INFO: chip: 7-6 34.556970 C 1195.082160 mV
10:38:30:ST3_smx:INFO: Electrons
10:38:30:ST3_smx:INFO: # loops 0
10:38:31:ST3_smx:INFO: # loops 1
10:38:33:ST3_smx:INFO: # loops 2
10:38:35:ST3_smx:INFO: # loops 3
10:38:36:ST3_smx:INFO: # loops 4
10:38:38:ST3_smx:INFO: Total # of broken channels: 0
10:38:38:ST3_smx:INFO: List of broken channels: []
10:38:38:ST3_smx:INFO: Total # of broken channels: 0
10:38:38:ST3_smx:INFO: List of broken channels: []
10:38:38:ST3_smx:INFO: Configuring SMX FAST
10:38:40:ST3_smx:INFO: chip: 14-7 28.225000 C 1195.082160 mV
10:38:40:ST3_smx:INFO: Electrons
10:38:40:ST3_smx:INFO: # loops 0
10:38:42:ST3_smx:INFO: # loops 1
10:38:44:ST3_smx:INFO: # loops 2
10:38:45:ST3_smx:INFO: # loops 3
10:38:47:ST3_smx:INFO: # loops 4
10:38:48:ST3_smx:INFO: Total # of broken channels: 0
10:38:48:ST3_smx:INFO: List of broken channels: []
10:38:48:ST3_smx:INFO: Total # of broken channels: 0
10:38:48:ST3_smx:INFO: List of broken channels: []
10:38:49:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:38:49:febtest:INFO: 1-0 | XA-000-08-002-000-008-147-15 | 31.4 | 1183.3
10:38:49:febtest:INFO: 8-1 | XA-000-08-002-000-007-124-10 | 28.2 | 1201.0
10:38:50:febtest:INFO: 3-2 | XA-000-08-002-000-008-164-06 | 37.7 | 1171.5
10:38:50:febtest:INFO: 10-3 | XA-000-08-002-000-007-123-10 | 25.1 | 1218.6
10:38:50:febtest:INFO: 5-4 | XA-000-08-002-000-008-159-15 | 31.4 | 1201.0
10:38:50:febtest:INFO: 12-5 | XA-000-08-002-000-007-115-10 | 44.1 | 1147.8
10:38:50:febtest:INFO: 7-6 | XA-000-08-002-000-008-155-15 | 34.6 | 1195.1
10:38:51:febtest:INFO: 14-7 | XA-000-08-002-000-007-125-10 | 28.2 | 1195.1
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2023_11_30-10_37_08
OPERATOR : Robert V.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L3DL500114 M3DL5T1001141A2 62 C
FEB_SN : 0
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.447', '1.8740', '1.845', '2.5910', '7.000', '1.5540', '7.000', '1.5540']
VI_after__Init : ['2.450', '2.0170', '1.850', '0.3185', '7.000', '1.5510', '7.000', '1.5510']
VI_at__the_End : ['2.450', '2.0170', '1.850', '0.3185', '7.000', '1.5510', '7.000', '1.5510']
10:38:58:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2054/TestDate_2023_11_30-10_37_08/