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FEB_1039 14.11.23 14:02:11
TextEdit.txt
14:01:31:ST3_hmp4040:INFO: HAMEG,HMP2030,017836163,HW50010002/SW2.30
14:01:31:febtest:INFO: FEB8.2 selected
14:01:55:ST3_Shared:INFO: Listo of operators:Irakli K.;
14:01:57:ST3_Shared:INFO: Listo of operators:Oleksandr S.; Irakli K.;
14:01:58:ST3_Shared:INFO: Listo of operators:Olga B.; Oleksandr S.; Irakli K.;
14:02:00:ST3_Shared:INFO: Listo of operators:Olga B.; Oleksandr S.; Robert V.; Irakli K.;
14:02:03:smx_tester:INFO: Setting Elink clock mode to 160 MHz
14:02:11:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:02:11:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
14:02:11:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:02:11:febtest:INFO: Tsting FEB with SN 1039
14:02:12:smx_tester:INFO: Scanning setup
14:02:12:elinks:INFO: Disabling clock on downlink 0
14:02:12:elinks:INFO: Disabling clock on downlink 1
14:02:12:elinks:INFO: Disabling clock on downlink 2
14:02:12:elinks:INFO: Disabling clock on downlink 3
14:02:12:elinks:INFO: Disabling clock on downlink 4
14:02:12:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:02:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:02:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:02:12:elinks:INFO: Disabling clock on downlink 0
14:02:12:elinks:INFO: Disabling clock on downlink 1
14:02:12:elinks:INFO: Disabling clock on downlink 2
14:02:12:elinks:INFO: Disabling clock on downlink 3
14:02:12:elinks:INFO: Disabling clock on downlink 4
14:02:12:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:02:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:02:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
14:02:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
14:02:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
14:02:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
14:02:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
14:02:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
14:02:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
14:02:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
14:02:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:02:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:02:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:02:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:02:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:02:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:02:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:02:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:02:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:02:13:elinks:INFO: Disabling clock on downlink 0
14:02:13:elinks:INFO: Disabling clock on downlink 1
14:02:13:elinks:INFO: Disabling clock on downlink 2
14:02:13:elinks:INFO: Disabling clock on downlink 3
14:02:13:elinks:INFO: Disabling clock on downlink 4
14:02:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:02:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:02:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:02:13:elinks:INFO: Disabling clock on downlink 0
14:02:13:elinks:INFO: Disabling clock on downlink 1
14:02:13:elinks:INFO: Disabling clock on downlink 2
14:02:13:elinks:INFO: Disabling clock on downlink 3
14:02:13:elinks:INFO: Disabling clock on downlink 4
14:02:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:02:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:02:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:02:13:elinks:INFO: Disabling clock on downlink 0
14:02:13:elinks:INFO: Disabling clock on downlink 1
14:02:13:elinks:INFO: Disabling clock on downlink 2
14:02:13:elinks:INFO: Disabling clock on downlink 3
14:02:13:elinks:INFO: Disabling clock on downlink 4
14:02:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:02:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:02:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:02:13:setup_element:INFO: Scanning clock phase
14:02:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:02:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:02:13:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:02:13:setup_element:INFO: Eye window for uplink 0 : X_________________________________________________________________________XXXXXX
Clock Delay: 37
14:02:13:setup_element:INFO: Eye window for uplink 1 : X_________________________________________________________________________XXXXXX
Clock Delay: 37
14:02:13:setup_element:INFO: Eye window for uplink 2 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
14:02:13:setup_element:INFO: Eye window for uplink 3 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
14:02:13:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:02:13:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:02:13:setup_element:INFO: Eye window for uplink 6 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:02:13:setup_element:INFO: Eye window for uplink 7 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:02:13:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:02:13:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:02:13:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:02:13:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:02:13:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:02:13:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:02:13:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
14:02:13:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
14:02:13:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
14:02:13:setup_element:INFO: Scanning data phases
14:02:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:02:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:02:19:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:02:19:setup_element:INFO: Eye window for uplink 0 : _________XXXXXX_________________________
Data delay found: 31
14:02:19:setup_element:INFO: Eye window for uplink 1 : ______XXXXXX____________________________
Data delay found: 28
14:02:19:setup_element:INFO: Eye window for uplink 2 : ______XXXXX_____________________________
Data delay found: 28
14:02:19:setup_element:INFO: Eye window for uplink 3 : ___XXXXX________________________________
Data delay found: 25
14:02:19:setup_element:INFO: Eye window for uplink 4 : _XXXXXX_________________________________
Data delay found: 23
14:02:19:setup_element:INFO: Eye window for uplink 5 : XX__________________________________XXXX
Data delay found: 18
14:02:19:setup_element:INFO: Eye window for uplink 6 : XXX__________________________________XXX
Data delay found: 19
14:02:19:setup_element:INFO: Eye window for uplink 7 : ________________________________XXXXX___
Data delay found: 14
14:02:19:setup_element:INFO: Eye window for uplink 8 : ________________________XXXX____________
Data delay found: 5
14:02:19:setup_element:INFO: Eye window for uplink 9 : ____________________________XXXXX_______
Data delay found: 10
14:02:19:setup_element:INFO: Eye window for uplink 10: ________________________XXXXX___________
Data delay found: 6
14:02:19:setup_element:INFO: Eye window for uplink 11: ____________________________XXXXX_______
Data delay found: 10
14:02:19:setup_element:INFO: Eye window for uplink 12: ___________________________XXXX_________
Data delay found: 8
14:02:19:setup_element:INFO: Eye window for uplink 13: ______________________________XXXXX_____
Data delay found: 12
14:02:19:setup_element:INFO: Eye window for uplink 14: ___________________________XXXX_________
Data delay found: 8
14:02:19:setup_element:INFO: Eye window for uplink 15: ______________________________XXXX______
Data delay found: 11
14:02:19:setup_element:INFO: Setting the data phase to 31 for uplink 0
14:02:19:setup_element:INFO: Setting the data phase to 28 for uplink 1
14:02:19:setup_element:INFO: Setting the data phase to 28 for uplink 2
14:02:19:setup_element:INFO: Setting the data phase to 25 for uplink 3
14:02:19:setup_element:INFO: Setting the data phase to 23 for uplink 4
14:02:19:setup_element:INFO: Setting the data phase to 18 for uplink 5
14:02:19:setup_element:INFO: Setting the data phase to 19 for uplink 6
14:02:19:setup_element:INFO: Setting the data phase to 14 for uplink 7
14:02:19:setup_element:INFO: Setting the data phase to 5 for uplink 8
14:02:19:setup_element:INFO: Setting the data phase to 10 for uplink 9
14:02:19:setup_element:INFO: Setting the data phase to 6 for uplink 10
14:02:19:setup_element:INFO: Setting the data phase to 10 for uplink 11
14:02:19:setup_element:INFO: Setting the data phase to 8 for uplink 12
14:02:19:setup_element:INFO: Setting the data phase to 12 for uplink 13
14:02:19:setup_element:INFO: Setting the data phase to 8 for uplink 14
14:02:19:setup_element:INFO: Setting the data phase to 11 for uplink 15
14:02:19:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 69
Eye Windows:
Uplink 0: X_________________________________________________________________________XXXXXX
Uplink 1: X_________________________________________________________________________XXXXXX
Uplink 2: _________________________________________________________________________XXXXXXX
Uplink 3: _________________________________________________________________________XXXXXXX
Uplink 4: _______________________________________________________________________XXXXXXXX_
Uplink 5: _______________________________________________________________________XXXXXXXX_
Uplink 6: _________________________________________________________________________XXXXXX_
Uplink 7: _________________________________________________________________________XXXXXX_
Uplink 8: ______________________________________________________________________XXXXXXXX__
Uplink 9: ______________________________________________________________________XXXXXXXX__
Uplink 10: ______________________________________________________________________XXXXXXXX__
Uplink 11: ______________________________________________________________________XXXXXXXX__
Uplink 12: _______________________________________________________________________XXXXXXXX_
Uplink 13: _______________________________________________________________________XXXXXXXX_
Uplink 14: ________________________________________________________________________XXXXXXXX
Uplink 15: ________________________________________________________________________XXXXXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 1:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 2:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 3:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 4:
Optimal Phase: 23
Window Length: 34
Eye Window: _XXXXXX_________________________________
Uplink 5:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 6:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 7:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 8:
Optimal Phase: 5
Window Length: 36
Eye Window: ________________________XXXX____________
Uplink 9:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 10:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 11:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 12:
Optimal Phase: 8
Window Length: 36
Eye Window: ___________________________XXXX_________
Uplink 13:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 14:
Optimal Phase: 8
Window Length: 36
Eye Window: ___________________________XXXX_________
Uplink 15:
Optimal Phase: 11
Window Length: 36
Eye Window: ______________________________XXXX______
]
14:02:19:setup_element:INFO: Beginning SMX ASICs map scan
14:02:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:02:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:02:19:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:02:19:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:02:19:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:02:19:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:02:19:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:02:19:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:02:19:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:02:20:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:02:20:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:02:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:02:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:02:20:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:02:20:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:02:20:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:02:20:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:02:20:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:02:20:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:02:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:02:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:02:22:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 69
Eye Windows:
Uplink 0: X_________________________________________________________________________XXXXXX
Uplink 1: X_________________________________________________________________________XXXXXX
Uplink 2: _________________________________________________________________________XXXXXXX
Uplink 3: _________________________________________________________________________XXXXXXX
Uplink 4: _______________________________________________________________________XXXXXXXX_
Uplink 5: _______________________________________________________________________XXXXXXXX_
Uplink 6: _________________________________________________________________________XXXXXX_
Uplink 7: _________________________________________________________________________XXXXXX_
Uplink 8: ______________________________________________________________________XXXXXXXX__
Uplink 9: ______________________________________________________________________XXXXXXXX__
Uplink 10: ______________________________________________________________________XXXXXXXX__
Uplink 11: ______________________________________________________________________XXXXXXXX__
Uplink 12: _______________________________________________________________________XXXXXXXX_
Uplink 13: _______________________________________________________________________XXXXXXXX_
Uplink 14: ________________________________________________________________________XXXXXXXX
Uplink 15: ________________________________________________________________________XXXXXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 1:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 2:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 3:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 4:
Optimal Phase: 23
Window Length: 34
Eye Window: _XXXXXX_________________________________
Uplink 5:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 6:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 7:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 8:
Optimal Phase: 5
Window Length: 36
Eye Window: ________________________XXXX____________
Uplink 9:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 10:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 11:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 12:
Optimal Phase: 8
Window Length: 36
Eye Window: ___________________________XXXX_________
Uplink 13:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 14:
Optimal Phase: 8
Window Length: 36
Eye Window: ___________________________XXXX_________
Uplink 15:
Optimal Phase: 11
Window Length: 36
Eye Window: ______________________________XXXX______
14:02:22:setup_element:INFO: Performing Elink synchronization
14:02:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:02:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:02:22:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:02:22:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:02:22:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:02:22:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:02:22:ST3_emu:INFO: Number of chips: 8
14:02:22:ST3_emu:INFO: Chip address: 0x0
14:02:22:ST3_emu:INFO: Chip address: 0x1
14:02:22:ST3_emu:INFO: Chip address: 0x2
14:02:22:ST3_emu:INFO: Chip address: 0x3
14:02:22:ST3_emu:INFO: Chip address: 0x4
14:02:22:ST3_emu:INFO: Chip address: 0x5
14:02:22:ST3_emu:INFO: Chip address: 0x6
14:02:22:ST3_emu:INFO: Chip address: 0x7
14:02:23:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
14:02:24:febtest:INFO: 0-0 | XA-000-08-002-000-003-020-07 | 37.7 | 1206.9
14:02:24:febtest:INFO: 0-1 | XA-000-08-002-000-003-030-07 | 37.7 | 1195.1
14:02:24:febtest:INFO: 0-2 | XA-000-08-002-000-003-023-07 | 53.6 | 1159.7
14:02:24:febtest:INFO: 0-3 | XA-000-08-002-000-003-031-07 | 44.1 | 1183.3
14:02:24:febtest:INFO: 0-4 | XA-000-08-002-000-003-026-07 | 31.4 | 1236.2
14:02:25:febtest:INFO: 0-5 | XA-000-08-002-000-003-029-07 | 31.4 | 1212.7
14:02:25:febtest:INFO: 0-6 | XA-000-08-002-000-003-025-07 | 34.6 | 1224.5
14:02:25:febtest:INFO: 0-7 | XA-000-08-002-000-003-055-09 | 34.6 | 1242.0
14:02:25:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
14:02:29:ST3_smx:INFO: chip: 0-0 40.898880 C 1183.292940 mV
14:02:29:ST3_smx:INFO: # loops 0
14:02:31:ST3_smx:INFO: # loops 1
14:02:32:ST3_smx:INFO: # loops 2
14:02:34:ST3_smx:INFO: # loops 3
14:02:35:ST3_smx:INFO: # loops 4
14:02:37:ST3_smx:INFO: Total # of broken channels: 0
14:02:37:ST3_smx:INFO: List of broken channels: []
14:02:37:ST3_smx:INFO: Total # of broken channels: 0
14:02:37:ST3_smx:INFO: List of broken channels: []
14:02:38:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
14:02:42:ST3_smx:INFO: chip: 0-1 34.556970 C 1200.969315 mV
14:02:42:ST3_smx:INFO: # loops 0
14:02:44:ST3_smx:INFO: # loops 1
14:02:45:ST3_smx:INFO: # loops 2
14:02:47:ST3_smx:INFO: # loops 3
14:02:49:ST3_smx:INFO: # loops 4
14:02:50:ST3_smx:INFO: Total # of broken channels: 0
14:02:50:ST3_smx:INFO: List of broken channels: []
14:02:50:ST3_smx:INFO: Total # of broken channels: 0
14:02:50:ST3_smx:INFO: List of broken channels: []
14:02:51:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
14:02:55:ST3_smx:INFO: chip: 0-2 50.430383 C 1153.732915 mV
14:02:55:ST3_smx:INFO: # loops 0
14:02:57:ST3_smx:INFO: # loops 1
14:02:58:ST3_smx:INFO: # loops 2
14:03:00:ST3_smx:INFO: # loops 3
14:03:02:ST3_smx:INFO: # loops 4
14:03:03:ST3_smx:INFO: Total # of broken channels: 0
14:03:03:ST3_smx:INFO: List of broken channels: []
14:03:03:ST3_smx:INFO: Total # of broken channels: 0
14:03:03:ST3_smx:INFO: List of broken channels: []
14:03:04:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
14:03:07:ST3_smx:INFO: chip: 0-3 37.726682 C 1183.292940 mV
14:03:07:ST3_smx:INFO: # loops 0
14:03:09:ST3_smx:INFO: # loops 1
14:03:11:ST3_smx:INFO: # loops 2
14:03:12:ST3_smx:INFO: # loops 3
14:03:14:ST3_smx:INFO: # loops 4
14:03:15:ST3_smx:INFO: Total # of broken channels: 0
14:03:15:ST3_smx:INFO: List of broken channels: []
14:03:15:ST3_smx:INFO: Total # of broken channels: 0
14:03:15:ST3_smx:INFO: List of broken channels: []
14:03:16:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
14:03:20:ST3_smx:INFO: chip: 0-4 47.250730 C 1171.483840 mV
14:03:20:ST3_smx:INFO: # loops 0
14:03:21:ST3_smx:INFO: # loops 1
14:03:23:ST3_smx:INFO: # loops 2
14:03:25:ST3_smx:INFO: # loops 3
14:03:26:ST3_smx:INFO: # loops 4
14:03:28:ST3_smx:INFO: Total # of broken channels: 0
14:03:28:ST3_smx:INFO: List of broken channels: []
14:03:28:ST3_smx:INFO: Total # of broken channels: 0
14:03:28:ST3_smx:INFO: List of broken channels: []
14:03:28:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
14:03:32:ST3_smx:INFO: chip: 0-5 40.898880 C 1171.483840 mV
14:03:32:ST3_smx:INFO: # loops 0
14:03:34:ST3_smx:INFO: # loops 1
14:03:35:ST3_smx:INFO: # loops 2
14:03:37:ST3_smx:INFO: # loops 3
14:03:39:ST3_smx:INFO: # loops 4
14:03:40:ST3_smx:INFO: Total # of broken channels: 0
14:03:40:ST3_smx:INFO: List of broken channels: []
14:03:40:ST3_smx:INFO: Total # of broken channels: 0
14:03:40:ST3_smx:INFO: List of broken channels: []
14:03:41:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
14:03:45:ST3_smx:INFO: chip: 0-6 34.556970 C 1218.600960 mV
14:03:45:ST3_smx:INFO: # loops 0
14:03:46:ST3_smx:INFO: # loops 1
14:03:48:ST3_smx:INFO: # loops 2
14:03:50:ST3_smx:INFO: # loops 3
14:03:51:ST3_smx:INFO: # loops 4
14:03:53:ST3_smx:INFO: Total # of broken channels: 0
14:03:53:ST3_smx:INFO: List of broken channels: []
14:03:53:ST3_smx:INFO: Total # of broken channels: 0
14:03:53:ST3_smx:INFO: List of broken channels: []
14:03:53:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
14:03:57:ST3_smx:INFO: chip: 0-7 34.556970 C 1212.728715 mV
14:03:57:ST3_smx:INFO: # loops 0
14:03:59:ST3_smx:INFO: # loops 1
14:04:00:ST3_smx:INFO: # loops 2
14:04:02:ST3_smx:INFO: # loops 3
14:04:03:ST3_smx:INFO: # loops 4
14:04:05:ST3_smx:INFO: Total # of broken channels: 0
14:04:05:ST3_smx:INFO: List of broken channels: []
14:04:05:ST3_smx:INFO: Total # of broken channels: 1
14:04:05:ST3_smx:INFO: List of broken channels: [0]
14:04:06:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
14:04:06:febtest:INFO: 0-0 | XA-000-08-002-000-003-020-07 | 44.1 | 1171.5
14:04:06:febtest:INFO: 0-1 | XA-000-08-002-000-003-030-07 | 37.7 | 1189.2
14:04:06:febtest:INFO: 0-2 | XA-000-08-002-000-003-023-07 | 53.6 | 1141.9
14:04:06:febtest:INFO: 0-3 | XA-000-08-002-000-003-031-07 | 40.9 | 1183.3
14:04:07:febtest:INFO: 0-4 | XA-000-08-002-000-003-026-07 | 47.3 | 1171.5
14:04:07:febtest:INFO: 0-5 | XA-000-08-002-000-003-029-07 | 44.1 | 1165.6
14:04:07:febtest:INFO: 0-6 | XA-000-08-002-000-003-025-07 | 34.6 | 1218.6
14:04:07:febtest:INFO: 0-7 | XA-000-08-002-000-003-055-09 | 34.6 | 1212.7
14:04:13:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1039/TestDate_2023_11_14-14_02_11/