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FEB_1040 30.11.23 10:57:03
Info
10:56:55:febtest:INFO: FEB 8-2 selected
10:56:55:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:57:03:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:57:03:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
10:57:03:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:58:34:ST3_ModuleSelector:INFO: L3DL500114 M3DL5B2001142B2 124 C
10:58:34:ST3_ModuleSelector:INFO:
10:58:35:febtest:INFO: Testing FEB with SN 1040
10:58:36:smx_tester:INFO: Scanning setup
10:58:36:elinks:INFO: Disabling clock on downlink 0
10:58:36:elinks:INFO: Disabling clock on downlink 1
10:58:36:elinks:INFO: Disabling clock on downlink 2
10:58:36:elinks:INFO: Disabling clock on downlink 3
10:58:36:elinks:INFO: Disabling clock on downlink 4
10:58:36:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:58:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:58:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:58:36:elinks:INFO: Disabling clock on downlink 0
10:58:36:elinks:INFO: Disabling clock on downlink 1
10:58:36:elinks:INFO: Disabling clock on downlink 2
10:58:36:elinks:INFO: Disabling clock on downlink 3
10:58:36:elinks:INFO: Disabling clock on downlink 4
10:58:36:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:58:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:58:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
10:58:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
10:58:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
10:58:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
10:58:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
10:58:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
10:58:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
10:58:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
10:58:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:58:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:58:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:58:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:58:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:58:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:58:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:58:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:58:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:58:36:elinks:INFO: Disabling clock on downlink 0
10:58:36:elinks:INFO: Disabling clock on downlink 1
10:58:36:elinks:INFO: Disabling clock on downlink 2
10:58:36:elinks:INFO: Disabling clock on downlink 3
10:58:36:elinks:INFO: Disabling clock on downlink 4
10:58:36:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:58:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:58:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:58:36:elinks:INFO: Disabling clock on downlink 0
10:58:36:elinks:INFO: Disabling clock on downlink 1
10:58:36:elinks:INFO: Disabling clock on downlink 2
10:58:36:elinks:INFO: Disabling clock on downlink 3
10:58:36:elinks:INFO: Disabling clock on downlink 4
10:58:36:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:58:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:58:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:58:36:elinks:INFO: Disabling clock on downlink 0
10:58:37:elinks:INFO: Disabling clock on downlink 1
10:58:37:elinks:INFO: Disabling clock on downlink 2
10:58:37:elinks:INFO: Disabling clock on downlink 3
10:58:37:elinks:INFO: Disabling clock on downlink 4
10:58:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:58:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:58:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:58:37:setup_element:INFO: Scanning clock phase
10:58:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:58:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:58:37:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:58:37:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:58:37:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:58:37:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:58:37:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:58:37:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:58:37:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:58:37:setup_element:INFO: Eye window for uplink 6 : __________________________________________________________________________XXXXXX
Clock Delay: 36
10:58:37:setup_element:INFO: Eye window for uplink 7 : __________________________________________________________________________XXXXXX
Clock Delay: 36
10:58:37:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:58:37:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:58:37:setup_element:INFO: Eye window for uplink 10: X________________________________________________________________________XXXXXXX
Clock Delay: 36
10:58:37:setup_element:INFO: Eye window for uplink 11: X________________________________________________________________________XXXXXXX
Clock Delay: 36
10:58:37:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:58:37:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:58:37:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:58:37:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:58:37:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
10:58:37:setup_element:INFO: Scanning data phases
10:58:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:58:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:58:43:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:58:43:setup_element:INFO: Eye window for uplink 0 : ___________XXXXX________________________
Data delay found: 33
10:58:43:setup_element:INFO: Eye window for uplink 1 : _______XXXXX____________________________
Data delay found: 29
10:58:43:setup_element:INFO: Eye window for uplink 2 : ______XXXX______________________________
Data delay found: 27
10:58:43:setup_element:INFO: Eye window for uplink 3 : ___XXXXX________________________________
Data delay found: 25
10:58:43:setup_element:INFO: Eye window for uplink 4 : __XXXXX_________________________________
Data delay found: 24
10:58:43:setup_element:INFO: Eye window for uplink 5 : XXX___________________________________XX
Data delay found: 20
10:58:43:setup_element:INFO: Eye window for uplink 6 : XXX___________________________________XX
Data delay found: 20
10:58:43:setup_element:INFO: Eye window for uplink 7 : _________________________________XXXXX__
Data delay found: 15
10:58:43:setup_element:INFO: Eye window for uplink 8 : ______________________XXXXX_____________
Data delay found: 4
10:58:43:setup_element:INFO: Eye window for uplink 9 : __________________________XXXXX_________
Data delay found: 8
10:58:43:setup_element:INFO: Eye window for uplink 10: _____________________________XXXXX______
Data delay found: 11
10:58:43:setup_element:INFO: Eye window for uplink 11: ________________________________XXXXXX__
Data delay found: 14
10:58:43:setup_element:INFO: Eye window for uplink 12: ______________________________XXXX______
Data delay found: 11
10:58:43:setup_element:INFO: Eye window for uplink 13: _________________________________XXXX___
Data delay found: 14
10:58:43:setup_element:INFO: Eye window for uplink 14: _________________________XXXXX__________
Data delay found: 7
10:58:43:setup_element:INFO: Eye window for uplink 15: ___________________________XXXXXX_______
Data delay found: 9
10:58:43:setup_element:INFO: Setting the data phase to 33 for uplink 0
10:58:43:setup_element:INFO: Setting the data phase to 29 for uplink 1
10:58:43:setup_element:INFO: Setting the data phase to 27 for uplink 2
10:58:43:setup_element:INFO: Setting the data phase to 25 for uplink 3
10:58:43:setup_element:INFO: Setting the data phase to 24 for uplink 4
10:58:43:setup_element:INFO: Setting the data phase to 20 for uplink 5
10:58:43:setup_element:INFO: Setting the data phase to 20 for uplink 6
10:58:43:setup_element:INFO: Setting the data phase to 15 for uplink 7
10:58:43:setup_element:INFO: Setting the data phase to 4 for uplink 8
10:58:43:setup_element:INFO: Setting the data phase to 8 for uplink 9
10:58:43:setup_element:INFO: Setting the data phase to 11 for uplink 10
10:58:43:setup_element:INFO: Setting the data phase to 14 for uplink 11
10:58:43:setup_element:INFO: Setting the data phase to 11 for uplink 12
10:58:43:setup_element:INFO: Setting the data phase to 14 for uplink 13
10:58:43:setup_element:INFO: Setting the data phase to 7 for uplink 14
10:58:43:setup_element:INFO: Setting the data phase to 9 for uplink 15
10:58:43:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 69
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXXX
Uplink 1: ________________________________________________________________________XXXXXXXX
Uplink 2: ________________________________________________________________________XXXXXXX_
Uplink 3: ________________________________________________________________________XXXXXXX_
Uplink 4: ________________________________________________________________________XXXXXXX_
Uplink 5: ________________________________________________________________________XXXXXXX_
Uplink 6: __________________________________________________________________________XXXXXX
Uplink 7: __________________________________________________________________________XXXXXX
Uplink 8: ______________________________________________________________________XXXXXXXX__
Uplink 9: ______________________________________________________________________XXXXXXXX__
Uplink 10: X________________________________________________________________________XXXXXXX
Uplink 11: X________________________________________________________________________XXXXXXX
Uplink 12: ________________________________________________________________________XXXXXXXX
Uplink 13: ________________________________________________________________________XXXXXXXX
Uplink 14: ________________________________________________________________________XXXXXXXX
Uplink 15: ________________________________________________________________________XXXXXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 1:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 2:
Optimal Phase: 27
Window Length: 36
Eye Window: ______XXXX______________________________
Uplink 3:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 4:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 5:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 6:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 7:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 8:
Optimal Phase: 4
Window Length: 35
Eye Window: ______________________XXXXX_____________
Uplink 9:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 10:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 11:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 12:
Optimal Phase: 11
Window Length: 36
Eye Window: ______________________________XXXX______
Uplink 13:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 14:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 15:
Optimal Phase: 9
Window Length: 34
Eye Window: ___________________________XXXXXX_______
]
10:58:43:setup_element:INFO: Beginning SMX ASICs map scan
10:58:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:58:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:58:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:58:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:58:43:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:58:43:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:58:43:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:58:43:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:58:43:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:58:43:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:58:43:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:58:43:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:58:43:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:58:44:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:58:44:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:58:44:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:58:44:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:58:44:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:58:44:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:58:44:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:58:44:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:58:45:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 69
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXXX
Uplink 1: ________________________________________________________________________XXXXXXXX
Uplink 2: ________________________________________________________________________XXXXXXX_
Uplink 3: ________________________________________________________________________XXXXXXX_
Uplink 4: ________________________________________________________________________XXXXXXX_
Uplink 5: ________________________________________________________________________XXXXXXX_
Uplink 6: __________________________________________________________________________XXXXXX
Uplink 7: __________________________________________________________________________XXXXXX
Uplink 8: ______________________________________________________________________XXXXXXXX__
Uplink 9: ______________________________________________________________________XXXXXXXX__
Uplink 10: X________________________________________________________________________XXXXXXX
Uplink 11: X________________________________________________________________________XXXXXXX
Uplink 12: ________________________________________________________________________XXXXXXXX
Uplink 13: ________________________________________________________________________XXXXXXXX
Uplink 14: ________________________________________________________________________XXXXXXXX
Uplink 15: ________________________________________________________________________XXXXXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 1:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 2:
Optimal Phase: 27
Window Length: 36
Eye Window: ______XXXX______________________________
Uplink 3:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 4:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 5:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 6:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 7:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 8:
Optimal Phase: 4
Window Length: 35
Eye Window: ______________________XXXXX_____________
Uplink 9:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 10:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 11:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 12:
Optimal Phase: 11
Window Length: 36
Eye Window: ______________________________XXXX______
Uplink 13:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 14:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 15:
Optimal Phase: 9
Window Length: 34
Eye Window: ___________________________XXXXXX_______
10:58:45:setup_element:INFO: Performing Elink synchronization
10:58:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:58:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:58:46:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:58:46:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:58:46:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:58:46:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:58:46:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
10:58:46:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:58:47:febtest:INFO: 1-0 | XA-000-08-002-000-003-165-04 | 25.1 | 1224.5
10:58:47:febtest:INFO: 8-1 | XA-000-08-002-000-002-097-06 | 56.8 | 1130.0
10:58:47:febtest:INFO: 3-2 | XA-000-08-002-000-003-164-04 | 28.2 | 1224.5
10:58:47:febtest:INFO: 10-3 | XA-000-08-002-000-002-127-01 | 44.1 | 1171.5
10:58:48:febtest:INFO: 5-4 | XA-000-08-002-000-003-162-04 | 21.9 | 1253.7
10:58:48:febtest:INFO: 12-5 | XA-000-08-002-001-007-124-02 | 31.4 | 1212.7
10:58:48:febtest:INFO: 7-6 | XA-000-08-002-000-003-156-13 | 44.1 | 1165.6
10:58:48:febtest:INFO: 14-7 | XA-000-08-002-000-002-105-06 | 40.9 | 1189.2
10:58:49:ST3_smx:INFO: Configuring SMX FAST
10:58:51:ST3_smx:INFO: chip: 1-0 37.726682 C 1189.190035 mV
10:58:51:ST3_smx:INFO: Electrons
10:58:51:ST3_smx:INFO: # loops 0
10:58:52:ST3_smx:INFO: # loops 1
10:58:54:ST3_smx:INFO: # loops 2
10:58:55:ST3_smx:INFO: # loops 3
10:58:57:ST3_smx:INFO: # loops 4
10:58:59:ST3_smx:INFO: Total # of broken channels: 0
10:58:59:ST3_smx:INFO: List of broken channels: []
10:58:59:ST3_smx:INFO: Total # of broken channels: 0
10:58:59:ST3_smx:INFO: List of broken channels: []
10:58:59:ST3_smx:INFO: Configuring SMX FAST
10:59:01:ST3_smx:INFO: chip: 8-1 53.612520 C 1141.874115 mV
10:59:01:ST3_smx:INFO: Electrons
10:59:01:ST3_smx:INFO: # loops 0
10:59:02:ST3_smx:INFO: # loops 1
10:59:04:ST3_smx:INFO: # loops 2
10:59:06:ST3_smx:INFO: # loops 3
10:59:07:ST3_smx:INFO: # loops 4
10:59:09:ST3_smx:INFO: Total # of broken channels: 0
10:59:09:ST3_smx:INFO: List of broken channels: []
10:59:09:ST3_smx:INFO: Total # of broken channels: 1
10:59:09:ST3_smx:INFO: List of broken channels: [6]
10:59:09:ST3_smx:INFO: Configuring SMX FAST
10:59:11:ST3_smx:INFO: chip: 3-2 31.389742 C 1224.468235 mV
10:59:11:ST3_smx:INFO: Electrons
10:59:11:ST3_smx:INFO: # loops 0
10:59:13:ST3_smx:INFO: # loops 1
10:59:14:ST3_smx:INFO: # loops 2
10:59:16:ST3_smx:INFO: # loops 3
10:59:17:ST3_smx:INFO: # loops 4
10:59:19:ST3_smx:INFO: Total # of broken channels: 0
10:59:19:ST3_smx:INFO: List of broken channels: []
10:59:19:ST3_smx:INFO: Total # of broken channels: 0
10:59:19:ST3_smx:INFO: List of broken channels: []
10:59:19:ST3_smx:INFO: Configuring SMX FAST
10:59:21:ST3_smx:INFO: chip: 10-3 40.898880 C 1189.190035 mV
10:59:21:ST3_smx:INFO: Electrons
10:59:21:ST3_smx:INFO: # loops 0
10:59:23:ST3_smx:INFO: # loops 1
10:59:24:ST3_smx:INFO: # loops 2
10:59:26:ST3_smx:INFO: # loops 3
10:59:27:ST3_smx:INFO: # loops 4
10:59:29:ST3_smx:INFO: Total # of broken channels: 0
10:59:29:ST3_smx:INFO: List of broken channels: []
10:59:29:ST3_smx:INFO: Total # of broken channels: 0
10:59:29:ST3_smx:INFO: List of broken channels: []
10:59:29:ST3_smx:INFO: Configuring SMX FAST
10:59:31:ST3_smx:INFO: chip: 5-4 31.389742 C 1224.468235 mV
10:59:31:ST3_smx:INFO: Electrons
10:59:31:ST3_smx:INFO: # loops 0
10:59:33:ST3_smx:INFO: # loops 1
10:59:35:ST3_smx:INFO: # loops 2
10:59:36:ST3_smx:INFO: # loops 3
10:59:38:ST3_smx:INFO: # loops 4
10:59:39:ST3_smx:INFO: Total # of broken channels: 0
10:59:39:ST3_smx:INFO: List of broken channels: []
10:59:39:ST3_smx:INFO: Total # of broken channels: 0
10:59:39:ST3_smx:INFO: List of broken channels: []
10:59:40:ST3_smx:INFO: Configuring SMX FAST
10:59:41:ST3_smx:INFO: chip: 12-5 37.726682 C 1189.190035 mV
10:59:41:ST3_smx:INFO: Electrons
10:59:42:ST3_smx:INFO: # loops 0
10:59:43:ST3_smx:INFO: # loops 1
10:59:45:ST3_smx:INFO: # loops 2
10:59:46:ST3_smx:INFO: # loops 3
10:59:48:ST3_smx:INFO: # loops 4
10:59:50:ST3_smx:INFO: Total # of broken channels: 0
10:59:50:ST3_smx:INFO: List of broken channels: []
10:59:50:ST3_smx:INFO: Total # of broken channels: 0
10:59:50:ST3_smx:INFO: List of broken channels: []
10:59:50:ST3_smx:INFO: Configuring SMX FAST
10:59:52:ST3_smx:INFO: chip: 7-6 50.430383 C 1165.571835 mV
10:59:52:ST3_smx:INFO: Electrons
10:59:52:ST3_smx:INFO: # loops 0
10:59:53:ST3_smx:INFO: # loops 1
10:59:55:ST3_smx:INFO: # loops 2
10:59:57:ST3_smx:INFO: # loops 3
10:59:58:ST3_smx:INFO: # loops 4
11:00:00:ST3_smx:INFO: Total # of broken channels: 0
11:00:00:ST3_smx:INFO: List of broken channels: []
11:00:00:ST3_smx:INFO: Total # of broken channels: 0
11:00:00:ST3_smx:INFO: List of broken channels: []
11:00:00:ST3_smx:INFO: Configuring SMX FAST
11:00:02:ST3_smx:INFO: chip: 14-7 47.250730 C 1171.483840 mV
11:00:02:ST3_smx:INFO: Electrons
11:00:02:ST3_smx:INFO: # loops 0
11:00:04:ST3_smx:INFO: # loops 1
11:00:05:ST3_smx:INFO: # loops 2
11:00:07:ST3_smx:INFO: # loops 3
11:00:08:ST3_smx:INFO: # loops 4
11:00:10:ST3_smx:INFO: Total # of broken channels: 0
11:00:10:ST3_smx:INFO: List of broken channels: []
11:00:10:ST3_smx:INFO: Total # of broken channels: 0
11:00:10:ST3_smx:INFO: List of broken channels: []
11:00:10:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
11:00:11:febtest:INFO: 1-0 | XA-000-08-002-000-003-165-04 | 40.9 | 1195.1
11:00:11:febtest:INFO: 8-1 | XA-000-08-002-000-002-097-06 | 56.8 | 1141.9
11:00:11:febtest:INFO: 3-2 | XA-000-08-002-000-003-164-04 | 34.6 | 1218.6
11:00:11:febtest:INFO: 10-3 | XA-000-08-002-000-002-127-01 | 37.7 | 1195.1
11:00:12:febtest:INFO: 5-4 | XA-000-08-002-000-003-162-04 | 31.4 | 1224.5
11:00:12:febtest:INFO: 12-5 | XA-000-08-002-001-007-124-02 | 37.7 | 1189.2
11:00:12:febtest:INFO: 7-6 | XA-000-08-002-000-003-156-13 | 50.4 | 1165.6
11:00:12:febtest:INFO: 14-7 | XA-000-08-002-000-002-105-06 | 47.3 | 1165.6
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2023_11_30-10_57_03
OPERATOR : Robert V.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L3DL500114 M3DL5B2001142B2 124 C
FEB_SN : 0
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:
MODULE_NAME: L3DL500114 M3DL5B2001142B2 124 C
MODULE_TYPE:
MODULE_LADDER: L3DL500114
MODULE_MODULE: M3DL5T1001141A2
MODULE_SIZE: 62
MODULE_GRADE: C
---------------------------------------
VI_before_Init : ['2.450', '1.8150', '1.851', '0.5099', '7.000', '1.5510', '7.000', '1.5510']
VI_after__Init : ['2.450', '2.0040', '1.850', '0.6067', '7.000', '1.5520', '7.000', '1.5520']
VI_at__the_End : ['2.450', '2.0170', '1.850', '0.3185', '7.000', '1.5510', '7.000', '1.5510']
11:00:18:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2054/TestDate_2023_11_30-10_57_03/