FEB_1041    24.11.23 11:19:05

TextEdit.txt
            11:15:30:ST3_hmp4040:INFO:	HAMEG,HMP2030,017836163,HW50010002/SW2.30
11:15:31:febtest:INFO:	FEB8.2 selected
11:15:32:ST3_Shared:INFO:	Listo of operators:Olga B.; 
11:15:36:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
11:15:37:ST3_emu:ERROR:	device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!
11:15:37:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
11:15:37:ST3_emu:ERROR:	device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!
11:15:38:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
11:15:38:ST3_emu:ERROR:	device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!
11:15:39:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
11:15:39:ST3_emu:ERROR:	device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!
11:15:40:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
11:15:40:ST3_emu:ERROR:	device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!
11:15:41:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
11:15:41:ST3_emu:ERROR:	device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!
11:15:42:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
11:15:42:ST3_emu:ERROR:	device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!
11:15:43:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
11:15:43:ST3_emu:ERROR:	device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!
11:15:44:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
11:15:44:ST3_emu:ERROR:	device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!
11:15:45:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
11:15:55:febtest:INFO:	FEB 8-2 A @ GSI
11:15:58:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:15:58:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
11:15:58:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:16:32:ST3_ModuleSelector:INFO:	L3DL500114 M3DL5T2001142A2 124 C

11:16:32:ST3_ModuleSelector:INFO:	
11:16:32:febtest:INFO:	Tsting FEB with SN 1041
11:16:34:smx_tester:INFO:	Scanning setup
11:16:34:elinks:INFO:	Disabling clock on downlink 0
11:16:34:elinks:INFO:	Disabling clock on downlink 1
11:16:34:elinks:INFO:	Disabling clock on downlink 2
11:16:34:elinks:INFO:	Disabling clock on downlink 3
11:16:34:elinks:INFO:	Disabling clock on downlink 4
11:16:34:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:16:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:16:34:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:16:34:elinks:INFO:	Disabling clock on downlink 0
11:16:34:elinks:INFO:	Disabling clock on downlink 1
11:16:34:elinks:INFO:	Disabling clock on downlink 2
11:16:34:elinks:INFO:	Disabling clock on downlink 3
11:16:34:elinks:INFO:	Disabling clock on downlink 4
11:16:34:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:16:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:16:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
11:16:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
11:16:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
11:16:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
11:16:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
11:16:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
11:16:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
11:16:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
11:16:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
11:16:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
11:16:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
11:16:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
11:16:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
11:16:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
11:16:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
11:16:34:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
11:16:34:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:16:34:elinks:INFO:	Disabling clock on downlink 0
11:16:34:elinks:INFO:	Disabling clock on downlink 1
11:16:34:elinks:INFO:	Disabling clock on downlink 2
11:16:34:elinks:INFO:	Disabling clock on downlink 3
11:16:34:elinks:INFO:	Disabling clock on downlink 4
11:16:34:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:16:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:16:34:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:16:34:elinks:INFO:	Disabling clock on downlink 0
11:16:34:elinks:INFO:	Disabling clock on downlink 1
11:16:34:elinks:INFO:	Disabling clock on downlink 2
11:16:34:elinks:INFO:	Disabling clock on downlink 3
11:16:34:elinks:INFO:	Disabling clock on downlink 4
11:16:34:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:16:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:16:34:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:16:34:elinks:INFO:	Disabling clock on downlink 0
11:16:34:elinks:INFO:	Disabling clock on downlink 1
11:16:34:elinks:INFO:	Disabling clock on downlink 2
11:16:34:elinks:INFO:	Disabling clock on downlink 3
11:16:34:elinks:INFO:	Disabling clock on downlink 4
11:16:34:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:16:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
11:16:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:16:35:setup_element:INFO:	Scanning clock phase
11:16:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:16:35:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:16:35:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
11:16:35:setup_element:INFO:	Eye window for uplink 0 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:16:35:setup_element:INFO:	Eye window for uplink 1 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:16:35:setup_element:INFO:	Eye window for uplink 2 : X________________________________________________________________________XXXXXXX
Clock Delay: 36
11:16:35:setup_element:INFO:	Eye window for uplink 3 : X________________________________________________________________________XXXXXXX
Clock Delay: 36
11:16:35:setup_element:INFO:	Eye window for uplink 4 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
11:16:35:setup_element:INFO:	Eye window for uplink 5 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
11:16:35:setup_element:INFO:	Eye window for uplink 6 : XX_______________________________________________________________________XXXXXXX
Clock Delay: 37
11:16:35:setup_element:INFO:	Eye window for uplink 7 : XX_______________________________________________________________________XXXXXXX
Clock Delay: 37
11:16:35:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:16:35:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:16:35:setup_element:INFO:	Eye window for uplink 10: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:16:35:setup_element:INFO:	Eye window for uplink 11: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:16:35:setup_element:INFO:	Eye window for uplink 12: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
11:16:35:setup_element:INFO:	Eye window for uplink 13: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
11:16:35:setup_element:INFO:	Eye window for uplink 14: X________________________________________________________________________XXXXXXX
Clock Delay: 36
11:16:35:setup_element:INFO:	Eye window for uplink 15: X________________________________________________________________________XXXXXXX
Clock Delay: 36
11:16:35:setup_element:INFO:	Setting the clock phase to 35 for group 0, downlink 1
11:16:35:setup_element:INFO:	Scanning data phases
11:16:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:16:35:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:16:41:setup_element:INFO:	Data phase scan results for group 0, downlink 1
11:16:41:setup_element:INFO:	Eye window for uplink 0 : ________XXXXX___________________________
Data delay found: 30
11:16:41:setup_element:INFO:	Eye window for uplink 1 : ____XXXXX_______________________________
Data delay found: 26
11:16:41:setup_element:INFO:	Eye window for uplink 2 : _______XXXXXX___________________________
Data delay found: 29
11:16:41:setup_element:INFO:	Eye window for uplink 3 : ____XXXXXX______________________________
Data delay found: 26
11:16:41:setup_element:INFO:	Eye window for uplink 4 : _XXXXXX_____________________________XXXX
Data delay found: 21
11:16:41:setup_element:INFO:	Eye window for uplink 5 : XXX_________________________________XXXX
Data delay found: 19
11:16:41:setup_element:INFO:	Eye window for uplink 6 : XXXX___________________________________X
Data delay found: 21
11:16:41:setup_element:INFO:	Eye window for uplink 7 : __________________________________XXXXX_
Data delay found: 16
11:16:41:setup_element:INFO:	Eye window for uplink 8 : _____________________XXXX_______________
Data delay found: 2
11:16:41:setup_element:INFO:	Eye window for uplink 9 : _________________________XXXXX__________
Data delay found: 7
11:16:41:setup_element:INFO:	Eye window for uplink 10: __________________________XXXXX_________
Data delay found: 8
11:16:41:setup_element:INFO:	Eye window for uplink 11: ______________________________XXXXX_____
Data delay found: 12
11:16:41:setup_element:INFO:	Eye window for uplink 12: __________________________XXXXXX________
Data delay found: 8
11:16:41:setup_element:INFO:	Eye window for uplink 13: _____________________________XXXXXX_____
Data delay found: 11
11:16:41:setup_element:INFO:	Eye window for uplink 14: ____________________________XXXXX_______
Data delay found: 10
11:16:41:setup_element:INFO:	Eye window for uplink 15: ______________________________XXXXXX____
Data delay found: 12
11:16:41:setup_element:INFO:	Setting the data phase to 30 for uplink 0
11:16:41:setup_element:INFO:	Setting the data phase to 26 for uplink 1
11:16:41:setup_element:INFO:	Setting the data phase to 29 for uplink 2
11:16:41:setup_element:INFO:	Setting the data phase to 26 for uplink 3
11:16:41:setup_element:INFO:	Setting the data phase to 21 for uplink 4
11:16:41:setup_element:INFO:	Setting the data phase to 19 for uplink 5
11:16:41:setup_element:INFO:	Setting the data phase to 21 for uplink 6
11:16:41:setup_element:INFO:	Setting the data phase to 16 for uplink 7
11:16:41:setup_element:INFO:	Setting the data phase to 2 for uplink 8
11:16:41:setup_element:INFO:	Setting the data phase to 7 for uplink 9
11:16:41:setup_element:INFO:	Setting the data phase to 8 for uplink 10
11:16:41:setup_element:INFO:	Setting the data phase to 12 for uplink 11
11:16:41:setup_element:INFO:	Setting the data phase to 8 for uplink 12
11:16:41:setup_element:INFO:	Setting the data phase to 11 for uplink 13
11:16:41:setup_element:INFO:	Setting the data phase to 10 for uplink 14
11:16:41:setup_element:INFO:	Setting the data phase to 12 for uplink 15
11:16:41:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 35
    Window Length: 67
    Eye Windows:
      Uplink  0: _________________________________________________________________________XXXXXX_
      Uplink  1: _________________________________________________________________________XXXXXX_
      Uplink  2: X________________________________________________________________________XXXXXXX
      Uplink  3: X________________________________________________________________________XXXXXXX
      Uplink  4: ________________________________________________________________________XXXXXXX_
      Uplink  5: ________________________________________________________________________XXXXXXX_
      Uplink  6: XX_______________________________________________________________________XXXXXXX
      Uplink  7: XX_______________________________________________________________________XXXXXXX
      Uplink  8: _____________________________________________________________________XXXXXXXX___
      Uplink  9: _____________________________________________________________________XXXXXXXX___
      Uplink 10: _______________________________________________________________________XXXXXXXX_
      Uplink 11: _______________________________________________________________________XXXXXXXX_
      Uplink 12: ________________________________________________________________________XXXXXXX_
      Uplink 13: ________________________________________________________________________XXXXXXX_
      Uplink 14: X________________________________________________________________________XXXXXXX
      Uplink 15: X________________________________________________________________________XXXXXXX
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 1:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 2:
      Optimal Phase: 29
      Window Length: 34
      Eye Window: _______XXXXXX___________________________
    Uplink 3:
      Optimal Phase: 26
      Window Length: 34
      Eye Window: ____XXXXXX______________________________
    Uplink 4:
      Optimal Phase: 21
      Window Length: 29
      Eye Window: _XXXXXX_____________________________XXXX
    Uplink 5:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX
    Uplink 6:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 7:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 8:
      Optimal Phase: 2
      Window Length: 36
      Eye Window: _____________________XXXX_______________
    Uplink 9:
      Optimal Phase: 7
      Window Length: 35
      Eye Window: _________________________XXXXX__________
    Uplink 10:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 11:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 12:
      Optimal Phase: 8
      Window Length: 34
      Eye Window: __________________________XXXXXX________
    Uplink 13:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____
    Uplink 14:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 15:
      Optimal Phase: 12
      Window Length: 34
      Eye Window: ______________________________XXXXXX____
]
11:16:41:setup_element:INFO:	Beginning SMX ASICs map scan
11:16:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:16:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:16:41:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
11:16:41:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
11:16:41:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:16:41:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:16:41:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:16:41:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:16:41:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:16:41:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:16:41:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:16:41:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:16:41:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:16:41:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:16:41:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:16:42:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:16:42:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:16:42:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:16:42:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:16:43:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 35
    Window Length: 67
    Eye Windows:
      Uplink  0: _________________________________________________________________________XXXXXX_
      Uplink  1: _________________________________________________________________________XXXXXX_
      Uplink  2: X________________________________________________________________________XXXXXXX
      Uplink  3: X________________________________________________________________________XXXXXXX
      Uplink  4: ________________________________________________________________________XXXXXXX_
      Uplink  5: ________________________________________________________________________XXXXXXX_
      Uplink  6: XX_______________________________________________________________________XXXXXXX
      Uplink  7: XX_______________________________________________________________________XXXXXXX
      Uplink  8: _____________________________________________________________________XXXXXXXX___
      Uplink  9: _____________________________________________________________________XXXXXXXX___
      Uplink 10: _______________________________________________________________________XXXXXXXX_
      Uplink 11: _______________________________________________________________________XXXXXXXX_
      Uplink 12: ________________________________________________________________________XXXXXXX_
      Uplink 13: ________________________________________________________________________XXXXXXX_
      Uplink 14: X________________________________________________________________________XXXXXXX
      Uplink 15: X________________________________________________________________________XXXXXXX
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 1:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 2:
      Optimal Phase: 29
      Window Length: 34
      Eye Window: _______XXXXXX___________________________
    Uplink 3:
      Optimal Phase: 26
      Window Length: 34
      Eye Window: ____XXXXXX______________________________
    Uplink 4:
      Optimal Phase: 21
      Window Length: 29
      Eye Window: _XXXXXX_____________________________XXXX
    Uplink 5:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX
    Uplink 6:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 7:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 8:
      Optimal Phase: 2
      Window Length: 36
      Eye Window: _____________________XXXX_______________
    Uplink 9:
      Optimal Phase: 7
      Window Length: 35
      Eye Window: _________________________XXXXX__________
    Uplink 10:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 11:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 12:
      Optimal Phase: 8
      Window Length: 34
      Eye Window: __________________________XXXXXX________
    Uplink 13:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____
    Uplink 14:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 15:
      Optimal Phase: 12
      Window Length: 34
      Eye Window: ______________________________XXXXXX____

11:16:43:setup_element:INFO:	Performing Elink synchronization
11:16:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:16:43:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:16:43:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
11:16:43:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
11:16:43:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
11:16:43:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:16:44:ST3_emu:INFO:	Number of chips: 7
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   2  |   [0]   |  1  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
11:16:45:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
11:16:45:febtest:INFO:	0-0 | XA-000-08-002-000-001-040-13 |  31.4 | 1218.6
11:16:45:febtest:INFO:	0-1 | XA-000-08-001-064-048-160-14 |  37.7 | 1189.2
11:16:45:febtest:INFO:	0-2 | XA-000-08-001-064-049-064-02 |  37.7 | 1195.1
11:16:45:febtest:INFO:	0-3 | XA-000-08-001-064-048-176-09 |  40.9 | 1183.3
11:16:46:febtest:INFO:	0-4 | XA-000-08-001-064-049-008-07 |  15.6 | 1271.2
11:16:46:febtest:INFO:	0-5 | XA-000-08-001-064-049-040-09 |  44.1 | 1159.7
11:16:46:febtest:INFO:	0-7 | XA-000-08-001-064-049-056-14 |  37.7 | 1195.1
11:16:46:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:16:50:ST3_smx:INFO:	chip: 0-0 	 37.726682 C 	 1200.969315 mV
11:16:50:ST3_smx:INFO:		Electrons
11:16:50:ST3_smx:INFO:	# loops 0
11:16:52:ST3_smx:INFO:	# loops 1
11:16:54:ST3_smx:INFO:	# loops 2
11:16:55:ST3_smx:INFO:	# loops 3
11:16:57:ST3_smx:INFO:	# loops 4
11:16:59:ST3_smx:INFO:	Total # of broken channels: 0
11:16:59:ST3_smx:INFO:	List of broken channels: []
11:16:59:ST3_smx:INFO:	Total # of broken channels: 0
11:16:59:ST3_smx:INFO:	List of broken channels: []
11:16:59:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:17:03:ST3_smx:INFO:	chip: 0-1 	 40.898880 C 	 1183.292940 mV
11:17:03:ST3_smx:INFO:		Electrons
11:17:03:ST3_smx:INFO:	# loops 0
11:17:05:ST3_smx:INFO:	# loops 1
11:17:07:ST3_smx:INFO:	# loops 2
11:17:08:ST3_smx:INFO:	# loops 3
11:17:10:ST3_smx:INFO:	# loops 4
11:17:12:ST3_smx:INFO:	Total # of broken channels: 0
11:17:12:ST3_smx:INFO:	List of broken channels: []
11:17:12:ST3_smx:INFO:	Total # of broken channels: 0
11:17:12:ST3_smx:INFO:	List of broken channels: []
11:17:12:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:17:16:ST3_smx:INFO:	chip: 0-2 	 34.556970 C 	 1212.728715 mV
11:17:16:ST3_smx:INFO:		Electrons
11:17:16:ST3_smx:INFO:	# loops 0
11:17:18:ST3_smx:INFO:	# loops 1
11:17:20:ST3_smx:INFO:	# loops 2
11:17:21:ST3_smx:INFO:	# loops 3
11:17:23:ST3_smx:INFO:	# loops 4
11:17:25:ST3_smx:INFO:	Total # of broken channels: 0
11:17:25:ST3_smx:INFO:	List of broken channels: []
11:17:25:ST3_smx:INFO:	Total # of broken channels: 0
11:17:25:ST3_smx:INFO:	List of broken channels: []
11:17:25:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:17:29:ST3_smx:INFO:	chip: 0-3 	 37.726682 C 	 1195.082160 mV
11:17:29:ST3_smx:INFO:		Electrons
11:17:29:ST3_smx:INFO:	# loops 0
11:17:31:ST3_smx:INFO:	# loops 1
11:17:33:ST3_smx:INFO:	# loops 2
11:17:34:ST3_smx:INFO:	# loops 3
11:17:36:ST3_smx:INFO:	# loops 4
11:17:38:ST3_smx:INFO:	Total # of broken channels: 0
11:17:38:ST3_smx:INFO:	List of broken channels: []
11:17:38:ST3_smx:INFO:	Total # of broken channels: 0
11:17:38:ST3_smx:INFO:	List of broken channels: []
11:17:38:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:17:42:ST3_smx:INFO:	chip: 0-4 	 25.062742 C 	 1253.730060 mV
11:17:42:ST3_smx:INFO:		Electrons
11:17:42:ST3_smx:INFO:	# loops 0
11:17:44:ST3_smx:INFO:	# loops 1
11:17:45:ST3_smx:INFO:	# loops 2
11:17:47:ST3_smx:INFO:	# loops 3
11:17:49:ST3_smx:INFO:	# loops 4
11:17:50:ST3_smx:INFO:	Total # of broken channels: 0
11:17:50:ST3_smx:INFO:	List of broken channels: []
11:17:50:ST3_smx:INFO:	Total # of broken channels: 0
11:17:50:ST3_smx:INFO:	List of broken channels: []
11:17:51:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:17:54:ST3_smx:INFO:	chip: 0-5 	 50.430383 C 	 1159.654860 mV
11:17:54:ST3_smx:INFO:		Electrons
11:17:54:ST3_smx:INFO:	# loops 0
11:17:56:ST3_smx:INFO:	# loops 1
11:17:58:ST3_smx:INFO:	# loops 2
11:17:59:ST3_smx:INFO:	# loops 3
11:18:01:ST3_smx:INFO:	# loops 4
11:18:02:ST3_smx:INFO:	Total # of broken channels: 0
11:18:02:ST3_smx:INFO:	List of broken channels: []
11:18:02:ST3_smx:INFO:	Total # of broken channels: 0
11:18:02:ST3_smx:INFO:	List of broken channels: []
11:18:03:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:18:06:ST3_smx:INFO:	chip: 0-7 	 50.430383 C 	 1171.483840 mV
11:18:06:ST3_smx:INFO:		Electrons
11:18:06:ST3_smx:INFO:	# loops 0
11:18:08:ST3_smx:INFO:	# loops 1
11:18:09:ST3_smx:INFO:	# loops 2
11:18:11:ST3_smx:INFO:	# loops 3
11:18:13:ST3_smx:INFO:	# loops 4
11:18:14:ST3_smx:INFO:	Total # of broken channels: 0
11:18:14:ST3_smx:INFO:	List of broken channels: []
11:18:14:ST3_smx:INFO:	Total # of broken channels: 0
11:18:14:ST3_smx:INFO:	List of broken channels: []
11:18:15:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
11:18:15:febtest:INFO:	0-0 | XA-000-08-002-000-001-040-13 |  40.9 | 1201.0
11:18:15:febtest:INFO:	0-1 | XA-000-08-001-064-048-160-14 |  44.1 | 1183.3
11:18:15:febtest:INFO:	0-2 | XA-000-08-001-064-049-064-02 |  34.6 | 1212.7
11:18:16:febtest:INFO:	0-3 | XA-000-08-001-064-048-176-09 |  37.7 | 1195.1
11:18:16:febtest:INFO:	0-4 | XA-000-08-001-064-049-008-07 |  25.1 | 1253.7
11:18:16:febtest:INFO:	0-5 | XA-000-08-001-064-049-040-09 |  50.4 | 1159.7
11:18:16:febtest:INFO:	0-7 | XA-000-08-001-064-049-056-14 |  50.4 | 1171.5
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2023_11_24-11_15_58
OPERATOR  : Olga B.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L3DL500114 M3DL5T2001142A2 124 C

FEB_SN : 1086
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	
MODULE_NAME:	L3DL500114 M3DL5T2001142A2 124 C

MODULE_TYPE:	PB
MODULE_LADDER:	
MODULE_MODULE:	
MODULE_SIZE:	0
MODULE_GRADE:	
---------------------------------------
VI_before_Init : ['2.450', '1.8870', '1.851', '0.6552', '7.000', '1.5520', '7.000', '1.5520']
VI_after__Init : ['2.450', '2.0160', '1.850', '0.7094', '7.000', '1.5530', '7.000', '1.5530']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
11:19:05:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:19:05:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
11:19:05:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:19:07:ST3_ModuleSelector:INFO:	L3DL500114 M3DL5T2001142A2 124 C

11:19:07:ST3_ModuleSelector:INFO:	
11:19:07:febtest:INFO:	Tsting FEB with SN 1041
11:19:08:smx_tester:INFO:	Scanning setup
11:19:08:elinks:INFO:	Disabling clock on downlink 0
11:19:08:elinks:INFO:	Disabling clock on downlink 1
11:19:08:elinks:INFO:	Disabling clock on downlink 2
11:19:08:elinks:INFO:	Disabling clock on downlink 3
11:19:08:elinks:INFO:	Disabling clock on downlink 4
11:19:08:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:19:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:19:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:19:09:elinks:INFO:	Disabling clock on downlink 0
11:19:09:elinks:INFO:	Disabling clock on downlink 1
11:19:09:elinks:INFO:	Disabling clock on downlink 2
11:19:09:elinks:INFO:	Disabling clock on downlink 3
11:19:09:elinks:INFO:	Disabling clock on downlink 4
11:19:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:19:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
11:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
11:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
11:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
11:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
11:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
11:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
11:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
11:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
11:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
11:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
11:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
11:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
11:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
11:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
11:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
11:19:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:19:09:elinks:INFO:	Disabling clock on downlink 0
11:19:09:elinks:INFO:	Disabling clock on downlink 1
11:19:09:elinks:INFO:	Disabling clock on downlink 2
11:19:09:elinks:INFO:	Disabling clock on downlink 3
11:19:09:elinks:INFO:	Disabling clock on downlink 4
11:19:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:19:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:19:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:19:09:elinks:INFO:	Disabling clock on downlink 0
11:19:09:elinks:INFO:	Disabling clock on downlink 1
11:19:09:elinks:INFO:	Disabling clock on downlink 2
11:19:09:elinks:INFO:	Disabling clock on downlink 3
11:19:09:elinks:INFO:	Disabling clock on downlink 4
11:19:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:19:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:19:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:19:09:elinks:INFO:	Disabling clock on downlink 0
11:19:09:elinks:INFO:	Disabling clock on downlink 1
11:19:09:elinks:INFO:	Disabling clock on downlink 2
11:19:09:elinks:INFO:	Disabling clock on downlink 3
11:19:09:elinks:INFO:	Disabling clock on downlink 4
11:19:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:19:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
11:19:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:19:09:setup_element:INFO:	Scanning clock phase
11:19:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:19:09:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:19:10:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
11:19:10:setup_element:INFO:	Eye window for uplink 0 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
11:19:10:setup_element:INFO:	Eye window for uplink 1 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
11:19:10:setup_element:INFO:	Eye window for uplink 2 : X________________________________________________________________________XXXXXXX
Clock Delay: 36
11:19:10:setup_element:INFO:	Eye window for uplink 3 : X________________________________________________________________________XXXXXXX
Clock Delay: 36
11:19:10:setup_element:INFO:	Eye window for uplink 4 : ________________________________________________________________________________
Clock Delay: 40
11:19:10:setup_element:INFO:	Eye window for uplink 5 : ________________________________________________________________________________
Clock Delay: 40
11:19:10:setup_element:INFO:	Eye window for uplink 6 : X________________________________________________________________________XXXXXXX
Clock Delay: 36
11:19:10:setup_element:INFO:	Eye window for uplink 7 : X________________________________________________________________________XXXXXXX
Clock Delay: 36
11:19:10:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:19:10:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:19:10:setup_element:INFO:	Eye window for uplink 10: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
11:19:10:setup_element:INFO:	Eye window for uplink 11: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
11:19:10:setup_element:INFO:	Eye window for uplink 12: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
11:19:10:setup_element:INFO:	Eye window for uplink 13: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
11:19:10:setup_element:INFO:	Eye window for uplink 14: X________________________________________________________________________XXXXXXX
Clock Delay: 36
11:19:10:setup_element:INFO:	Eye window for uplink 15: X________________________________________________________________________XXXXXXX
Clock Delay: 36
11:19:10:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 1
11:19:10:setup_element:INFO:	Scanning data phases
11:19:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:19:10:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:19:16:setup_element:INFO:	Data phase scan results for group 0, downlink 1
11:19:16:setup_element:INFO:	Eye window for uplink 0 : ________XXXXXX__________________________
Data delay found: 30
11:19:16:setup_element:INFO:	Eye window for uplink 1 : _____XXXXX______________________________
Data delay found: 27
11:19:16:setup_element:INFO:	Eye window for uplink 2 : _______XXXXX____________________________
Data delay found: 29
11:19:16:setup_element:INFO:	Eye window for uplink 3 : ____XXXXXX______________________________
Data delay found: 26
11:19:16:setup_element:INFO:	Eye window for uplink 4 : __XXXXXX________________________________
Data delay found: 24
11:19:16:setup_element:INFO:	Eye window for uplink 5 : XXX__________________________________XXX
Data delay found: 19
11:19:16:setup_element:INFO:	Eye window for uplink 6 : XXXX___________________________________X
Data delay found: 21
11:19:16:setup_element:INFO:	Eye window for uplink 7 : X_________________________________XXXXX_
Data delay found: 17
11:19:16:setup_element:INFO:	Eye window for uplink 8 : ______________________XXXX______________
Data delay found: 3
11:19:16:setup_element:INFO:	Eye window for uplink 9 : _________________________XXXXXX_________
Data delay found: 7
11:19:16:setup_element:INFO:	Eye window for uplink 10: ___________________________XXXXX________
Data delay found: 9
11:19:16:setup_element:INFO:	Eye window for uplink 11: _______________________________XXXXX____
Data delay found: 13
11:19:16:setup_element:INFO:	Eye window for uplink 12: ___________________________XXXXX________
Data delay found: 9
11:19:16:setup_element:INFO:	Eye window for uplink 13: ______________________________XXXXXX____
Data delay found: 12
11:19:16:setup_element:INFO:	Eye window for uplink 14: ____________________________XXXXX_______
Data delay found: 10
11:19:16:setup_element:INFO:	Eye window for uplink 15: _______________________________XXXXXX___
Data delay found: 13
11:19:16:setup_element:INFO:	Setting the data phase to 30 for uplink 0
11:19:16:setup_element:INFO:	Setting the data phase to 27 for uplink 1
11:19:16:setup_element:INFO:	Setting the data phase to 29 for uplink 2
11:19:16:setup_element:INFO:	Setting the data phase to 26 for uplink 3
11:19:16:setup_element:INFO:	Setting the data phase to 24 for uplink 4
11:19:16:setup_element:INFO:	Setting the data phase to 19 for uplink 5
11:19:16:setup_element:INFO:	Setting the data phase to 21 for uplink 6
11:19:16:setup_element:INFO:	Setting the data phase to 17 for uplink 7
11:19:16:setup_element:INFO:	Setting the data phase to 3 for uplink 8
11:19:16:setup_element:INFO:	Setting the data phase to 7 for uplink 9
11:19:16:setup_element:INFO:	Setting the data phase to 9 for uplink 10
11:19:16:setup_element:INFO:	Setting the data phase to 13 for uplink 11
11:19:16:setup_element:INFO:	Setting the data phase to 9 for uplink 12
11:19:16:setup_element:INFO:	Setting the data phase to 12 for uplink 13
11:19:16:setup_element:INFO:	Setting the data phase to 10 for uplink 14
11:19:16:setup_element:INFO:	Setting the data phase to 13 for uplink 15
11:19:16:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 68
    Eye Windows:
      Uplink  0: _________________________________________________________________________XXXXXXX
      Uplink  1: _________________________________________________________________________XXXXXXX
      Uplink  2: X________________________________________________________________________XXXXXXX
      Uplink  3: X________________________________________________________________________XXXXXXX
      Uplink  4: ________________________________________________________________________________
      Uplink  5: ________________________________________________________________________________
      Uplink  6: X________________________________________________________________________XXXXXXX
      Uplink  7: X________________________________________________________________________XXXXXXX
      Uplink  8: _____________________________________________________________________XXXXXXXXX__
      Uplink  9: _____________________________________________________________________XXXXXXXXX__
      Uplink 10: _______________________________________________________________________XXXXXXXXX
      Uplink 11: _______________________________________________________________________XXXXXXXXX
      Uplink 12: ________________________________________________________________________XXXXXXXX
      Uplink 13: ________________________________________________________________________XXXXXXXX
      Uplink 14: X________________________________________________________________________XXXXXXX
      Uplink 15: X________________________________________________________________________XXXXXXX
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 30
      Window Length: 34
      Eye Window: ________XXXXXX__________________________
    Uplink 1:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 2:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 3:
      Optimal Phase: 26
      Window Length: 34
      Eye Window: ____XXXXXX______________________________
    Uplink 4:
      Optimal Phase: 24
      Window Length: 34
      Eye Window: __XXXXXX________________________________
    Uplink 5:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 6:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 7:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXX_
    Uplink 8:
      Optimal Phase: 3
      Window Length: 36
      Eye Window: ______________________XXXX______________
    Uplink 9:
      Optimal Phase: 7
      Window Length: 34
      Eye Window: _________________________XXXXXX_________
    Uplink 10:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 11:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 12:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 13:
      Optimal Phase: 12
      Window Length: 34
      Eye Window: ______________________________XXXXXX____
    Uplink 14:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 15:
      Optimal Phase: 13
      Window Length: 34
      Eye Window: _______________________________XXXXXX___
]
11:19:16:setup_element:INFO:	Beginning SMX ASICs map scan
11:19:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:19:16:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:19:16:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
11:19:16:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
11:19:16:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:19:16:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:19:16:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:19:16:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:19:16:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:19:16:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:19:16:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:19:16:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:19:16:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:19:16:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:19:17:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:19:17:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:19:17:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:19:17:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:19:17:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:19:17:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:19:17:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:19:18:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 68
    Eye Windows:
      Uplink  0: _________________________________________________________________________XXXXXXX
      Uplink  1: _________________________________________________________________________XXXXXXX
      Uplink  2: X________________________________________________________________________XXXXXXX
      Uplink  3: X________________________________________________________________________XXXXXXX
      Uplink  4: ________________________________________________________________________________
      Uplink  5: ________________________________________________________________________________
      Uplink  6: X________________________________________________________________________XXXXXXX
      Uplink  7: X________________________________________________________________________XXXXXXX
      Uplink  8: _____________________________________________________________________XXXXXXXXX__
      Uplink  9: _____________________________________________________________________XXXXXXXXX__
      Uplink 10: _______________________________________________________________________XXXXXXXXX
      Uplink 11: _______________________________________________________________________XXXXXXXXX
      Uplink 12: ________________________________________________________________________XXXXXXXX
      Uplink 13: ________________________________________________________________________XXXXXXXX
      Uplink 14: X________________________________________________________________________XXXXXXX
      Uplink 15: X________________________________________________________________________XXXXXXX
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 30
      Window Length: 34
      Eye Window: ________XXXXXX__________________________
    Uplink 1:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 2:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 3:
      Optimal Phase: 26
      Window Length: 34
      Eye Window: ____XXXXXX______________________________
    Uplink 4:
      Optimal Phase: 24
      Window Length: 34
      Eye Window: __XXXXXX________________________________
    Uplink 5:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 6:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 7:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXX_
    Uplink 8:
      Optimal Phase: 3
      Window Length: 36
      Eye Window: ______________________XXXX______________
    Uplink 9:
      Optimal Phase: 7
      Window Length: 34
      Eye Window: _________________________XXXXXX_________
    Uplink 10:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 11:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 12:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 13:
      Optimal Phase: 12
      Window Length: 34
      Eye Window: ______________________________XXXXXX____
    Uplink 14:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 15:
      Optimal Phase: 13
      Window Length: 34
      Eye Window: _______________________________XXXXXX___

11:19:18:setup_element:INFO:	Performing Elink synchronization
11:19:18:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:19:18:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:19:18:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
11:19:18:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
11:19:19:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
11:19:19:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:19:19:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   2  |   [0]   |  1  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   6  |   [0]   |  1  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_0__upli_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_8 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_1__upli_8
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2_3 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_2__upli_3
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_10 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_3__upli_10
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_4__upli_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_12 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_5__upli_12
11:19:20:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
11:19:20:febtest:INFO:	0-0 | XA-000-08-002-000-001-040-13 |  34.6 | 1224.5
11:19:20:febtest:INFO:	0-1 | XA-000-08-001-064-048-160-14 |  40.9 | 1189.2
11:19:20:febtest:INFO:	0-2 | XA-000-08-001-064-049-064-02 |  37.7 | 1206.9
11:19:21:febtest:INFO:	0-3 | XA-000-08-001-064-048-176-09 |  44.1 | 1177.4
11:19:21:febtest:INFO:	0-4 | XA-000-08-001-064-049-008-07 |  18.7 | 1271.2
11:19:21:febtest:INFO:	0-5 | XA-000-08-001-064-049-040-09 |  47.3 | 1159.7
11:19:21:febtest:INFO:	0-6 | XA-000-08-001-064-049-032-09 |  56.8 | 1141.9
11:19:22:febtest:INFO:	0-7 | XA-000-08-001-064-049-056-14 |  37.7 | 1201.0
11:19:22:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:19:25:ST3_smx:INFO:	chip: 0-0 	 37.726682 C 	 1200.969315 mV
11:19:25:ST3_smx:INFO:		Electrons
11:19:25:ST3_smx:INFO:	# loops 0
11:19:27:ST3_smx:INFO:	# loops 1
11:19:29:ST3_smx:INFO:	# loops 2
11:19:30:ST3_smx:INFO:	# loops 3
11:19:32:ST3_smx:INFO:	# loops 4
11:19:33:ST3_smx:INFO:	Total # of broken channels: 0
11:19:33:ST3_smx:INFO:	List of broken channels: []
11:19:33:ST3_smx:INFO:	Total # of broken channels: 0
11:19:33:ST3_smx:INFO:	List of broken channels: []
11:19:34:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:19:37:ST3_smx:INFO:	chip: 0-1 	 44.073563 C 	 1183.292940 mV
11:19:37:ST3_smx:INFO:		Electrons
11:19:37:ST3_smx:INFO:	# loops 0
11:19:39:ST3_smx:INFO:	# loops 1
11:19:40:ST3_smx:INFO:	# loops 2
11:19:42:ST3_smx:INFO:	# loops 3
11:19:44:ST3_smx:INFO:	# loops 4
11:19:45:ST3_smx:INFO:	Total # of broken channels: 0
11:19:45:ST3_smx:INFO:	List of broken channels: []
11:19:45:ST3_smx:INFO:	Total # of broken channels: 0
11:19:45:ST3_smx:INFO:	List of broken channels: []
11:19:45:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:19:49:ST3_smx:INFO:	chip: 0-2 	 37.726682 C 	 1218.600960 mV
11:19:49:ST3_smx:INFO:		Electrons
11:19:49:ST3_smx:INFO:	# loops 0
11:19:51:ST3_smx:INFO:	# loops 1
11:19:52:ST3_smx:INFO:	# loops 2
11:19:54:ST3_smx:INFO:	# loops 3
11:19:56:ST3_smx:INFO:	# loops 4
11:19:57:ST3_smx:INFO:	Total # of broken channels: 0
11:19:57:ST3_smx:INFO:	List of broken channels: []
11:19:57:ST3_smx:INFO:	Total # of broken channels: 0
11:19:57:ST3_smx:INFO:	List of broken channels: []
11:19:58:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:20:01:ST3_smx:INFO:	chip: 0-3 	 40.898880 C 	 1195.082160 mV
11:20:01:ST3_smx:INFO:		Electrons
11:20:01:ST3_smx:INFO:	# loops 0
11:20:03:ST3_smx:INFO:	# loops 1
11:20:04:ST3_smx:INFO:	# loops 2
11:20:06:ST3_smx:INFO:	# loops 3
11:20:08:ST3_smx:INFO:	# loops 4
11:20:09:ST3_smx:INFO:	Total # of broken channels: 0
11:20:09:ST3_smx:INFO:	List of broken channels: []
11:20:09:ST3_smx:INFO:	Total # of broken channels: 0
11:20:09:ST3_smx:INFO:	List of broken channels: []
11:20:09:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:20:13:ST3_smx:INFO:	chip: 0-4 	 25.062742 C 	 1253.730060 mV
11:20:13:ST3_smx:INFO:		Electrons
11:20:13:ST3_smx:INFO:	# loops 0
11:20:15:ST3_smx:INFO:	# loops 1
11:20:16:ST3_smx:INFO:	# loops 2
11:20:18:ST3_smx:INFO:	# loops 3
11:20:19:ST3_smx:INFO:	# loops 4
11:20:21:ST3_smx:INFO:	Total # of broken channels: 0
11:20:21:ST3_smx:INFO:	List of broken channels: []
11:20:21:ST3_smx:INFO:	Total # of broken channels: 0
11:20:21:ST3_smx:INFO:	List of broken channels: []
11:20:21:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:20:25:ST3_smx:INFO:	chip: 0-5 	 50.430383 C 	 1159.654860 mV
11:20:25:ST3_smx:INFO:		Electrons
11:20:25:ST3_smx:INFO:	# loops 0
11:20:27:ST3_smx:INFO:	# loops 1
11:20:28:ST3_smx:INFO:	# loops 2
11:20:30:ST3_smx:INFO:	# loops 3
11:20:32:ST3_smx:INFO:	# loops 4
11:20:33:ST3_smx:INFO:	Total # of broken channels: 0
11:20:33:ST3_smx:INFO:	List of broken channels: []
11:20:33:ST3_smx:INFO:	Total # of broken channels: 0
11:20:33:ST3_smx:INFO:	List of broken channels: []
11:20:33:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:20:37:ST3_smx:INFO:	chip: 0-6 	 53.612520 C 	 1159.654860 mV
11:20:37:ST3_smx:INFO:		Electrons
11:20:37:ST3_smx:INFO:	# loops 0
11:20:39:ST3_smx:INFO:	# loops 1
11:20:40:ST3_smx:INFO:	# loops 2
11:20:42:ST3_smx:INFO:	# loops 3
11:20:44:ST3_smx:INFO:	# loops 4
11:20:45:ST3_smx:INFO:	Total # of broken channels: 0
11:20:45:ST3_smx:INFO:	List of broken channels: []
11:20:45:ST3_smx:INFO:	Total # of broken channels: 0
11:20:45:ST3_smx:INFO:	List of broken channels: []
11:20:45:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:20:49:ST3_smx:INFO:	chip: 0-7 	 50.430383 C 	 1171.483840 mV
11:20:49:ST3_smx:INFO:		Electrons
11:20:49:ST3_smx:INFO:	# loops 0
11:20:51:ST3_smx:INFO:	# loops 1
11:20:52:ST3_smx:INFO:	# loops 2
11:20:54:ST3_smx:INFO:	# loops 3
11:20:55:ST3_smx:INFO:	# loops 4
11:20:57:ST3_smx:INFO:	Total # of broken channels: 0
11:20:57:ST3_smx:INFO:	List of broken channels: []
11:20:57:ST3_smx:INFO:	Total # of broken channels: 0
11:20:57:ST3_smx:INFO:	List of broken channels: []
11:20:58:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
11:20:58:febtest:INFO:	0-0 | XA-000-08-002-000-001-040-13 |  40.9 | 1201.0
11:20:58:febtest:INFO:	0-1 | XA-000-08-001-064-048-160-14 |  44.1 | 1183.3
11:20:58:febtest:INFO:	0-2 | XA-000-08-001-064-049-064-02 |  37.7 | 1212.7
11:20:59:febtest:INFO:	0-3 | XA-000-08-001-064-048-176-09 |  40.9 | 1201.0
11:20:59:febtest:INFO:	0-4 | XA-000-08-001-064-049-008-07 |  28.2 | 1253.7
11:20:59:febtest:INFO:	0-5 | XA-000-08-001-064-049-040-09 |  50.4 | 1159.7
11:20:59:febtest:INFO:	0-6 | XA-000-08-001-064-049-032-09 |  53.6 | 1159.7
11:20:59:febtest:INFO:	0-7 | XA-000-08-001-064-049-056-14 |  50.4 | 1171.5
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2023_11_24-11_19_05
OPERATOR  : Olga B.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L3DL500114 M3DL5T2001142A2 124 C

FEB_SN : 1086
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	
MODULE_NAME:	L3DL500114 M3DL5T2001142A2 124 C

MODULE_TYPE:	PB
MODULE_LADDER:	
MODULE_MODULE:	
MODULE_SIZE:	0
MODULE_GRADE:	
---------------------------------------
VI_before_Init : ['2.450', '1.8650', '1.851', '0.4341', '7.000', '1.5510', '7.000', '1.5510']
VI_after__Init : ['2.450', '2.0110', '1.850', '0.4996', '7.000', '1.5520', '7.000', '1.5520']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
11:21:17:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_1041/TestDate_2023_11_24-11_19_05/