FEB_1044    19.01.24 08:19:05

TextEdit.txt
            08:16:12:ST3_hmp4040:INFO:	HAMEG,HMP2030,017836163,HW50010002/SW2.30
08:16:31:ST3_Shared:INFO:	Listo of operators:Olga B.; 
08:16:50:febtest:INFO:	FEB 8-2 selected
08:16:50:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
08:16:51:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:16:51:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
08:16:51:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:17:21:ST3_ModuleSelector:INFO:	L4UL401032 M4UL4B1010321A2 42 C

08:17:21:ST3_ModuleSelector:INFO:	17132

08:17:22:febtest:INFO:	Testing FEB with SN 1044
08:17:23:smx_tester:INFO:	Scanning setup
08:17:23:elinks:INFO:	Disabling clock on downlink 0
08:17:23:elinks:INFO:	Disabling clock on downlink 1
08:17:23:elinks:INFO:	Disabling clock on downlink 2
08:17:23:elinks:INFO:	Disabling clock on downlink 3
08:17:23:elinks:INFO:	Disabling clock on downlink 4
08:17:23:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:17:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
08:17:23:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:17:23:elinks:INFO:	Disabling clock on downlink 0
08:17:23:elinks:INFO:	Disabling clock on downlink 1
08:17:23:elinks:INFO:	Disabling clock on downlink 2
08:17:23:elinks:INFO:	Disabling clock on downlink 3
08:17:23:elinks:INFO:	Disabling clock on downlink 4
08:17:23:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:17:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:17:23:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
08:17:23:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
08:17:23:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
08:17:23:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
08:17:23:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
08:17:23:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
08:17:23:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
08:17:23:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
08:17:23:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
08:17:23:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
08:17:23:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
08:17:23:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
08:17:23:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
08:17:23:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
08:17:23:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
08:17:23:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
08:17:23:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:17:23:elinks:INFO:	Disabling clock on downlink 0
08:17:23:elinks:INFO:	Disabling clock on downlink 1
08:17:23:elinks:INFO:	Disabling clock on downlink 2
08:17:23:elinks:INFO:	Disabling clock on downlink 3
08:17:23:elinks:INFO:	Disabling clock on downlink 4
08:17:23:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:17:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:17:24:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:17:24:elinks:INFO:	Disabling clock on downlink 0
08:17:24:elinks:INFO:	Disabling clock on downlink 1
08:17:24:elinks:INFO:	Disabling clock on downlink 2
08:17:24:elinks:INFO:	Disabling clock on downlink 3
08:17:24:elinks:INFO:	Disabling clock on downlink 4
08:17:24:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:17:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
08:17:24:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:17:24:elinks:INFO:	Disabling clock on downlink 0
08:17:24:elinks:INFO:	Disabling clock on downlink 1
08:17:24:elinks:INFO:	Disabling clock on downlink 2
08:17:24:elinks:INFO:	Disabling clock on downlink 3
08:17:24:elinks:INFO:	Disabling clock on downlink 4
08:17:24:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:17:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
08:17:24:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:17:24:setup_element:INFO:	Scanning clock phase
08:17:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:17:24:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:17:24:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
08:17:24:setup_element:INFO:	Eye window for uplink 0 : __________________________________________________________________________XXXXXX
Clock Delay: 36
08:17:24:setup_element:INFO:	Eye window for uplink 1 : __________________________________________________________________________XXXXXX
Clock Delay: 36
08:17:24:setup_element:INFO:	Eye window for uplink 2 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
08:17:24:setup_element:INFO:	Eye window for uplink 3 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
08:17:24:setup_element:INFO:	Eye window for uplink 4 : ________________________________________________________________________________
Clock Delay: 40
08:17:24:setup_element:INFO:	Eye window for uplink 5 : ________________________________________________________________________________
Clock Delay: 40
08:17:24:setup_element:INFO:	Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:17:24:setup_element:INFO:	Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:17:24:setup_element:INFO:	Eye window for uplink 8 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:17:24:setup_element:INFO:	Eye window for uplink 9 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:17:24:setup_element:INFO:	Eye window for uplink 10: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:17:24:setup_element:INFO:	Eye window for uplink 11: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:17:24:setup_element:INFO:	Eye window for uplink 12: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:17:24:setup_element:INFO:	Eye window for uplink 13: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:17:25:setup_element:INFO:	Eye window for uplink 14: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:17:25:setup_element:INFO:	Eye window for uplink 15: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:17:25:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 1
08:17:25:setup_element:INFO:	Scanning data phases
08:17:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:17:25:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:17:30:setup_element:INFO:	Data phase scan results for group 0, downlink 1
08:17:30:setup_element:INFO:	Eye window for uplink 0 : _______________XXXXXX___________________
Data delay found: 37
08:17:30:setup_element:INFO:	Eye window for uplink 1 : __________XXXXXX________________________
Data delay found: 32
08:17:30:setup_element:INFO:	Eye window for uplink 2 : ____________XXXXX_______________________
Data delay found: 34
08:17:30:setup_element:INFO:	Eye window for uplink 3 : _________XXXXX__________________________
Data delay found: 31
08:17:30:setup_element:INFO:	Eye window for uplink 4 : _______XXXXX____________________________
Data delay found: 29
08:17:30:setup_element:INFO:	Eye window for uplink 5 : ___XXXX_________________________________
Data delay found: 24
08:17:30:setup_element:INFO:	Eye window for uplink 6 : XXX____________________________________X
Data delay found: 20
08:17:30:setup_element:INFO:	Eye window for uplink 7 : X_________________________________XXXXX_
Data delay found: 17
08:17:30:setup_element:INFO:	Eye window for uplink 8 : ___________________________XXXXX________
Data delay found: 9
08:17:30:setup_element:INFO:	Eye window for uplink 9 : ________________________________XXXXX___
Data delay found: 14
08:17:30:setup_element:INFO:	Eye window for uplink 10: ______________________________XXXXX_____
Data delay found: 12
08:17:30:setup_element:INFO:	Eye window for uplink 11: __________________________________XXXX__
Data delay found: 15
08:17:30:setup_element:INFO:	Eye window for uplink 12: _________________________________XXXXX__
Data delay found: 15
08:17:30:setup_element:INFO:	Eye window for uplink 13: XX__________________________________XXXX
Data delay found: 18
08:17:30:setup_element:INFO:	Eye window for uplink 14: _____________________________XXXX_______
Data delay found: 10
08:17:30:setup_element:INFO:	Eye window for uplink 15: ______________________________XXXXX_____
Data delay found: 12
08:17:30:setup_element:INFO:	Setting the data phase to 37 for uplink 0
08:17:30:setup_element:INFO:	Setting the data phase to 32 for uplink 1
08:17:30:setup_element:INFO:	Setting the data phase to 34 for uplink 2
08:17:30:setup_element:INFO:	Setting the data phase to 31 for uplink 3
08:17:30:setup_element:INFO:	Setting the data phase to 29 for uplink 4
08:17:30:setup_element:INFO:	Setting the data phase to 24 for uplink 5
08:17:30:setup_element:INFO:	Setting the data phase to 20 for uplink 6
08:17:30:setup_element:INFO:	Setting the data phase to 17 for uplink 7
08:17:30:setup_element:INFO:	Setting the data phase to 9 for uplink 8
08:17:30:setup_element:INFO:	Setting the data phase to 14 for uplink 9
08:17:30:setup_element:INFO:	Setting the data phase to 12 for uplink 10
08:17:30:setup_element:INFO:	Setting the data phase to 15 for uplink 11
08:17:30:setup_element:INFO:	Setting the data phase to 15 for uplink 12
08:17:30:setup_element:INFO:	Setting the data phase to 18 for uplink 13
08:17:30:setup_element:INFO:	Setting the data phase to 10 for uplink 14
08:17:30:setup_element:INFO:	Setting the data phase to 12 for uplink 15
08:17:30:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 70
    Eye Windows:
      Uplink  0: __________________________________________________________________________XXXXXX
      Uplink  1: __________________________________________________________________________XXXXXX
      Uplink  2: _________________________________________________________________________XXXXXXX
      Uplink  3: _________________________________________________________________________XXXXXXX
      Uplink  4: ________________________________________________________________________________
      Uplink  5: ________________________________________________________________________________
      Uplink  6: _______________________________________________________________________XXXXXXX__
      Uplink  7: _______________________________________________________________________XXXXXXX__
      Uplink  8: ______________________________________________________________________XXXXXXXXX_
      Uplink  9: ______________________________________________________________________XXXXXXXXX_
      Uplink 10: _______________________________________________________________________XXXXXXXX_
      Uplink 11: _______________________________________________________________________XXXXXXXX_
      Uplink 12: ________________________________________________________________________XXXXXXXX
      Uplink 13: ________________________________________________________________________XXXXXXXX
      Uplink 14: _______________________________________________________________________XXXXXXX__
      Uplink 15: _______________________________________________________________________XXXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 1:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
    Uplink 2:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 3:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 4:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 5:
      Optimal Phase: 24
      Window Length: 36
      Eye Window: ___XXXX_________________________________
    Uplink 6:
      Optimal Phase: 20
      Window Length: 36
      Eye Window: XXX____________________________________X
    Uplink 7:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXX_
    Uplink 8:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 9:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 10:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 11:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 12:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 13:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 14:
      Optimal Phase: 10
      Window Length: 36
      Eye Window: _____________________________XXXX_______
    Uplink 15:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
]
08:17:30:setup_element:INFO:	Beginning SMX ASICs map scan
08:17:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:17:30:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:17:30:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
08:17:30:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
08:17:30:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:17:30:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:17:30:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:17:30:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:17:31:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:17:31:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:17:31:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:17:31:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:17:31:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:17:31:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:17:31:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:17:31:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:17:31:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:17:31:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:17:31:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:17:32:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:17:32:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:17:33:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 70
    Eye Windows:
      Uplink  0: __________________________________________________________________________XXXXXX
      Uplink  1: __________________________________________________________________________XXXXXX
      Uplink  2: _________________________________________________________________________XXXXXXX
      Uplink  3: _________________________________________________________________________XXXXXXX
      Uplink  4: ________________________________________________________________________________
      Uplink  5: ________________________________________________________________________________
      Uplink  6: _______________________________________________________________________XXXXXXX__
      Uplink  7: _______________________________________________________________________XXXXXXX__
      Uplink  8: ______________________________________________________________________XXXXXXXXX_
      Uplink  9: ______________________________________________________________________XXXXXXXXX_
      Uplink 10: _______________________________________________________________________XXXXXXXX_
      Uplink 11: _______________________________________________________________________XXXXXXXX_
      Uplink 12: ________________________________________________________________________XXXXXXXX
      Uplink 13: ________________________________________________________________________XXXXXXXX
      Uplink 14: _______________________________________________________________________XXXXXXX__
      Uplink 15: _______________________________________________________________________XXXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 1:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
    Uplink 2:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 3:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 4:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 5:
      Optimal Phase: 24
      Window Length: 36
      Eye Window: ___XXXX_________________________________
    Uplink 6:
      Optimal Phase: 20
      Window Length: 36
      Eye Window: XXX____________________________________X
    Uplink 7:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXX_
    Uplink 8:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 9:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 10:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 11:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 12:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 13:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 14:
      Optimal Phase: 10
      Window Length: 36
      Eye Window: _____________________________XXXX_______
    Uplink 15:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____

08:17:33:setup_element:INFO:	Performing Elink synchronization
08:17:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:17:33:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:17:33:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
08:17:33:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
08:17:33:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
08:17:33:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:17:33:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   2  |   [0]   |  1  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   6  |   [0]   |  1  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
08:17:34:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
08:17:35:febtest:INFO:	1-0 | XA-000-08-002-000-005-187-06 |  -0.1 | 1277.1
08:17:35:febtest:INFO:	8-1 | XA-000-08-002-000-005-186-06 |  18.7 | 1218.6
08:17:35:febtest:INFO:	3-2 | XA-000-08-002-000-005-194-10 |  18.7 | 1212.7
08:17:35:febtest:INFO:	10-3 | XA-000-08-002-000-005-190-06 |  21.9 | 1206.9
08:17:35:febtest:INFO:	5-4 | XA-000-08-002-000-006-004-11 |  25.1 | 1201.0
08:17:36:febtest:INFO:	12-5 | XA-000-08-002-000-005-193-10 |  37.7 | 1153.7
08:17:36:febtest:INFO:	7-6 | XA-000-08-002-000-005-254-03 |  21.9 | 1201.0
08:17:36:febtest:INFO:	14-7 | XA-000-08-002-000-005-255-03 |  18.7 | 1218.6
08:17:36:ST3_smx:INFO:	Configuring SMX FAST
08:17:38:ST3_smx:INFO:	chip: 1-0 	 6.141382 C 	 1259.567515 mV
08:17:38:ST3_smx:INFO:		Electrons
08:17:38:ST3_smx:INFO:	# loops 0
08:17:40:ST3_smx:INFO:	# loops 1
08:17:42:ST3_smx:INFO:	# loops 2
08:17:43:ST3_smx:INFO:	# loops 3
08:17:45:ST3_smx:INFO:	# loops 4
08:17:47:ST3_smx:INFO:	Total # of broken channels: 1
08:17:47:ST3_smx:INFO:	List of broken channels: [6]
08:17:47:ST3_smx:INFO:	Total # of broken channels: 3
08:17:47:ST3_smx:INFO:	List of broken channels: [6, 41, 125]
08:17:47:ST3_smx:INFO:	Configuring SMX FAST
08:17:50:ST3_smx:INFO:	chip: 8-1 	 21.902970 C 	 1206.851500 mV
08:17:50:ST3_smx:INFO:		Electrons
08:17:50:ST3_smx:INFO:	# loops 0
08:17:51:ST3_smx:INFO:	# loops 1
08:17:53:ST3_smx:INFO:	# loops 2
08:17:55:ST3_smx:INFO:	# loops 3
08:17:56:ST3_smx:INFO:	# loops 4
08:17:58:ST3_smx:INFO:	Total # of broken channels: 1
08:17:58:ST3_smx:INFO:	List of broken channels: [43]
08:17:58:ST3_smx:INFO:	Total # of broken channels: 1
08:17:58:ST3_smx:INFO:	List of broken channels: [43]
08:17:58:ST3_smx:INFO:	Configuring SMX FAST
08:18:00:ST3_smx:INFO:	chip: 3-2 	 21.902970 C 	 1206.851500 mV
08:18:00:ST3_smx:INFO:		Electrons
08:18:00:ST3_smx:INFO:	# loops 0
08:18:02:ST3_smx:INFO:	# loops 1
08:18:03:ST3_smx:INFO:	# loops 2
08:18:05:ST3_smx:INFO:	# loops 3
08:18:07:ST3_smx:INFO:	# loops 4
08:18:08:ST3_smx:INFO:	Total # of broken channels: 0
08:18:08:ST3_smx:INFO:	List of broken channels: []
08:18:08:ST3_smx:INFO:	Total # of broken channels: 0
08:18:08:ST3_smx:INFO:	List of broken channels: []
08:18:08:ST3_smx:INFO:	Configuring SMX FAST
08:18:10:ST3_smx:INFO:	chip: 10-3 	 21.902970 C 	 1212.728715 mV
08:18:10:ST3_smx:INFO:		Electrons
08:18:10:ST3_smx:INFO:	# loops 0
08:18:12:ST3_smx:INFO:	# loops 1
08:18:14:ST3_smx:INFO:	# loops 2
08:18:15:ST3_smx:INFO:	# loops 3
08:18:17:ST3_smx:INFO:	# loops 4
08:18:18:ST3_smx:INFO:	Total # of broken channels: 0
08:18:18:ST3_smx:INFO:	List of broken channels: []
08:18:18:ST3_smx:INFO:	Total # of broken channels: 0
08:18:18:ST3_smx:INFO:	List of broken channels: []
08:18:19:ST3_smx:INFO:	Configuring SMX FAST
08:18:21:ST3_smx:INFO:	chip: 5-4 	 28.225000 C 	 1195.082160 mV
08:18:21:ST3_smx:INFO:		Electrons
08:18:21:ST3_smx:INFO:	# loops 0
08:18:23:ST3_smx:INFO:	# loops 1
08:18:24:ST3_smx:INFO:	# loops 2
08:18:26:ST3_smx:INFO:	# loops 3
08:18:27:ST3_smx:INFO:	# loops 4
08:18:29:ST3_smx:INFO:	Total # of broken channels: 0
08:18:29:ST3_smx:INFO:	List of broken channels: []
08:18:29:ST3_smx:INFO:	Total # of broken channels: 4
08:18:29:ST3_smx:INFO:	List of broken channels: [76, 90, 110, 120]
08:18:29:ST3_smx:INFO:	Configuring SMX FAST
08:18:31:ST3_smx:INFO:	chip: 12-5 	 34.556970 C 	 1171.483840 mV
08:18:31:ST3_smx:INFO:		Electrons
08:18:31:ST3_smx:INFO:	# loops 0
08:18:33:ST3_smx:INFO:	# loops 1
08:18:34:ST3_smx:INFO:	# loops 2
08:18:36:ST3_smx:INFO:	# loops 3
08:18:38:ST3_smx:INFO:	# loops 4
08:18:39:ST3_smx:INFO:	Total # of broken channels: 0
08:18:39:ST3_smx:INFO:	List of broken channels: []
08:18:39:ST3_smx:INFO:	Total # of broken channels: 0
08:18:39:ST3_smx:INFO:	List of broken channels: []
08:18:39:ST3_smx:INFO:	Configuring SMX FAST
08:18:41:ST3_smx:INFO:	chip: 7-6 	 18.745682 C 	 1230.330540 mV
08:18:41:ST3_smx:INFO:		Electrons
08:18:41:ST3_smx:INFO:	# loops 0
08:18:43:ST3_smx:INFO:	# loops 1
08:18:45:ST3_smx:INFO:	# loops 2
08:18:46:ST3_smx:INFO:	# loops 3
08:18:48:ST3_smx:INFO:	# loops 4
08:18:49:ST3_smx:INFO:	Total # of broken channels: 0
08:18:49:ST3_smx:INFO:	List of broken channels: []
08:18:49:ST3_smx:INFO:	Total # of broken channels: 0
08:18:49:ST3_smx:INFO:	List of broken channels: []
08:18:50:ST3_smx:INFO:	Configuring SMX FAST
08:18:52:ST3_smx:INFO:	chip: 14-7 	 28.225000 C 	 1195.082160 mV
08:18:52:ST3_smx:INFO:		Electrons
08:18:52:ST3_smx:INFO:	# loops 0
08:18:53:ST3_smx:INFO:	# loops 1
08:18:55:ST3_smx:INFO:	# loops 2
08:18:57:ST3_smx:INFO:	# loops 3
08:18:58:ST3_smx:INFO:	# loops 4
08:19:00:ST3_smx:INFO:	Total # of broken channels: 0
08:19:00:ST3_smx:INFO:	List of broken channels: []
08:19:00:ST3_smx:INFO:	Total # of broken channels: 0
08:19:00:ST3_smx:INFO:	List of broken channels: []
08:19:00:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
08:19:01:febtest:INFO:	1-0 | XA-000-08-002-000-005-187-06 |   9.3 | 1259.6
08:19:01:febtest:INFO:	8-1 | XA-000-08-002-000-005-186-06 |  25.1 | 1206.9
08:19:01:febtest:INFO:	3-2 | XA-000-08-002-000-005-194-10 |  25.1 | 1206.9
08:19:01:febtest:INFO:	10-3 | XA-000-08-002-000-005-190-06 |  21.9 | 1212.7
08:19:02:febtest:INFO:	5-4 | XA-000-08-002-000-006-004-11 |  28.2 | 1201.0
08:19:02:febtest:INFO:	12-5 | XA-000-08-002-000-005-193-10 |  34.6 | 1171.5
08:19:02:febtest:INFO:	7-6 | XA-000-08-002-000-005-254-03 |  18.7 | 1230.3
08:19:02:febtest:INFO:	14-7 | XA-000-08-002-000-005-255-03 |  28.2 | 1195.1
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_01_19-08_16_51
OPERATOR  : Olga B.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L4UL401032 M4UL4B1010321A2 42 C

FEB_SN : 1044
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	17132

MODULE_NAME:	L4UL401032 M4UL4B1010321A2 42 C

MODULE_TYPE:	
MODULE_LADDER:	L4UL401032
MODULE_MODULE:	M4UL4B1010321A2
MODULE_SIZE:	42
MODULE_GRADE:	C
---------------------------------------
VI_before_Init : ['2.450', '1.8310', '1.851', '0.4436', '7.000', '1.5580', '7.000', '1.5580']
VI_after__Init : ['2.450', '1.9760', '1.850', '0.5616', '7.000', '1.5610', '7.000', '1.5610']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
08:19:05:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:19:05:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
08:19:05:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:19:07:ST3_ModuleSelector:INFO:	L4UL401032 M4UL4B1010321A2 42 C

08:19:07:ST3_ModuleSelector:INFO:	17132

08:19:07:febtest:INFO:	Testing FEB with SN 1044
08:19:08:smx_tester:INFO:	Scanning setup
08:19:08:elinks:INFO:	Disabling clock on downlink 0
08:19:08:elinks:INFO:	Disabling clock on downlink 1
08:19:08:elinks:INFO:	Disabling clock on downlink 2
08:19:08:elinks:INFO:	Disabling clock on downlink 3
08:19:08:elinks:INFO:	Disabling clock on downlink 4
08:19:08:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:19:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
08:19:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:19:09:elinks:INFO:	Disabling clock on downlink 0
08:19:09:elinks:INFO:	Disabling clock on downlink 1
08:19:09:elinks:INFO:	Disabling clock on downlink 2
08:19:09:elinks:INFO:	Disabling clock on downlink 3
08:19:09:elinks:INFO:	Disabling clock on downlink 4
08:19:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:19:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
08:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
08:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
08:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
08:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
08:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
08:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
08:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
08:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
08:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
08:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
08:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
08:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
08:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
08:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
08:19:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
08:19:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:19:09:elinks:INFO:	Disabling clock on downlink 0
08:19:09:elinks:INFO:	Disabling clock on downlink 1
08:19:09:elinks:INFO:	Disabling clock on downlink 2
08:19:09:elinks:INFO:	Disabling clock on downlink 3
08:19:09:elinks:INFO:	Disabling clock on downlink 4
08:19:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:19:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:19:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:19:09:elinks:INFO:	Disabling clock on downlink 0
08:19:09:elinks:INFO:	Disabling clock on downlink 1
08:19:09:elinks:INFO:	Disabling clock on downlink 2
08:19:09:elinks:INFO:	Disabling clock on downlink 3
08:19:09:elinks:INFO:	Disabling clock on downlink 4
08:19:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:19:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
08:19:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:19:09:elinks:INFO:	Disabling clock on downlink 0
08:19:09:elinks:INFO:	Disabling clock on downlink 1
08:19:09:elinks:INFO:	Disabling clock on downlink 2
08:19:09:elinks:INFO:	Disabling clock on downlink 3
08:19:09:elinks:INFO:	Disabling clock on downlink 4
08:19:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:19:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
08:19:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:19:09:setup_element:INFO:	Scanning clock phase
08:19:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:19:09:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:19:10:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
08:19:10:setup_element:INFO:	Eye window for uplink 0 : __________________________________________________________________________XXXXXX
Clock Delay: 36
08:19:10:setup_element:INFO:	Eye window for uplink 1 : __________________________________________________________________________XXXXXX
Clock Delay: 36
08:19:10:setup_element:INFO:	Eye window for uplink 2 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
08:19:10:setup_element:INFO:	Eye window for uplink 3 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
08:19:10:setup_element:INFO:	Eye window for uplink 4 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:19:10:setup_element:INFO:	Eye window for uplink 5 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:19:10:setup_element:INFO:	Eye window for uplink 6 : ________________________________________________________________________________
Clock Delay: 40
08:19:10:setup_element:INFO:	Eye window for uplink 7 : ________________________________________________________________________________
Clock Delay: 40
08:19:10:setup_element:INFO:	Eye window for uplink 8 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:19:10:setup_element:INFO:	Eye window for uplink 9 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:19:10:setup_element:INFO:	Eye window for uplink 10: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:19:10:setup_element:INFO:	Eye window for uplink 11: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:19:10:setup_element:INFO:	Eye window for uplink 12: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:19:10:setup_element:INFO:	Eye window for uplink 13: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:19:10:setup_element:INFO:	Eye window for uplink 14: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:19:10:setup_element:INFO:	Eye window for uplink 15: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:19:10:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 1
08:19:10:setup_element:INFO:	Scanning data phases
08:19:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:19:10:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:19:15:setup_element:INFO:	Data phase scan results for group 0, downlink 1
08:19:15:setup_element:INFO:	Eye window for uplink 0 : ______________XXXXXX____________________
Data delay found: 36
08:19:15:setup_element:INFO:	Eye window for uplink 1 : __________XXXXX_________________________
Data delay found: 32
08:19:15:setup_element:INFO:	Eye window for uplink 2 : ___________XXXXX________________________
Data delay found: 33
08:19:15:setup_element:INFO:	Eye window for uplink 3 : ________XXXXXX__________________________
Data delay found: 30
08:19:15:setup_element:INFO:	Eye window for uplink 4 : ______XXXXX_____________________________
Data delay found: 28
08:19:15:setup_element:INFO:	Eye window for uplink 5 : __XXXXX_________________________________
Data delay found: 24
08:19:15:setup_element:INFO:	Eye window for uplink 6 : XXX___________________________________XX
Data delay found: 20
08:19:15:setup_element:INFO:	Eye window for uplink 7 : __________________________________XXXXX_
Data delay found: 16
08:19:15:setup_element:INFO:	Eye window for uplink 8 : ___________________________XXXX_________
Data delay found: 8
08:19:15:setup_element:INFO:	Eye window for uplink 9 : _______________________________XXXXXX___
Data delay found: 13
08:19:15:setup_element:INFO:	Eye window for uplink 10: ______________________________XXXX______
Data delay found: 11
08:19:15:setup_element:INFO:	Eye window for uplink 11: __________________________________XXXX__
Data delay found: 15
08:19:15:setup_element:INFO:	Eye window for uplink 12: ________________________________XXXXX___
Data delay found: 14
08:19:15:setup_element:INFO:	Eye window for uplink 13: X__________________________________XXXXX
Data delay found: 17
08:19:15:setup_element:INFO:	Eye window for uplink 14: ____________________________XXXX________
Data delay found: 9
08:19:15:setup_element:INFO:	Eye window for uplink 15: ______________________________XXXX______
Data delay found: 11
08:19:15:setup_element:INFO:	Setting the data phase to 36 for uplink 0
08:19:15:setup_element:INFO:	Setting the data phase to 32 for uplink 1
08:19:15:setup_element:INFO:	Setting the data phase to 33 for uplink 2
08:19:15:setup_element:INFO:	Setting the data phase to 30 for uplink 3
08:19:15:setup_element:INFO:	Setting the data phase to 28 for uplink 4
08:19:15:setup_element:INFO:	Setting the data phase to 24 for uplink 5
08:19:15:setup_element:INFO:	Setting the data phase to 20 for uplink 6
08:19:15:setup_element:INFO:	Setting the data phase to 16 for uplink 7
08:19:15:setup_element:INFO:	Setting the data phase to 8 for uplink 8
08:19:15:setup_element:INFO:	Setting the data phase to 13 for uplink 9
08:19:15:setup_element:INFO:	Setting the data phase to 11 for uplink 10
08:19:15:setup_element:INFO:	Setting the data phase to 15 for uplink 11
08:19:15:setup_element:INFO:	Setting the data phase to 14 for uplink 12
08:19:15:setup_element:INFO:	Setting the data phase to 17 for uplink 13
08:19:15:setup_element:INFO:	Setting the data phase to 9 for uplink 14
08:19:15:setup_element:INFO:	Setting the data phase to 11 for uplink 15
08:19:15:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 70
    Eye Windows:
      Uplink  0: __________________________________________________________________________XXXXXX
      Uplink  1: __________________________________________________________________________XXXXXX
      Uplink  2: _________________________________________________________________________XXXXXXX
      Uplink  3: _________________________________________________________________________XXXXXXX
      Uplink  4: _______________________________________________________________________XXXXXXXX_
      Uplink  5: _______________________________________________________________________XXXXXXXX_
      Uplink  6: ________________________________________________________________________________
      Uplink  7: ________________________________________________________________________________
      Uplink  8: ______________________________________________________________________XXXXXXXXX_
      Uplink  9: ______________________________________________________________________XXXXXXXXX_
      Uplink 10: _______________________________________________________________________XXXXXXXX_
      Uplink 11: _______________________________________________________________________XXXXXXXX_
      Uplink 12: ________________________________________________________________________XXXXXXXX
      Uplink 13: ________________________________________________________________________XXXXXXXX
      Uplink 14: _______________________________________________________________________XXXXXXX__
      Uplink 15: _______________________________________________________________________XXXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 36
      Window Length: 34
      Eye Window: ______________XXXXXX____________________
    Uplink 1:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 2:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 3:
      Optimal Phase: 30
      Window Length: 34
      Eye Window: ________XXXXXX__________________________
    Uplink 4:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 5:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 6:
      Optimal Phase: 20
      Window Length: 35
      Eye Window: XXX___________________________________XX
    Uplink 7:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 8:
      Optimal Phase: 8
      Window Length: 36
      Eye Window: ___________________________XXXX_________
    Uplink 9:
      Optimal Phase: 13
      Window Length: 34
      Eye Window: _______________________________XXXXXX___
    Uplink 10:
      Optimal Phase: 11
      Window Length: 36
      Eye Window: ______________________________XXXX______
    Uplink 11:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 12:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 13:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 14:
      Optimal Phase: 9
      Window Length: 36
      Eye Window: ____________________________XXXX________
    Uplink 15:
      Optimal Phase: 11
      Window Length: 36
      Eye Window: ______________________________XXXX______
]
08:19:15:setup_element:INFO:	Beginning SMX ASICs map scan
08:19:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:19:15:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:19:15:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
08:19:15:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
08:19:15:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:19:15:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:19:15:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:19:16:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:19:16:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:19:16:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:19:16:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:19:16:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:19:16:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:19:16:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:19:16:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:19:16:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:19:16:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:19:17:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:19:17:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:19:17:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:19:17:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:19:18:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 70
    Eye Windows:
      Uplink  0: __________________________________________________________________________XXXXXX
      Uplink  1: __________________________________________________________________________XXXXXX
      Uplink  2: _________________________________________________________________________XXXXXXX
      Uplink  3: _________________________________________________________________________XXXXXXX
      Uplink  4: _______________________________________________________________________XXXXXXXX_
      Uplink  5: _______________________________________________________________________XXXXXXXX_
      Uplink  6: ________________________________________________________________________________
      Uplink  7: ________________________________________________________________________________
      Uplink  8: ______________________________________________________________________XXXXXXXXX_
      Uplink  9: ______________________________________________________________________XXXXXXXXX_
      Uplink 10: _______________________________________________________________________XXXXXXXX_
      Uplink 11: _______________________________________________________________________XXXXXXXX_
      Uplink 12: ________________________________________________________________________XXXXXXXX
      Uplink 13: ________________________________________________________________________XXXXXXXX
      Uplink 14: _______________________________________________________________________XXXXXXX__
      Uplink 15: _______________________________________________________________________XXXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 36
      Window Length: 34
      Eye Window: ______________XXXXXX____________________
    Uplink 1:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 2:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 3:
      Optimal Phase: 30
      Window Length: 34
      Eye Window: ________XXXXXX__________________________
    Uplink 4:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 5:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 6:
      Optimal Phase: 20
      Window Length: 35
      Eye Window: XXX___________________________________XX
    Uplink 7:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 8:
      Optimal Phase: 8
      Window Length: 36
      Eye Window: ___________________________XXXX_________
    Uplink 9:
      Optimal Phase: 13
      Window Length: 34
      Eye Window: _______________________________XXXXXX___
    Uplink 10:
      Optimal Phase: 11
      Window Length: 36
      Eye Window: ______________________________XXXX______
    Uplink 11:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 12:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 13:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 14:
      Optimal Phase: 9
      Window Length: 36
      Eye Window: ____________________________XXXX________
    Uplink 15:
      Optimal Phase: 11
      Window Length: 36
      Eye Window: ______________________________XXXX______

08:19:18:setup_element:INFO:	Performing Elink synchronization
08:19:18:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:19:18:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:19:18:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
08:19:18:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
08:19:18:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
08:19:18:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:19:18:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   2  |   [0]   |  1  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   6  |   [0]   |  1  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_0__upli_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_8 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_1__upli_8
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2_3 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_2__upli_3
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_10 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_3__upli_10
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_4__upli_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_12 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_5__upli_12
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_6__upli_7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_14 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_7__upli_14
08:19:19:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
08:19:20:febtest:INFO:	1-0 | XA-000-08-002-000-005-187-06 |  12.4 | 1253.7
08:19:20:febtest:INFO:	8-1 | XA-000-08-002-000-005-186-06 |  21.9 | 1212.7
08:19:20:febtest:INFO:	3-2 | XA-000-08-002-000-005-194-10 |  21.9 | 1218.6
08:19:20:febtest:INFO:	10-3 | XA-000-08-002-000-005-190-06 |  21.9 | 1212.7
08:19:21:febtest:INFO:	5-4 | XA-000-08-002-000-006-004-11 |  28.2 | 1206.9
08:19:21:febtest:INFO:	12-5 | XA-000-08-002-000-005-193-10 |  40.9 | 1153.7
08:19:21:febtest:INFO:	7-6 | XA-000-08-002-000-005-254-03 |  28.2 | 1201.0
08:19:21:febtest:INFO:	14-7 | XA-000-08-002-000-005-255-03 |  21.9 | 1212.7
08:19:22:ST3_smx:INFO:	Configuring SMX FAST
08:19:24:ST3_smx:INFO:	chip: 1-0 	 12.438562 C 	 1259.567515 mV
08:19:24:ST3_smx:INFO:		Electrons
08:19:24:ST3_smx:INFO:	# loops 0
08:19:26:ST3_smx:INFO:	# loops 1
08:19:27:ST3_smx:INFO:	# loops 2
08:19:29:ST3_smx:INFO:	# loops 3
08:19:30:ST3_smx:INFO:	# loops 4
08:19:32:ST3_smx:INFO:	Total # of broken channels: 1
08:19:32:ST3_smx:INFO:	List of broken channels: [6]
08:19:32:ST3_smx:INFO:	Total # of broken channels: 1
08:19:32:ST3_smx:INFO:	List of broken channels: [6]
08:19:32:ST3_smx:INFO:	Configuring SMX FAST
08:19:34:ST3_smx:INFO:	chip: 8-1 	 25.062742 C 	 1206.851500 mV
08:19:34:ST3_smx:INFO:		Electrons
08:19:34:ST3_smx:INFO:	# loops 0
08:19:36:ST3_smx:INFO:	# loops 1
08:19:38:ST3_smx:INFO:	# loops 2
08:19:39:ST3_smx:INFO:	# loops 3
08:19:41:ST3_smx:INFO:	# loops 4
08:19:42:ST3_smx:INFO:	Total # of broken channels: 0
08:19:42:ST3_smx:INFO:	List of broken channels: []
08:19:42:ST3_smx:INFO:	Total # of broken channels: 0
08:19:42:ST3_smx:INFO:	List of broken channels: []
08:19:43:ST3_smx:INFO:	Configuring SMX FAST
08:19:45:ST3_smx:INFO:	chip: 3-2 	 25.062742 C 	 1206.851500 mV
08:19:45:ST3_smx:INFO:		Electrons
08:19:45:ST3_smx:INFO:	# loops 0
08:19:46:ST3_smx:INFO:	# loops 1
08:19:48:ST3_smx:INFO:	# loops 2
08:19:50:ST3_smx:INFO:	# loops 3
08:19:51:ST3_smx:INFO:	# loops 4
08:19:53:ST3_smx:INFO:	Total # of broken channels: 0
08:19:53:ST3_smx:INFO:	List of broken channels: []
08:19:53:ST3_smx:INFO:	Total # of broken channels: 0
08:19:53:ST3_smx:INFO:	List of broken channels: []
08:19:53:ST3_smx:INFO:	Configuring SMX FAST
08:19:55:ST3_smx:INFO:	chip: 10-3 	 25.062742 C 	 1212.728715 mV
08:19:55:ST3_smx:INFO:		Electrons
08:19:55:ST3_smx:INFO:	# loops 0
08:19:57:ST3_smx:INFO:	# loops 1
08:19:58:ST3_smx:INFO:	# loops 2
08:20:00:ST3_smx:INFO:	# loops 3
08:20:02:ST3_smx:INFO:	# loops 4
08:20:03:ST3_smx:INFO:	Total # of broken channels: 0
08:20:03:ST3_smx:INFO:	List of broken channels: []
08:20:03:ST3_smx:INFO:	Total # of broken channels: 0
08:20:03:ST3_smx:INFO:	List of broken channels: []
08:20:04:ST3_smx:INFO:	Configuring SMX FAST
08:20:05:ST3_smx:INFO:	chip: 5-4 	 31.389742 C 	 1195.082160 mV
08:20:05:ST3_smx:INFO:		Electrons
08:20:05:ST3_smx:INFO:	# loops 0
08:20:07:ST3_smx:INFO:	# loops 1
08:20:09:ST3_smx:INFO:	# loops 2
08:20:11:ST3_smx:INFO:	# loops 3
08:20:12:ST3_smx:INFO:	# loops 4
08:20:14:ST3_smx:INFO:	Total # of broken channels: 3
08:20:14:ST3_smx:INFO:	List of broken channels: [76, 90, 110]
08:20:14:ST3_smx:INFO:	Total # of broken channels: 4
08:20:14:ST3_smx:INFO:	List of broken channels: [76, 90, 110, 120]
08:20:14:ST3_smx:INFO:	Configuring SMX FAST
08:20:16:ST3_smx:INFO:	chip: 12-5 	 34.556970 C 	 1171.483840 mV
08:20:16:ST3_smx:INFO:		Electrons
08:20:16:ST3_smx:INFO:	# loops 0
08:20:18:ST3_smx:INFO:	# loops 1
08:20:19:ST3_smx:INFO:	# loops 2
08:20:21:ST3_smx:INFO:	# loops 3
08:20:22:ST3_smx:INFO:	# loops 4
08:20:24:ST3_smx:INFO:	Total # of broken channels: 0
08:20:24:ST3_smx:INFO:	List of broken channels: []
08:20:24:ST3_smx:INFO:	Total # of broken channels: 0
08:20:24:ST3_smx:INFO:	List of broken channels: []
08:20:24:ST3_smx:INFO:	Configuring SMX FAST
08:20:26:ST3_smx:INFO:	chip: 7-6 	 21.902970 C 	 1230.330540 mV
08:20:26:ST3_smx:INFO:		Electrons
08:20:26:ST3_smx:INFO:	# loops 0
08:20:28:ST3_smx:INFO:	# loops 1
08:20:30:ST3_smx:INFO:	# loops 2
08:20:31:ST3_smx:INFO:	# loops 3
08:20:33:ST3_smx:INFO:	# loops 4
08:20:34:ST3_smx:INFO:	Total # of broken channels: 0
08:20:34:ST3_smx:INFO:	List of broken channels: []
08:20:34:ST3_smx:INFO:	Total # of broken channels: 0
08:20:34:ST3_smx:INFO:	List of broken channels: []
08:20:35:ST3_smx:INFO:	Configuring SMX FAST
08:20:37:ST3_smx:INFO:	chip: 14-7 	 31.389742 C 	 1195.082160 mV
08:20:37:ST3_smx:INFO:		Electrons
08:20:37:ST3_smx:INFO:	# loops 0
08:20:38:ST3_smx:INFO:	# loops 1
08:20:40:ST3_smx:INFO:	# loops 2
08:20:42:ST3_smx:INFO:	# loops 3
08:20:43:ST3_smx:INFO:	# loops 4
08:20:45:ST3_smx:INFO:	Total # of broken channels: 0
08:20:45:ST3_smx:INFO:	List of broken channels: []
08:20:45:ST3_smx:INFO:	Total # of broken channels: 0
08:20:45:ST3_smx:INFO:	List of broken channels: []
08:20:45:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
08:20:46:febtest:INFO:	1-0 | XA-000-08-002-000-005-187-06 |  12.4 | 1253.7
08:20:46:febtest:INFO:	8-1 | XA-000-08-002-000-005-186-06 |  25.1 | 1206.9
08:20:46:febtest:INFO:	3-2 | XA-000-08-002-000-005-194-10 |  25.1 | 1206.9
08:20:46:febtest:INFO:	10-3 | XA-000-08-002-000-005-190-06 |  25.1 | 1212.7
08:20:47:febtest:INFO:	5-4 | XA-000-08-002-000-006-004-11 |  31.4 | 1201.0
08:20:47:febtest:INFO:	12-5 | XA-000-08-002-000-005-193-10 |  37.7 | 1171.5
08:20:47:febtest:INFO:	7-6 | XA-000-08-002-000-005-254-03 |  21.9 | 1230.3
08:20:47:febtest:INFO:	14-7 | XA-000-08-002-000-005-255-03 |  31.4 | 1195.1
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_01_19-08_19_05
OPERATOR  : Olga B.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L4UL401032 M4UL4B1010321A2 42 C

FEB_SN : 1044
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	17132

MODULE_NAME:	L4UL401032 M4UL4B1010321A2 42 C

MODULE_TYPE:	
MODULE_LADDER:	L4UL401032
MODULE_MODULE:	M4UL4B1010321A2
MODULE_SIZE:	42
MODULE_GRADE:	C
---------------------------------------
VI_before_Init : ['2.450', '1.8320', '1.851', '0.4814', '7.000', '1.5620', '7.000', '1.5620']
VI_after__Init : ['2.450', '1.9770', '1.850', '0.6204', '7.000', '1.5650', '7.000', '1.5650']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
08:20:50:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_1044/TestDate_2024_01_19-08_19_05/