13:48:55:ST3_hmp4040:INFO:	HAMEG,HMP2030,017836163,HW50010002/SW2.30
13:48:55:febtest:INFO:	FEB 8-2 selected
13:48:56:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
13:48:57:ST3_Shared:INFO:	Listo of operators:Oleksandr S.; 
13:49:00:febtest:INFO:	FEB 8-2 selected
13:49:00:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
13:50:37:febtest:INFO:	FEB 8-2 selected
13:50:37:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
13:50:40:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:50:40:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
13:50:40:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:50:41:febtest:INFO:	Testing FEB with SN 1044
13:50:42:smx_tester:INFO:	Scanning setup
13:50:42:elinks:INFO:	Disabling clock on downlink 0
13:50:42:elinks:INFO:	Disabling clock on downlink 1
13:50:42:elinks:INFO:	Disabling clock on downlink 2
13:50:42:elinks:INFO:	Disabling clock on downlink 3
13:50:42:elinks:INFO:	Disabling clock on downlink 4
13:50:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:50:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:50:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:50:42:elinks:INFO:	Disabling clock on downlink 0
13:50:42:elinks:INFO:	Disabling clock on downlink 1
13:50:42:elinks:INFO:	Disabling clock on downlink 2
13:50:42:elinks:INFO:	Disabling clock on downlink 3
13:50:42:elinks:INFO:	Disabling clock on downlink 4
13:50:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:50:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:50:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
13:50:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
13:50:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
13:50:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
13:50:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
13:50:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
13:50:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
13:50:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
13:50:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
13:50:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
13:50:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
13:50:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
13:50:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
13:50:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
13:50:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
13:50:42:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
13:50:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:50:42:elinks:INFO:	Disabling clock on downlink 0
13:50:42:elinks:INFO:	Disabling clock on downlink 1
13:50:42:elinks:INFO:	Disabling clock on downlink 2
13:50:42:elinks:INFO:	Disabling clock on downlink 3
13:50:42:elinks:INFO:	Disabling clock on downlink 4
13:50:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:50:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:50:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:50:42:elinks:INFO:	Disabling clock on downlink 0
13:50:42:elinks:INFO:	Disabling clock on downlink 1
13:50:42:elinks:INFO:	Disabling clock on downlink 2
13:50:42:elinks:INFO:	Disabling clock on downlink 3
13:50:42:elinks:INFO:	Disabling clock on downlink 4
13:50:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:50:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:50:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:50:42:elinks:INFO:	Disabling clock on downlink 0
13:50:42:elinks:INFO:	Disabling clock on downlink 1
13:50:43:elinks:INFO:	Disabling clock on downlink 2
13:50:43:elinks:INFO:	Disabling clock on downlink 3
13:50:43:elinks:INFO:	Disabling clock on downlink 4
13:50:43:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:50:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:50:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:50:43:setup_element:INFO:	Scanning clock phase
13:50:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:50:43:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:50:43:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
13:50:43:setup_element:INFO:	Eye window for uplink 0 : XX_________________________________________________________________________XXXXX
Clock Delay: 38
13:50:43:setup_element:INFO:	Eye window for uplink 1 : XX_________________________________________________________________________XXXXX
Clock Delay: 38
13:50:43:setup_element:INFO:	Eye window for uplink 2 : XX________________________________________________________________________XXXXXX
Clock Delay: 37
13:50:43:setup_element:INFO:	Eye window for uplink 3 : XX________________________________________________________________________XXXXXX
Clock Delay: 37
13:50:43:setup_element:INFO:	Eye window for uplink 4 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
13:50:43:setup_element:INFO:	Eye window for uplink 5 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
13:50:43:setup_element:INFO:	Eye window for uplink 6 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
13:50:43:setup_element:INFO:	Eye window for uplink 7 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
13:50:43:setup_element:INFO:	Eye window for uplink 8 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
13:50:43:setup_element:INFO:	Eye window for uplink 9 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
13:50:43:setup_element:INFO:	Eye window for uplink 10: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
13:50:43:setup_element:INFO:	Eye window for uplink 11: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
13:50:43:setup_element:INFO:	Eye window for uplink 12: XX________________________________________________________________________XXXXXX
Clock Delay: 37
13:50:43:setup_element:INFO:	Eye window for uplink 13: XX________________________________________________________________________XXXXXX
Clock Delay: 37
13:50:43:setup_element:INFO:	Eye window for uplink 14: _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:50:43:setup_element:INFO:	Eye window for uplink 15: _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:50:43:setup_element:INFO:	Setting the clock phase to 36 for group 0, downlink 1
13:50:43:setup_element:INFO:	Scanning data phases
13:50:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:50:43:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:50:49:setup_element:INFO:	Data phase scan results for group 0, downlink 1
13:50:49:setup_element:INFO:	Eye window for uplink 0 : ____________XXXXX_______________________
Data delay found: 34
13:50:49:setup_element:INFO:	Eye window for uplink 1 : ________XXXXXX__________________________
Data delay found: 30
13:50:49:setup_element:INFO:	Eye window for uplink 2 : _________XXXXX__________________________
Data delay found: 31
13:50:49:setup_element:INFO:	Eye window for uplink 3 : ______XXXXXX____________________________
Data delay found: 28
13:50:49:setup_element:INFO:	Eye window for uplink 4 : ____XXXXX_______________________________
Data delay found: 26
13:50:49:setup_element:INFO:	Eye window for uplink 5 : XXXXX__________________________________X
Data delay found: 21
13:50:49:setup_element:INFO:	Eye window for uplink 6 : X___________________________________XXXX
Data delay found: 18
13:50:49:setup_element:INFO:	Eye window for uplink 7 : _______________________________XXXXX____
Data delay found: 13
13:50:49:setup_element:INFO:	Eye window for uplink 8 : __________________________XXXX__________
Data delay found: 7
13:50:49:setup_element:INFO:	Eye window for uplink 9 : _____________________________XXXXXX_____
Data delay found: 11
13:50:49:setup_element:INFO:	Eye window for uplink 10: ____________________________XXXXX_______
Data delay found: 10
13:50:49:setup_element:INFO:	Eye window for uplink 11: ________________________________XXXX____
Data delay found: 13
13:50:49:setup_element:INFO:	Eye window for uplink 12: _______________________________XXXXX____
Data delay found: 13
13:50:49:setup_element:INFO:	Eye window for uplink 13: __________________________________XXXXXX
Data delay found: 16
13:50:49:setup_element:INFO:	Eye window for uplink 14: __________________________XXXX__________
Data delay found: 7
13:50:49:setup_element:INFO:	Eye window for uplink 15: ____________________________XXXXX_______
Data delay found: 10
13:50:49:setup_element:INFO:	Setting the data phase to 34 for uplink 0
13:50:49:setup_element:INFO:	Setting the data phase to 30 for uplink 1
13:50:49:setup_element:INFO:	Setting the data phase to 31 for uplink 2
13:50:49:setup_element:INFO:	Setting the data phase to 28 for uplink 3
13:50:49:setup_element:INFO:	Setting the data phase to 26 for uplink 4
13:50:49:setup_element:INFO:	Setting the data phase to 21 for uplink 5
13:50:49:setup_element:INFO:	Setting the data phase to 18 for uplink 6
13:50:49:setup_element:INFO:	Setting the data phase to 13 for uplink 7
13:50:49:setup_element:INFO:	Setting the data phase to 7 for uplink 8
13:50:49:setup_element:INFO:	Setting the data phase to 11 for uplink 9
13:50:49:setup_element:INFO:	Setting the data phase to 10 for uplink 10
13:50:49:setup_element:INFO:	Setting the data phase to 13 for uplink 11
13:50:49:setup_element:INFO:	Setting the data phase to 13 for uplink 12
13:50:49:setup_element:INFO:	Setting the data phase to 16 for uplink 13
13:50:49:setup_element:INFO:	Setting the data phase to 7 for uplink 14
13:50:49:setup_element:INFO:	Setting the data phase to 10 for uplink 15
13:50:49:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 36
    Window Length: 70
    Eye Windows:
      Uplink  0: XX_________________________________________________________________________XXXXX
      Uplink  1: XX_________________________________________________________________________XXXXX
      Uplink  2: XX________________________________________________________________________XXXXXX
      Uplink  3: XX________________________________________________________________________XXXXXX
      Uplink  4: ________________________________________________________________________XXXXXXXX
      Uplink  5: ________________________________________________________________________XXXXXXXX
      Uplink  6: _________________________________________________________________________XXXXXXX
      Uplink  7: _________________________________________________________________________XXXXXXX
      Uplink  8: ________________________________________________________________________XXXXXXXX
      Uplink  9: ________________________________________________________________________XXXXXXXX
      Uplink 10: ________________________________________________________________________XXXXXXXX
      Uplink 11: ________________________________________________________________________XXXXXXXX
      Uplink 12: XX________________________________________________________________________XXXXXX
      Uplink 13: XX________________________________________________________________________XXXXXX
      Uplink 14: _________________________________________________________________________XXXXXX_
      Uplink 15: _________________________________________________________________________XXXXXX_
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 1:
      Optimal Phase: 30
      Window Length: 34
      Eye Window: ________XXXXXX__________________________
    Uplink 2:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 3:
      Optimal Phase: 28
      Window Length: 34
      Eye Window: ______XXXXXX____________________________
    Uplink 4:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 5:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 6:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 7:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 8:
      Optimal Phase: 7
      Window Length: 36
      Eye Window: __________________________XXXX__________
    Uplink 9:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____
    Uplink 10:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 11:
      Optimal Phase: 13
      Window Length: 36
      Eye Window: ________________________________XXXX____
    Uplink 12:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 13:
      Optimal Phase: 16
      Window Length: 34
      Eye Window: __________________________________XXXXXX
    Uplink 14:
      Optimal Phase: 7
      Window Length: 36
      Eye Window: __________________________XXXX__________
    Uplink 15:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
]
13:50:49:setup_element:INFO:	Beginning SMX ASICs map scan
13:50:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:50:49:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:50:49:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:50:49:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
13:50:49:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:50:49:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:50:49:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:50:49:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:50:49:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:50:49:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:50:49:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:50:49:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:50:49:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:50:49:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:50:50:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:50:50:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:50:50:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:50:50:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:50:50:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:50:50:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:50:50:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:50:51:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 36
    Window Length: 70
    Eye Windows:
      Uplink  0: XX_________________________________________________________________________XXXXX
      Uplink  1: XX_________________________________________________________________________XXXXX
      Uplink  2: XX________________________________________________________________________XXXXXX
      Uplink  3: XX________________________________________________________________________XXXXXX
      Uplink  4: ________________________________________________________________________XXXXXXXX
      Uplink  5: ________________________________________________________________________XXXXXXXX
      Uplink  6: _________________________________________________________________________XXXXXXX
      Uplink  7: _________________________________________________________________________XXXXXXX
      Uplink  8: ________________________________________________________________________XXXXXXXX
      Uplink  9: ________________________________________________________________________XXXXXXXX
      Uplink 10: ________________________________________________________________________XXXXXXXX
      Uplink 11: ________________________________________________________________________XXXXXXXX
      Uplink 12: XX________________________________________________________________________XXXXXX
      Uplink 13: XX________________________________________________________________________XXXXXX
      Uplink 14: _________________________________________________________________________XXXXXX_
      Uplink 15: _________________________________________________________________________XXXXXX_
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 1:
      Optimal Phase: 30
      Window Length: 34
      Eye Window: ________XXXXXX__________________________
    Uplink 2:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 3:
      Optimal Phase: 28
      Window Length: 34
      Eye Window: ______XXXXXX____________________________
    Uplink 4:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 5:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 6:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 7:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 8:
      Optimal Phase: 7
      Window Length: 36
      Eye Window: __________________________XXXX__________
    Uplink 9:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____
    Uplink 10:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 11:
      Optimal Phase: 13
      Window Length: 36
      Eye Window: ________________________________XXXX____
    Uplink 12:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 13:
      Optimal Phase: 16
      Window Length: 34
      Eye Window: __________________________________XXXXXX
    Uplink 14:
      Optimal Phase: 7
      Window Length: 36
      Eye Window: __________________________XXXX__________
    Uplink 15:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______

13:50:51:setup_element:INFO:	Performing Elink synchronization
13:50:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:50:51:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:50:52:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:50:52:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
13:50:52:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
13:50:52:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:50:52:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   2  |   [0]   |  1  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   6  |   [0]   |  1  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
13:50:53:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
13:50:53:febtest:INFO:	1-0 | XA-000-08-002-000-005-187-06 |  18.7 | 1259.6
13:50:53:febtest:INFO:	8-1 | XA-000-08-002-000-005-186-06 |  31.4 | 1206.9
13:50:54:febtest:INFO:	3-2 | XA-000-08-002-000-005-194-10 |  28.2 | 1224.5
13:50:54:febtest:INFO:	10-3 | XA-000-08-002-000-005-190-06 |  31.4 | 1206.9
13:50:54:febtest:INFO:	5-4 | XA-000-08-002-000-006-004-11 |  37.7 | 1195.1
13:50:54:febtest:INFO:	12-5 | XA-000-08-002-000-005-193-10 |  47.3 | 1153.7
13:50:55:febtest:INFO:	7-6 | XA-000-08-002-000-005-254-03 |  37.7 | 1183.3
13:50:55:febtest:INFO:	14-7 | XA-000-08-002-000-005-255-03 |  31.4 | 1212.7
13:50:55:ST3_smx:INFO:	Configuring SMX FAST
13:50:57:ST3_smx:INFO:	chip: 1-0 	 21.902970 C 	 1253.730060 mV
13:50:57:ST3_smx:INFO:		Electrons
13:50:57:ST3_smx:INFO:	# loops 0
13:50:58:ST3_smx:INFO:	# loops 1
13:51:00:ST3_smx:INFO:	# loops 2
13:51:02:ST3_smx:INFO:	# loops 3
13:51:03:ST3_smx:INFO:	# loops 4
13:51:05:ST3_smx:INFO:	Total # of broken channels: 0
13:51:05:ST3_smx:INFO:	List of broken channels: []
13:51:05:ST3_smx:INFO:	Total # of broken channels: 0
13:51:05:ST3_smx:INFO:	List of broken channels: []
13:51:05:ST3_smx:INFO:	Configuring SMX FAST
13:51:07:ST3_smx:INFO:	chip: 8-1 	 34.556970 C 	 1200.969315 mV
13:51:07:ST3_smx:INFO:		Electrons
13:51:07:ST3_smx:INFO:	# loops 0
13:51:09:ST3_smx:INFO:	# loops 1
13:51:11:ST3_smx:INFO:	# loops 2
13:51:12:ST3_smx:INFO:	# loops 3
13:51:14:ST3_smx:INFO:	# loops 4
13:51:15:ST3_smx:INFO:	Total # of broken channels: 0
13:51:15:ST3_smx:INFO:	List of broken channels: []
13:51:15:ST3_smx:INFO:	Total # of broken channels: 0
13:51:15:ST3_smx:INFO:	List of broken channels: []
13:51:16:ST3_smx:INFO:	Configuring SMX FAST
13:51:18:ST3_smx:INFO:	chip: 3-2 	 34.556970 C 	 1200.969315 mV
13:51:18:ST3_smx:INFO:		Electrons
13:51:18:ST3_smx:INFO:	# loops 0
13:51:19:ST3_smx:INFO:	# loops 1
13:51:21:ST3_smx:INFO:	# loops 2
13:51:23:ST3_smx:INFO:	# loops 3
13:51:24:ST3_smx:INFO:	# loops 4
13:51:26:ST3_smx:INFO:	Total # of broken channels: 0
13:51:26:ST3_smx:INFO:	List of broken channels: []
13:51:26:ST3_smx:INFO:	Total # of broken channels: 0
13:51:26:ST3_smx:INFO:	List of broken channels: []
13:51:26:ST3_smx:INFO:	Configuring SMX FAST
13:51:28:ST3_smx:INFO:	chip: 10-3 	 31.389742 C 	 1206.851500 mV
13:51:28:ST3_smx:INFO:		Electrons
13:51:28:ST3_smx:INFO:	# loops 0
13:51:30:ST3_smx:INFO:	# loops 1
13:51:31:ST3_smx:INFO:	# loops 2
13:51:33:ST3_smx:INFO:	# loops 3
13:51:34:ST3_smx:INFO:	# loops 4
13:51:36:ST3_smx:INFO:	Total # of broken channels: 0
13:51:36:ST3_smx:INFO:	List of broken channels: []
13:51:36:ST3_smx:INFO:	Total # of broken channels: 0
13:51:36:ST3_smx:INFO:	List of broken channels: []
13:51:36:ST3_smx:INFO:	Configuring SMX FAST
13:51:38:ST3_smx:INFO:	chip: 5-4 	 44.073563 C 	 1183.292940 mV
13:51:38:ST3_smx:INFO:		Electrons
13:51:38:ST3_smx:INFO:	# loops 0
13:51:40:ST3_smx:INFO:	# loops 1
13:51:42:ST3_smx:INFO:	# loops 2
13:51:43:ST3_smx:INFO:	# loops 3
13:51:45:ST3_smx:INFO:	# loops 4
13:51:46:ST3_smx:INFO:	Total # of broken channels: 0
13:51:46:ST3_smx:INFO:	List of broken channels: []
13:51:46:ST3_smx:INFO:	Total # of broken channels: 4
13:51:46:ST3_smx:INFO:	List of broken channels: [76, 90, 110, 120]
13:51:47:ST3_smx:INFO:	Configuring SMX FAST
13:51:49:ST3_smx:INFO:	chip: 12-5 	 44.073563 C 	 1171.483840 mV
13:51:49:ST3_smx:INFO:		Electrons
13:51:49:ST3_smx:INFO:	# loops 0
13:51:51:ST3_smx:INFO:	# loops 1
13:51:52:ST3_smx:INFO:	# loops 2
13:51:54:ST3_smx:INFO:	# loops 3
13:51:56:ST3_smx:INFO:	# loops 4
13:51:57:ST3_smx:INFO:	Total # of broken channels: 0
13:51:57:ST3_smx:INFO:	List of broken channels: []
13:51:57:ST3_smx:INFO:	Total # of broken channels: 0
13:51:57:ST3_smx:INFO:	List of broken channels: []
13:51:58:ST3_smx:INFO:	Configuring SMX FAST
13:52:00:ST3_smx:INFO:	chip: 7-6 	 34.556970 C 	 1212.728715 mV
13:52:00:ST3_smx:INFO:		Electrons
13:52:00:ST3_smx:INFO:	# loops 0
13:52:01:ST3_smx:INFO:	# loops 1
13:52:03:ST3_smx:INFO:	# loops 2
13:52:04:ST3_smx:INFO:	# loops 3
13:52:06:ST3_smx:INFO:	# loops 4
13:52:07:ST3_smx:INFO:	Total # of broken channels: 0
13:52:07:ST3_smx:INFO:	List of broken channels: []
13:52:07:ST3_smx:INFO:	Total # of broken channels: 0
13:52:07:ST3_smx:INFO:	List of broken channels: []
13:52:08:ST3_smx:INFO:	Configuring SMX FAST
13:52:10:ST3_smx:INFO:	chip: 14-7 	 40.898880 C 	 1189.190035 mV
13:52:10:ST3_smx:INFO:		Electrons
13:52:10:ST3_smx:INFO:	# loops 0
13:52:12:ST3_smx:INFO:	# loops 1
13:52:13:ST3_smx:INFO:	# loops 2
13:52:15:ST3_smx:INFO:	# loops 3
13:52:16:ST3_smx:INFO:	# loops 4
13:52:18:ST3_smx:INFO:	Total # of broken channels: 0
13:52:18:ST3_smx:INFO:	List of broken channels: []
13:52:18:ST3_smx:INFO:	Total # of broken channels: 0
13:52:18:ST3_smx:INFO:	List of broken channels: []
13:52:18:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
13:52:19:febtest:INFO:	1-0 | XA-000-08-002-000-005-187-06 |  21.9 | 1253.7
13:52:19:febtest:INFO:	8-1 | XA-000-08-002-000-005-186-06 |  34.6 | 1201.0
13:52:19:febtest:INFO:	3-2 | XA-000-08-002-000-005-194-10 |  34.6 | 1201.0
13:52:19:febtest:INFO:	10-3 | XA-000-08-002-000-005-190-06 |  34.6 | 1206.9
13:52:20:febtest:INFO:	5-4 | XA-000-08-002-000-006-004-11 |  40.9 | 1183.3
13:52:20:febtest:INFO:	12-5 | XA-000-08-002-000-005-193-10 |  44.1 | 1171.5
13:52:20:febtest:INFO:	7-6 | XA-000-08-002-000-005-254-03 |  34.6 | 1212.7
13:52:20:febtest:INFO:	14-7 | XA-000-08-002-000-005-255-03 |  40.9 | 1189.2
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2023_12_12-13_50_40
OPERATOR  : Oleksandr S.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : 
FEB_SN : 1044
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.447', '1.4640', '1.845', '2.6940', '7.000', '1.5450', '7.000', '1.5450']
VI_after__Init : ['0', '0', '0', '0', '0', '0']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
13:52:22:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_1044/TestDate_2023_12_12-13_50_40/