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FEB_1046 13.02.24 08:15:07
TextEdit.txt
08:14:42:ST3_hmp4040:INFO: ROHDE&SCHWARZ,HMP4040,123796,HW50020003/SW2.71
08:14:43:febtest:INFO: FEB 8-2 selected
08:14:43:smx_tester:INFO: Setting Elink clock mode to 160 MHz
08:14:46:ST3_Shared:INFO: Listo of operators:Olga B.;
08:15:05:febtest:INFO: FEB 8-2 selected
08:15:05:smx_tester:INFO: Setting Elink clock mode to 160 MHz
08:15:07:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:15:07:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
08:15:07:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:15:50:ST3_ModuleSelector:INFO: L4DL200116 M4DL2B2001162B2 62 A
08:15:50:ST3_ModuleSelector:INFO:
08:15:50:febtest:INFO: Testing FEB with SN 1046
08:15:53:smx_tester:INFO: Scanning setup
08:15:53:elinks:INFO: Disabling clock on downlink 0
08:15:53:elinks:INFO: Disabling clock on downlink 1
08:15:53:elinks:INFO: Disabling clock on downlink 2
08:15:53:elinks:INFO: Disabling clock on downlink 3
08:15:53:elinks:INFO: Disabling clock on downlink 4
08:15:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:15:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:15:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:15:53:elinks:INFO: Disabling clock on downlink 0
08:15:53:elinks:INFO: Disabling clock on downlink 1
08:15:53:elinks:INFO: Disabling clock on downlink 2
08:15:53:elinks:INFO: Disabling clock on downlink 3
08:15:53:elinks:INFO: Disabling clock on downlink 4
08:15:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:15:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:15:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
08:15:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
08:15:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
08:15:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
08:15:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
08:15:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
08:15:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
08:15:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
08:15:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:15:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:15:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:15:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:15:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:15:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:15:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:15:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:15:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:15:54:elinks:INFO: Disabling clock on downlink 0
08:15:54:elinks:INFO: Disabling clock on downlink 1
08:15:54:elinks:INFO: Disabling clock on downlink 2
08:15:54:elinks:INFO: Disabling clock on downlink 3
08:15:54:elinks:INFO: Disabling clock on downlink 4
08:15:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:15:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:15:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:15:54:elinks:INFO: Disabling clock on downlink 0
08:15:54:elinks:INFO: Disabling clock on downlink 1
08:15:54:elinks:INFO: Disabling clock on downlink 2
08:15:54:elinks:INFO: Disabling clock on downlink 3
08:15:54:elinks:INFO: Disabling clock on downlink 4
08:15:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:15:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:15:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:15:54:elinks:INFO: Disabling clock on downlink 0
08:15:54:elinks:INFO: Disabling clock on downlink 1
08:15:54:elinks:INFO: Disabling clock on downlink 2
08:15:54:elinks:INFO: Disabling clock on downlink 3
08:15:54:elinks:INFO: Disabling clock on downlink 4
08:15:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:15:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:15:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:15:54:setup_element:INFO: Scanning clock phase
08:15:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:15:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:15:54:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:15:54:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:15:54:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:15:54:setup_element:INFO: Eye window for uplink 2 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:15:54:setup_element:INFO: Eye window for uplink 3 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:15:54:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:15:54:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:15:54:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:15:54:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:15:54:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:15:54:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:15:54:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:15:54:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:15:54:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:15:54:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:15:54:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:15:54:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:15:54:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
08:15:54:setup_element:INFO: Scanning data phases
08:15:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:15:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:16:00:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:16:00:setup_element:INFO: Eye window for uplink 0 : ____________XXXXX_______________________
Data delay found: 34
08:16:00:setup_element:INFO: Eye window for uplink 1 : ________XXXXX___________________________
Data delay found: 30
08:16:00:setup_element:INFO: Eye window for uplink 2 : ____XXXXX_______________________________
Data delay found: 26
08:16:00:setup_element:INFO: Eye window for uplink 3 : XXXXXX__________________________________
Data delay found: 22
08:16:00:setup_element:INFO: Eye window for uplink 4 : ______XXXX______________________________
Data delay found: 27
08:16:00:setup_element:INFO: Eye window for uplink 5 : __XXXX__________________________________
Data delay found: 23
08:16:00:setup_element:INFO: Eye window for uplink 6 : XXXX___________________________________X
Data delay found: 21
08:16:00:setup_element:INFO: Eye window for uplink 7 : X__________________________________XXXXX
Data delay found: 17
08:16:00:setup_element:INFO: Eye window for uplink 8 : _________________________XXXX___________
Data delay found: 6
08:16:00:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXX_____
Data delay found: 12
08:16:00:setup_element:INFO: Eye window for uplink 10: ___________________________XXXXX________
Data delay found: 9
08:16:00:setup_element:INFO: Eye window for uplink 11: _______________________________XXXXX____
Data delay found: 13
08:16:00:setup_element:INFO: Eye window for uplink 12: ____________________________XXXXX_______
Data delay found: 10
08:16:00:setup_element:INFO: Eye window for uplink 13: _______________________________XXXX_____
Data delay found: 12
08:16:00:setup_element:INFO: Eye window for uplink 14: _____________________________XXXXX______
Data delay found: 11
08:16:00:setup_element:INFO: Eye window for uplink 15: _______________________________XXXXX____
Data delay found: 13
08:16:00:setup_element:INFO: Setting the data phase to 34 for uplink 0
08:16:00:setup_element:INFO: Setting the data phase to 30 for uplink 1
08:16:00:setup_element:INFO: Setting the data phase to 26 for uplink 2
08:16:00:setup_element:INFO: Setting the data phase to 22 for uplink 3
08:16:00:setup_element:INFO: Setting the data phase to 27 for uplink 4
08:16:00:setup_element:INFO: Setting the data phase to 23 for uplink 5
08:16:00:setup_element:INFO: Setting the data phase to 21 for uplink 6
08:16:00:setup_element:INFO: Setting the data phase to 17 for uplink 7
08:16:00:setup_element:INFO: Setting the data phase to 6 for uplink 8
08:16:00:setup_element:INFO: Setting the data phase to 12 for uplink 9
08:16:00:setup_element:INFO: Setting the data phase to 9 for uplink 10
08:16:00:setup_element:INFO: Setting the data phase to 13 for uplink 11
08:16:00:setup_element:INFO: Setting the data phase to 10 for uplink 12
08:16:00:setup_element:INFO: Setting the data phase to 12 for uplink 13
08:16:00:setup_element:INFO: Setting the data phase to 11 for uplink 14
08:16:00:setup_element:INFO: Setting the data phase to 13 for uplink 15
08:16:00:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 71
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXX__
Uplink 1: ________________________________________________________________________XXXXXX__
Uplink 2: _____________________________________________________________________XXXXXXXX___
Uplink 3: _____________________________________________________________________XXXXXXXX___
Uplink 4: _______________________________________________________________________XXXXXXX__
Uplink 5: _______________________________________________________________________XXXXXXX__
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: _____________________________________________________________________XXXXXXXX___
Uplink 9: _____________________________________________________________________XXXXXXXX___
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: ______________________________________________________________________XXXXXXX___
Uplink 13: ______________________________________________________________________XXXXXXX___
Uplink 14: _______________________________________________________________________XXXXXXX__
Uplink 15: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 1:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 2:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 3:
Optimal Phase: 22
Window Length: 34
Eye Window: XXXXXX__________________________________
Uplink 4:
Optimal Phase: 27
Window Length: 36
Eye Window: ______XXXX______________________________
Uplink 5:
Optimal Phase: 23
Window Length: 36
Eye Window: __XXXX__________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 8:
Optimal Phase: 6
Window Length: 36
Eye Window: _________________________XXXX___________
Uplink 9:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 10:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 11:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 12:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 13:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 14:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 15:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
]
08:16:00:setup_element:INFO: Beginning SMX ASICs map scan
08:16:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:16:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:16:00:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:16:00:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:16:00:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:16:00:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:16:00:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:16:00:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:16:01:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:16:01:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:16:01:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:16:01:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:16:01:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:16:01:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:16:01:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:16:01:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:16:01:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:16:01:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:16:01:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:16:02:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:16:02:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:16:03:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 71
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXX__
Uplink 1: ________________________________________________________________________XXXXXX__
Uplink 2: _____________________________________________________________________XXXXXXXX___
Uplink 3: _____________________________________________________________________XXXXXXXX___
Uplink 4: _______________________________________________________________________XXXXXXX__
Uplink 5: _______________________________________________________________________XXXXXXX__
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: _____________________________________________________________________XXXXXXXX___
Uplink 9: _____________________________________________________________________XXXXXXXX___
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: ______________________________________________________________________XXXXXXX___
Uplink 13: ______________________________________________________________________XXXXXXX___
Uplink 14: _______________________________________________________________________XXXXXXX__
Uplink 15: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 1:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 2:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 3:
Optimal Phase: 22
Window Length: 34
Eye Window: XXXXXX__________________________________
Uplink 4:
Optimal Phase: 27
Window Length: 36
Eye Window: ______XXXX______________________________
Uplink 5:
Optimal Phase: 23
Window Length: 36
Eye Window: __XXXX__________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 8:
Optimal Phase: 6
Window Length: 36
Eye Window: _________________________XXXX___________
Uplink 9:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 10:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 11:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 12:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 13:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 14:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 15:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
08:16:03:setup_element:INFO: Performing Elink synchronization
08:16:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:16:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:16:03:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:16:03:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:16:03:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:16:03:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:16:03:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
08:16:05:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
08:16:05:febtest:INFO: 1-0 | XA-000-08-002-000-004-049-01 | 28.2 | 1183.3
08:16:05:febtest:INFO: 8-1 | XA-000-08-002-000-004-149-05 | 34.6 | 1159.7
08:16:05:febtest:INFO: 3-2 | XA-000-08-002-000-002-086-15 | 47.3 | 1135.9
08:16:06:febtest:INFO: 10-3 | XA-000-08-002-000-004-134-02 | 9.3 | 1253.7
08:16:06:febtest:INFO: 5-4 | XA-000-08-002-000-004-127-04 | 37.7 | 1183.3
08:16:06:febtest:INFO: 12-5 | XA-000-08-002-000-004-141-02 | 12.4 | 1236.2
08:16:06:febtest:INFO: 7-6 | XA-000-08-002-000-004-050-01 | 28.2 | 1189.2
08:16:07:febtest:INFO: 14-7 | XA-000-08-002-000-004-123-04 | 28.2 | 1183.3
08:16:07:ST3_smx:INFO: Configuring SMX FAST
08:16:09:ST3_smx:INFO: chip: 1-0 31.389742 C 1171.483840 mV
08:16:09:ST3_smx:INFO: Electrons
08:16:09:ST3_smx:INFO: # loops 0
08:16:11:ST3_smx:INFO: # loops 1
08:16:12:ST3_smx:INFO: # loops 2
08:16:14:ST3_smx:INFO: # loops 3
08:16:15:ST3_smx:INFO: # loops 4
08:16:17:ST3_smx:INFO: Total # of broken channels: 0
08:16:17:ST3_smx:INFO: List of broken channels: []
08:16:17:ST3_smx:INFO: Total # of broken channels: 0
08:16:17:ST3_smx:INFO: List of broken channels: []
08:16:18:ST3_smx:INFO: Configuring SMX FAST
08:16:19:ST3_smx:INFO: chip: 8-1 28.225000 C 1177.390875 mV
08:16:19:ST3_smx:INFO: Electrons
08:16:19:ST3_smx:INFO: # loops 0
08:16:21:ST3_smx:INFO: # loops 1
08:16:23:ST3_smx:INFO: # loops 2
08:16:24:ST3_smx:INFO: # loops 3
08:16:26:ST3_smx:INFO: # loops 4
08:16:27:ST3_smx:INFO: Total # of broken channels: 0
08:16:27:ST3_smx:INFO: List of broken channels: []
08:16:27:ST3_smx:INFO: Total # of broken channels: 0
08:16:27:ST3_smx:INFO: List of broken channels: []
08:16:28:ST3_smx:INFO: Configuring SMX FAST
08:16:30:ST3_smx:INFO: chip: 3-2 37.726682 C 1165.571835 mV
08:16:30:ST3_smx:INFO: Electrons
08:16:30:ST3_smx:INFO: # loops 0
08:16:31:ST3_smx:INFO: # loops 1
08:16:33:ST3_smx:INFO: # loops 2
08:16:34:ST3_smx:INFO: # loops 3
08:16:36:ST3_smx:INFO: # loops 4
08:16:38:ST3_smx:INFO: Total # of broken channels: 1
08:16:38:ST3_smx:INFO: List of broken channels: [127]
08:16:38:ST3_smx:INFO: Total # of broken channels: 1
08:16:38:ST3_smx:INFO: List of broken channels: [127]
08:16:38:ST3_smx:INFO: Configuring SMX FAST
08:16:40:ST3_smx:INFO: chip: 10-3 18.745682 C 1224.468235 mV
08:16:40:ST3_smx:INFO: Electrons
08:16:40:ST3_smx:INFO: # loops 0
08:16:42:ST3_smx:INFO: # loops 1
08:16:44:ST3_smx:INFO: # loops 2
08:16:45:ST3_smx:INFO: # loops 3
08:16:47:ST3_smx:INFO: # loops 4
08:16:48:ST3_smx:INFO: Total # of broken channels: 0
08:16:48:ST3_smx:INFO: List of broken channels: []
08:16:48:ST3_smx:INFO: Total # of broken channels: 0
08:16:48:ST3_smx:INFO: List of broken channels: []
08:16:48:ST3_smx:INFO: Configuring SMX FAST
08:16:51:ST3_smx:INFO: chip: 5-4 47.250730 C 1153.732915 mV
08:16:51:ST3_smx:INFO: Electrons
08:16:51:ST3_smx:INFO: # loops 0
08:16:52:ST3_smx:INFO: # loops 1
08:16:54:ST3_smx:INFO: # loops 2
08:16:55:ST3_smx:INFO: # loops 3
08:16:57:ST3_smx:INFO: # loops 4
08:16:59:ST3_smx:INFO: Total # of broken channels: 34
08:16:59:ST3_smx:INFO: List of broken channels: [0, 8, 74, 76, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 114, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
08:16:59:ST3_smx:INFO: Total # of broken channels: 0
08:16:59:ST3_smx:INFO: List of broken channels: []
08:16:59:ST3_smx:INFO: Configuring SMX FAST
08:17:01:ST3_smx:INFO: chip: 12-5 25.062742 C 1206.851500 mV
08:17:01:ST3_smx:INFO: Electrons
08:17:01:ST3_smx:INFO: # loops 0
08:17:03:ST3_smx:INFO: # loops 1
08:17:04:ST3_smx:INFO: # loops 2
08:17:06:ST3_smx:INFO: # loops 3
08:17:07:ST3_smx:INFO: # loops 4
08:17:09:ST3_smx:INFO: Total # of broken channels: 1
08:17:09:ST3_smx:INFO: List of broken channels: [102]
08:17:09:ST3_smx:INFO: Total # of broken channels: 1
08:17:09:ST3_smx:INFO: List of broken channels: [102]
08:17:09:ST3_smx:INFO: Configuring SMX FAST
08:17:11:ST3_smx:INFO: chip: 7-6 34.556970 C 1183.292940 mV
08:17:11:ST3_smx:INFO: Electrons
08:17:11:ST3_smx:INFO: # loops 0
08:17:13:ST3_smx:INFO: # loops 1
08:17:14:ST3_smx:INFO: # loops 2
08:17:16:ST3_smx:INFO: # loops 3
08:17:17:ST3_smx:INFO: # loops 4
08:17:19:ST3_smx:INFO: Total # of broken channels: 0
08:17:19:ST3_smx:INFO: List of broken channels: []
08:17:19:ST3_smx:INFO: Total # of broken channels: 0
08:17:19:ST3_smx:INFO: List of broken channels: []
08:17:19:ST3_smx:INFO: Configuring SMX FAST
08:17:21:ST3_smx:INFO: chip: 14-7 25.062742 C 1212.728715 mV
08:17:21:ST3_smx:INFO: Electrons
08:17:21:ST3_smx:INFO: # loops 0
08:17:23:ST3_smx:INFO: # loops 1
08:17:24:ST3_smx:INFO: # loops 2
08:17:26:ST3_smx:INFO: # loops 3
08:17:28:ST3_smx:INFO: # loops 4
08:17:29:ST3_smx:INFO: Total # of broken channels: 0
08:17:29:ST3_smx:INFO: List of broken channels: []
08:17:29:ST3_smx:INFO: Total # of broken channels: 0
08:17:29:ST3_smx:INFO: List of broken channels: []
08:17:30:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
08:17:31:febtest:INFO: 1-0 | XA-000-08-002-000-004-049-01 | 31.4 | 1177.4
08:17:31:febtest:INFO: 8-1 | XA-000-08-002-000-004-149-05 | 31.4 | 1177.4
08:17:31:febtest:INFO: 3-2 | XA-000-08-002-000-002-086-15 | 40.9 | 1165.6
08:17:31:febtest:INFO: 10-3 | XA-000-08-002-000-004-134-02 | 21.9 | 1218.6
08:17:32:febtest:INFO: 5-4 | XA-000-08-002-000-004-127-04 | 50.4 | 1153.7
08:17:32:febtest:INFO: 12-5 | XA-000-08-002-000-004-141-02 | 25.1 | 1206.9
08:17:32:febtest:INFO: 7-6 | XA-000-08-002-000-004-050-01 | 34.6 | 1183.3
08:17:32:febtest:INFO: 14-7 | XA-000-08-002-000-004-123-04 | 25.1 | 1212.7
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_02_13-08_15_07
OPERATOR : Olga B.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4DL200116 M4DL2B2001162B2 62 A
FEB_SN : 1046
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:
MODULE_NAME: L4DL200116 M4DL2B2001162B2 62 A
MODULE_TYPE:
MODULE_LADDER: L4DL200116
MODULE_MODULE: M4DL2B2001162B2
MODULE_SIZE: 62
MODULE_GRADE: A
---------------------------------------
VI_before_Init : ['2.450', '0.0003', '1.850', '0.0000', '2.450', '1.8660', '1.850', '0.4684']
VI_after__Init : ['2.450', '0.0003', '1.850', '0.0000', '2.450', '1.9870', '1.850', '0.3165']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
08:17:50:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1046/TestDate_2024_02_13-08_15_07/