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FEB_1046 31.01.24 15:14:43
Info
15:14:18:febtest:INFO: FEB 8-2 selected
15:14:18:smx_tester:INFO: Setting Elink clock mode to 160 MHz
15:14:43:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:14:43:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
15:14:43:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:14:44:febtest:INFO: Testing FEB with SN 1046
15:14:45:smx_tester:INFO: Scanning setup
15:14:45:elinks:INFO: Disabling clock on downlink 0
15:14:45:elinks:INFO: Disabling clock on downlink 1
15:14:45:elinks:INFO: Disabling clock on downlink 2
15:14:45:elinks:INFO: Disabling clock on downlink 3
15:14:45:elinks:INFO: Disabling clock on downlink 4
15:14:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:14:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:14:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:14:45:elinks:INFO: Disabling clock on downlink 0
15:14:45:elinks:INFO: Disabling clock on downlink 1
15:14:45:elinks:INFO: Disabling clock on downlink 2
15:14:45:elinks:INFO: Disabling clock on downlink 3
15:14:45:elinks:INFO: Disabling clock on downlink 4
15:14:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:14:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:14:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
15:14:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
15:14:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
15:14:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
15:14:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
15:14:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
15:14:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
15:14:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
15:14:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:14:46:elinks:INFO: Disabling clock on downlink 0
15:14:46:elinks:INFO: Disabling clock on downlink 1
15:14:46:elinks:INFO: Disabling clock on downlink 2
15:14:46:elinks:INFO: Disabling clock on downlink 3
15:14:46:elinks:INFO: Disabling clock on downlink 4
15:14:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:14:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:14:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:14:46:elinks:INFO: Disabling clock on downlink 0
15:14:46:elinks:INFO: Disabling clock on downlink 1
15:14:46:elinks:INFO: Disabling clock on downlink 2
15:14:46:elinks:INFO: Disabling clock on downlink 3
15:14:46:elinks:INFO: Disabling clock on downlink 4
15:14:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:14:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:14:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:14:46:elinks:INFO: Disabling clock on downlink 0
15:14:46:elinks:INFO: Disabling clock on downlink 1
15:14:46:elinks:INFO: Disabling clock on downlink 2
15:14:46:elinks:INFO: Disabling clock on downlink 3
15:14:46:elinks:INFO: Disabling clock on downlink 4
15:14:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:14:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:14:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:14:46:setup_element:INFO: Scanning clock phase
15:14:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:14:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:14:47:setup_element:INFO: Clock phase scan results for group 0, downlink 1
15:14:47:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
15:14:47:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
15:14:47:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
15:14:47:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
15:14:47:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
15:14:47:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
15:14:47:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXX___
Clock Delay: 33
15:14:47:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXX___
Clock Delay: 33
15:14:47:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
15:14:47:setup_element:INFO: Scanning data phases
15:14:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:14:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:14:52:setup_element:INFO: Data phase scan results for group 0, downlink 1
15:14:52:setup_element:INFO: Eye window for uplink 8 : ____________________________XXXX________
Data delay found: 9
15:14:52:setup_element:INFO: Eye window for uplink 9 : ________________________________XXXXX___
Data delay found: 14
15:14:52:setup_element:INFO: Eye window for uplink 10: _____________________________XXXXX______
Data delay found: 11
15:14:52:setup_element:INFO: Eye window for uplink 11: _________________________________XXXXXX_
Data delay found: 15
15:14:52:setup_element:INFO: Eye window for uplink 12: _______________________________XXXXX____
Data delay found: 13
15:14:52:setup_element:INFO: Eye window for uplink 13: __________________________________XXXXX_
Data delay found: 16
15:14:52:setup_element:INFO: Eye window for uplink 14: _______________________________XXXXXX___
Data delay found: 13
15:14:52:setup_element:INFO: Eye window for uplink 15: __________________________________XXXXX_
Data delay found: 16
15:14:52:setup_element:INFO: Setting the data phase to 9 for uplink 8
15:14:52:setup_element:INFO: Setting the data phase to 14 for uplink 9
15:14:52:setup_element:INFO: Setting the data phase to 11 for uplink 10
15:14:52:setup_element:INFO: Setting the data phase to 15 for uplink 11
15:14:52:setup_element:INFO: Setting the data phase to 13 for uplink 12
15:14:52:setup_element:INFO: Setting the data phase to 16 for uplink 13
15:14:52:setup_element:INFO: Setting the data phase to 13 for uplink 14
15:14:52:setup_element:INFO: Setting the data phase to 16 for uplink 15
15:14:52:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 72
Eye Windows:
Uplink 8: _____________________________________________________________________XXXXXXXX___
Uplink 9: _____________________________________________________________________XXXXXXXX___
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: _____________________________________________________________________XXXXXXX____
Uplink 13: _____________________________________________________________________XXXXXXX____
Uplink 14: _______________________________________________________________________XXXXXX___
Uplink 15: _______________________________________________________________________XXXXXX___
Data phase characteristics:
Uplink 8:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 9:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 10:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 11:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 12:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 13:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 14:
Optimal Phase: 13
Window Length: 34
Eye Window: _______________________________XXXXXX___
Uplink 15:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
]
15:14:52:setup_element:INFO: Beginning SMX ASICs map scan
15:14:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:14:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:14:52:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
15:14:52:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
15:14:52:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
15:14:52:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
15:14:52:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
15:14:53:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
15:14:53:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
15:14:53:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
15:14:53:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
15:14:53:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
15:14:53:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
15:14:55:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 72
Eye Windows:
Uplink 8: _____________________________________________________________________XXXXXXXX___
Uplink 9: _____________________________________________________________________XXXXXXXX___
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: _____________________________________________________________________XXXXXXX____
Uplink 13: _____________________________________________________________________XXXXXXX____
Uplink 14: _______________________________________________________________________XXXXXX___
Uplink 15: _______________________________________________________________________XXXXXX___
Data phase characteristics:
Uplink 8:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 9:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 10:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 11:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 12:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 13:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 14:
Optimal Phase: 13
Window Length: 34
Eye Window: _______________________________XXXXXX___
Uplink 15:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
15:14:55:setup_element:INFO: Performing Elink synchronization
15:14:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:14:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:14:55:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
15:14:55:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
15:14:55:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
15:14:55:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
15:14:55:ST3_emu:INFO: Number of chips: 4
addr | upli | dwnli | grp | uplinks | uplinks_map
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
15:14:56:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
15:14:56:febtest:INFO: 8-1 | XA-000-08-002-000-004-149-05 | 40.9 | 1165.6
15:14:56:febtest:INFO: 10-3 | XA-000-08-002-000-004-134-02 | 15.6 | 1259.6
15:14:57:febtest:INFO: 12-5 | XA-000-08-002-000-004-141-02 | 28.2 | 1224.5
15:14:57:febtest:INFO: 14-7 | XA-000-08-002-000-004-123-04 | 37.7 | 1183.3
15:14:57:ST3_smx:INFO: Configuring SMX FAST
15:14:59:ST3_smx:INFO: chip: 8-1 37.726682 C 1177.390875 mV
15:14:59:ST3_smx:INFO: Electrons
15:14:59:ST3_smx:INFO: # loops 0
15:15:01:ST3_smx:INFO: # loops 1
15:15:02:ST3_smx:INFO: # loops 2
15:15:04:ST3_smx:INFO: # loops 3
15:15:05:ST3_smx:INFO: # loops 4
15:15:07:ST3_smx:INFO: Total # of broken channels: 0
15:15:07:ST3_smx:INFO: List of broken channels: []
15:15:07:ST3_smx:INFO: Total # of broken channels: 0
15:15:07:ST3_smx:INFO: List of broken channels: []
15:15:08:ST3_smx:INFO: Configuring SMX FAST
15:15:10:ST3_smx:INFO: chip: 10-3 25.062742 C 1230.330540 mV
15:15:10:ST3_smx:INFO: Electrons
15:15:10:ST3_smx:INFO: # loops 0
15:15:11:ST3_smx:INFO: # loops 1
15:15:13:ST3_smx:INFO: # loops 2
15:15:15:ST3_smx:INFO: # loops 3
15:15:16:ST3_smx:INFO: # loops 4
15:15:18:ST3_smx:INFO: Total # of broken channels: 0
15:15:18:ST3_smx:INFO: List of broken channels: []
15:15:18:ST3_smx:INFO: Total # of broken channels: 0
15:15:18:ST3_smx:INFO: List of broken channels: []
15:15:19:ST3_smx:INFO: Configuring SMX FAST
15:15:21:ST3_smx:INFO: chip: 12-5 31.389742 C 1212.728715 mV
15:15:21:ST3_smx:INFO: Electrons
15:15:21:ST3_smx:INFO: # loops 0
15:15:22:ST3_smx:INFO: # loops 1
15:15:24:ST3_smx:INFO: # loops 2
15:15:25:ST3_smx:INFO: # loops 3
15:15:27:ST3_smx:INFO: # loops 4
15:15:29:ST3_smx:INFO: Total # of broken channels: 0
15:15:29:ST3_smx:INFO: List of broken channels: []
15:15:29:ST3_smx:INFO: Total # of broken channels: 0
15:15:29:ST3_smx:INFO: List of broken channels: []
15:15:30:ST3_smx:INFO: Configuring SMX FAST
15:15:31:ST3_smx:INFO: chip: 14-7 34.556970 C 1206.851500 mV
15:15:31:ST3_smx:INFO: Electrons
15:15:31:ST3_smx:INFO: # loops 0
15:15:33:ST3_smx:INFO: # loops 1
15:15:35:ST3_smx:INFO: # loops 2
15:15:36:ST3_smx:INFO: # loops 3
15:15:38:ST3_smx:INFO: # loops 4
15:15:39:ST3_smx:INFO: Total # of broken channels: 0
15:15:39:ST3_smx:INFO: List of broken channels: []
15:15:39:ST3_smx:INFO: Total # of broken channels: 0
15:15:39:ST3_smx:INFO: List of broken channels: []
15:15:40:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
15:15:41:febtest:INFO: 8-1 | XA-000-08-002-000-004-149-05 | 37.7 | 1177.4
15:15:41:febtest:INFO: 10-3 | XA-000-08-002-000-004-134-02 | 25.1 | 1230.3
15:15:41:febtest:INFO: 12-5 | XA-000-08-002-000-004-141-02 | 31.4 | 1212.7
15:15:41:febtest:INFO: 14-7 | XA-000-08-002-000-004-123-04 | 34.6 | 1206.9
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_31-15_14_43
OPERATOR : Robert V.; Irakli K.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 1046
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.450', '0.7737', '1.850', '0.9389', '2.450', '0.0002', '1.850', '0.0001']
VI_after__Init : ['0', '0', '0', '0', '0', '0']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
15:16:34:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1046/TestDate_2024_01_31-15_14_43/