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FEB_1046 01.02.24 16:35:10
TextEdit.txt
16:34:56:ST3_hmp4040:INFO: ROHDE&SCHWARZ,HMP4040,123796,HW50020003/SW2.71
16:34:56:febtest:INFO: FEB 8-2 selected
16:34:56:smx_tester:INFO: Setting Elink clock mode to 160 MHz
16:34:56:febtest:INFO: FEB 8-2 selected
16:34:56:smx_tester:INFO: Setting Elink clock mode to 160 MHz
16:35:10:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
16:35:10:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
16:35:10:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
16:35:11:febtest:INFO: Testing FEB with SN 1046
16:35:13:smx_tester:INFO: Scanning setup
16:35:13:elinks:INFO: Disabling clock on downlink 0
16:35:13:elinks:INFO: Disabling clock on downlink 1
16:35:13:elinks:INFO: Disabling clock on downlink 2
16:35:13:elinks:INFO: Disabling clock on downlink 3
16:35:13:elinks:INFO: Disabling clock on downlink 4
16:35:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
16:35:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
16:35:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
16:35:14:elinks:INFO: Disabling clock on downlink 0
16:35:14:elinks:INFO: Disabling clock on downlink 1
16:35:14:elinks:INFO: Disabling clock on downlink 2
16:35:14:elinks:INFO: Disabling clock on downlink 3
16:35:14:elinks:INFO: Disabling clock on downlink 4
16:35:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
16:35:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
16:35:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
16:35:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
16:35:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
16:35:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
16:35:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
16:35:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
16:35:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
16:35:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
16:35:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
16:35:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
16:35:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
16:35:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
16:35:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
16:35:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
16:35:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
16:35:14:elinks:INFO: Disabling clock on downlink 0
16:35:14:elinks:INFO: Disabling clock on downlink 1
16:35:14:elinks:INFO: Disabling clock on downlink 2
16:35:14:elinks:INFO: Disabling clock on downlink 3
16:35:14:elinks:INFO: Disabling clock on downlink 4
16:35:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
16:35:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
16:35:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
16:35:14:elinks:INFO: Disabling clock on downlink 0
16:35:14:elinks:INFO: Disabling clock on downlink 1
16:35:14:elinks:INFO: Disabling clock on downlink 2
16:35:14:elinks:INFO: Disabling clock on downlink 3
16:35:14:elinks:INFO: Disabling clock on downlink 4
16:35:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
16:35:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
16:35:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
16:35:14:elinks:INFO: Disabling clock on downlink 0
16:35:14:elinks:INFO: Disabling clock on downlink 1
16:35:14:elinks:INFO: Disabling clock on downlink 2
16:35:14:elinks:INFO: Disabling clock on downlink 3
16:35:14:elinks:INFO: Disabling clock on downlink 4
16:35:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
16:35:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
16:35:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
16:35:14:setup_element:INFO: Scanning clock phase
16:35:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
16:35:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
16:35:15:setup_element:INFO: Clock phase scan results for group 0, downlink 1
16:35:15:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
16:35:15:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
16:35:15:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
16:35:15:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
16:35:15:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
16:35:15:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
16:35:15:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
16:35:15:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
16:35:15:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________________
Clock Delay: 40
16:35:15:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________________
Clock Delay: 40
16:35:15:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
16:35:15:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
16:35:15:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXX___
Clock Delay: 33
16:35:15:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXX___
Clock Delay: 33
16:35:15:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
16:35:15:setup_element:INFO: Scanning data phases
16:35:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
16:35:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
16:35:20:setup_element:INFO: Data phase scan results for group 0, downlink 1
16:35:20:setup_element:INFO: Eye window for uplink 0 : ____________XXXXX_______________________
Data delay found: 34
16:35:20:setup_element:INFO: Eye window for uplink 1 : _______XXXXXX___________________________
Data delay found: 29
16:35:20:setup_element:INFO: Eye window for uplink 4 : ______XXXX______________________________
Data delay found: 27
16:35:20:setup_element:INFO: Eye window for uplink 5 : __XXXXX_________________________________
Data delay found: 24
16:35:20:setup_element:INFO: Eye window for uplink 6 : XXXX___________________________________X
Data delay found: 21
16:35:20:setup_element:INFO: Eye window for uplink 7 : X__________________________________XXXXX
Data delay found: 17
16:35:20:setup_element:INFO: Eye window for uplink 8 : _________________________XXXX___________
Data delay found: 6
16:35:20:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXXXX_____
Data delay found: 11
16:35:20:setup_element:INFO: Eye window for uplink 10: __________________________XXXXXX________
Data delay found: 8
16:35:20:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXX_____
Data delay found: 12
16:35:20:setup_element:INFO: Eye window for uplink 12: ___________________________XXXXXX_______
Data delay found: 9
16:35:20:setup_element:INFO: Eye window for uplink 13: ______________________________XXXXXX____
Data delay found: 12
16:35:20:setup_element:INFO: Eye window for uplink 14: _____________________________XXXXX______
Data delay found: 11
16:35:20:setup_element:INFO: Eye window for uplink 15: ______________________________XXXXXX____
Data delay found: 12
16:35:20:setup_element:INFO: Setting the data phase to 34 for uplink 0
16:35:20:setup_element:INFO: Setting the data phase to 29 for uplink 1
16:35:20:setup_element:INFO: Setting the data phase to 27 for uplink 4
16:35:20:setup_element:INFO: Setting the data phase to 24 for uplink 5
16:35:20:setup_element:INFO: Setting the data phase to 21 for uplink 6
16:35:20:setup_element:INFO: Setting the data phase to 17 for uplink 7
16:35:20:setup_element:INFO: Setting the data phase to 6 for uplink 8
16:35:20:setup_element:INFO: Setting the data phase to 11 for uplink 9
16:35:20:setup_element:INFO: Setting the data phase to 8 for uplink 10
16:35:20:setup_element:INFO: Setting the data phase to 12 for uplink 11
16:35:20:setup_element:INFO: Setting the data phase to 9 for uplink 12
16:35:20:setup_element:INFO: Setting the data phase to 12 for uplink 13
16:35:20:setup_element:INFO: Setting the data phase to 11 for uplink 14
16:35:20:setup_element:INFO: Setting the data phase to 12 for uplink 15
16:35:20:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXX__
Uplink 1: _______________________________________________________________________XXXXXXX__
Uplink 4: _______________________________________________________________________XXXXXX___
Uplink 5: _______________________________________________________________________XXXXXX___
Uplink 6: _______________________________________________________________________XXXXXX___
Uplink 7: _______________________________________________________________________XXXXXX___
Uplink 8: ____________________________________________________________________XXXXXXXX____
Uplink 9: ____________________________________________________________________XXXXXXXX____
Uplink 10: ________________________________________________________________________________
Uplink 11: ________________________________________________________________________________
Uplink 12: ______________________________________________________________________XXXXXXX___
Uplink 13: ______________________________________________________________________XXXXXXX___
Uplink 14: _______________________________________________________________________XXXXXX___
Uplink 15: _______________________________________________________________________XXXXXX___
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 1:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 4:
Optimal Phase: 27
Window Length: 36
Eye Window: ______XXXX______________________________
Uplink 5:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 8:
Optimal Phase: 6
Window Length: 36
Eye Window: _________________________XXXX___________
Uplink 9:
Optimal Phase: 11
Window Length: 34
Eye Window: _____________________________XXXXXX_____
Uplink 10:
Optimal Phase: 8
Window Length: 34
Eye Window: __________________________XXXXXX________
Uplink 11:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 12:
Optimal Phase: 9
Window Length: 34
Eye Window: ___________________________XXXXXX_______
Uplink 13:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 14:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 15:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
]
16:35:20:setup_element:INFO: Beginning SMX ASICs map scan
16:35:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
16:35:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
16:35:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
16:35:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
16:35:20:uplink:INFO: Setting uplinks mask [0, 1, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
16:35:21:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
16:35:21:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
16:35:21:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
16:35:21:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
16:35:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
16:35:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
16:35:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
16:35:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
16:35:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
16:35:22:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
16:35:22:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
16:35:22:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
16:35:22:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
16:35:22:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
16:35:23:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXX__
Uplink 1: _______________________________________________________________________XXXXXXX__
Uplink 4: _______________________________________________________________________XXXXXX___
Uplink 5: _______________________________________________________________________XXXXXX___
Uplink 6: _______________________________________________________________________XXXXXX___
Uplink 7: _______________________________________________________________________XXXXXX___
Uplink 8: ____________________________________________________________________XXXXXXXX____
Uplink 9: ____________________________________________________________________XXXXXXXX____
Uplink 10: ________________________________________________________________________________
Uplink 11: ________________________________________________________________________________
Uplink 12: ______________________________________________________________________XXXXXXX___
Uplink 13: ______________________________________________________________________XXXXXXX___
Uplink 14: _______________________________________________________________________XXXXXX___
Uplink 15: _______________________________________________________________________XXXXXX___
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 1:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 4:
Optimal Phase: 27
Window Length: 36
Eye Window: ______XXXX______________________________
Uplink 5:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 8:
Optimal Phase: 6
Window Length: 36
Eye Window: _________________________XXXX___________
Uplink 9:
Optimal Phase: 11
Window Length: 34
Eye Window: _____________________________XXXXXX_____
Uplink 10:
Optimal Phase: 8
Window Length: 34
Eye Window: __________________________XXXXXX________
Uplink 11:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 12:
Optimal Phase: 9
Window Length: 34
Eye Window: ___________________________XXXXXX_______
Uplink 13:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 14:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 15:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
16:35:23:setup_element:INFO: Performing Elink synchronization
16:35:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
16:35:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
16:35:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
16:35:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
16:35:23:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
16:35:23:uplink:INFO: Enabling uplinks [0, 1, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
16:35:23:ST3_emu:INFO: Number of chips: 7
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
16:35:25:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
16:35:25:febtest:INFO: 1-0 | XA-000-08-002-000-004-049-01 | 37.7 | 1189.2
16:35:25:febtest:INFO: 8-1 | XA-000-08-002-000-004-149-05 | 44.1 | 1165.6
16:35:26:febtest:INFO: 10-3 | XA-000-08-002-000-004-134-02 | 25.1 | 1247.9
16:35:26:febtest:INFO: 5-4 | XA-000-08-002-000-004-127-04 | 53.6 | 1177.4
16:35:26:febtest:INFO: 12-5 | XA-000-08-002-000-004-141-02 | 34.6 | 1206.9
16:35:26:febtest:INFO: 7-6 | XA-000-08-002-000-004-050-01 | 40.9 | 1189.2
16:35:27:febtest:INFO: 14-7 | XA-000-08-002-000-004-123-04 | 44.1 | 1183.3
16:35:27:ST3_smx:INFO: Configuring SMX FAST
16:35:29:ST3_smx:INFO: chip: 1-0 40.898880 C 1171.483840 mV
16:35:29:ST3_smx:INFO: Electrons
16:35:29:ST3_smx:INFO: # loops 0
16:35:30:ST3_smx:INFO: # loops 1
16:35:32:ST3_smx:INFO: # loops 2
16:35:34:ST3_smx:INFO: # loops 3
16:35:35:ST3_smx:INFO: # loops 4
16:35:37:ST3_smx:INFO: Total # of broken channels: 0
16:35:37:ST3_smx:INFO: List of broken channels: []
16:35:37:ST3_smx:INFO: Total # of broken channels: 0
16:35:37:ST3_smx:INFO: List of broken channels: []
16:35:38:ST3_smx:INFO: Configuring SMX FAST
16:35:40:ST3_smx:INFO: chip: 8-1 37.726682 C 1183.292940 mV
16:35:40:ST3_smx:INFO: Electrons
16:35:40:ST3_smx:INFO: # loops 0
16:35:41:ST3_smx:INFO: # loops 1
16:35:43:ST3_smx:INFO: # loops 2
16:35:45:ST3_smx:INFO: # loops 3
16:35:46:ST3_smx:INFO: # loops 4
16:35:48:ST3_smx:INFO: Total # of broken channels: 0
16:35:48:ST3_smx:INFO: List of broken channels: []
16:35:48:ST3_smx:INFO: Total # of broken channels: 0
16:35:48:ST3_smx:INFO: List of broken channels: []
16:35:49:ST3_smx:INFO: Configuring SMX FAST
16:35:51:ST3_smx:INFO: chip: 10-3 31.389742 C 1212.728715 mV
16:35:51:ST3_smx:INFO: Electrons
16:35:51:ST3_smx:INFO: # loops 0
16:35:52:ST3_smx:INFO: # loops 1
16:35:54:ST3_smx:INFO: # loops 2
16:35:55:ST3_smx:INFO: # loops 3
16:35:57:ST3_smx:INFO: # loops 4
16:35:59:ST3_smx:INFO: Total # of broken channels: 0
16:35:59:ST3_smx:INFO: List of broken channels: []
16:35:59:ST3_smx:INFO: Total # of broken channels: 0
16:35:59:ST3_smx:INFO: List of broken channels: []
16:35:59:ST3_smx:INFO: Configuring SMX FAST
16:36:01:ST3_smx:INFO: chip: 5-4 59.984250 C 1153.732915 mV
16:36:01:ST3_smx:INFO: Electrons
16:36:01:ST3_smx:INFO: # loops 0
16:36:03:ST3_smx:INFO: # loops 1
16:36:05:ST3_smx:INFO: # loops 2
16:36:06:ST3_smx:INFO: # loops 3
16:36:08:ST3_smx:INFO: # loops 4
16:36:09:ST3_smx:INFO: Total # of broken channels: 0
16:36:09:ST3_smx:INFO: List of broken channels: []
16:36:09:ST3_smx:INFO: Total # of broken channels: 0
16:36:09:ST3_smx:INFO: List of broken channels: []
16:36:10:ST3_smx:INFO: Configuring SMX FAST
16:36:12:ST3_smx:INFO: chip: 12-5 37.726682 C 1200.969315 mV
16:36:12:ST3_smx:INFO: Electrons
16:36:12:ST3_smx:INFO: # loops 0
16:36:14:ST3_smx:INFO: # loops 1
16:36:15:ST3_smx:INFO: # loops 2
16:36:17:ST3_smx:INFO: # loops 3
16:36:18:ST3_smx:INFO: # loops 4
16:36:20:ST3_smx:INFO: Total # of broken channels: 0
16:36:20:ST3_smx:INFO: List of broken channels: []
16:36:20:ST3_smx:INFO: Total # of broken channels: 0
16:36:20:ST3_smx:INFO: List of broken channels: []
16:36:21:ST3_smx:INFO: Configuring SMX FAST
16:36:23:ST3_smx:INFO: chip: 7-6 47.250730 C 1177.390875 mV
16:36:23:ST3_smx:INFO: Electrons
16:36:23:ST3_smx:INFO: # loops 0
16:36:25:ST3_smx:INFO: # loops 1
16:36:26:ST3_smx:INFO: # loops 2
16:36:28:ST3_smx:INFO: # loops 3
16:36:29:ST3_smx:INFO: # loops 4
16:36:31:ST3_smx:INFO: Total # of broken channels: 0
16:36:31:ST3_smx:INFO: List of broken channels: []
16:36:31:ST3_smx:INFO: Total # of broken channels: 0
16:36:31:ST3_smx:INFO: List of broken channels: []
16:36:32:ST3_smx:INFO: Configuring SMX FAST
16:36:34:ST3_smx:INFO: chip: 14-7 37.726682 C 1212.728715 mV
16:36:34:ST3_smx:INFO: Electrons
16:36:34:ST3_smx:INFO: # loops 0
16:36:35:ST3_smx:INFO: # loops 1
16:36:37:ST3_smx:INFO: # loops 2
16:36:39:ST3_smx:INFO: # loops 3
16:36:40:ST3_smx:INFO: # loops 4
16:36:42:ST3_smx:INFO: Total # of broken channels: 0
16:36:42:ST3_smx:INFO: List of broken channels: []
16:36:42:ST3_smx:INFO: Total # of broken channels: 0
16:36:42:ST3_smx:INFO: List of broken channels: []
16:36:43:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
16:36:43:febtest:INFO: 1-0 | XA-000-08-002-000-004-049-01 | 40.9 | 1171.5
16:36:43:febtest:INFO: 8-1 | XA-000-08-002-000-004-149-05 | 40.9 | 1183.3
16:36:43:febtest:INFO: 10-3 | XA-000-08-002-000-004-134-02 | 31.4 | 1218.6
16:36:44:febtest:INFO: 5-4 | XA-000-08-002-000-004-127-04 | 60.0 | 1153.7
16:36:44:febtest:INFO: 12-5 | XA-000-08-002-000-004-141-02 | 37.7 | 1201.0
16:36:44:febtest:INFO: 7-6 | XA-000-08-002-000-004-050-01 | 47.3 | 1177.4
16:36:44:febtest:INFO: 14-7 | XA-000-08-002-000-004-123-04 | 37.7 | 1212.7
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_02_01-16_35_10
OPERATOR : Alois Alzheimer
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 1046
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.450', '1.8910', '1.850', '2.2770', '2.450', '0.0002', '1.850', '0.0001']
VI_after__Init : ['0', '0', '0', '0', '0', '0']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
16:36:58:ST3_Shared:INFO: Listo of operators:Robert V.;
16:36:58:ST3_Shared:INFO: Listo of operators:Robert V.; Irakli K.;
16:37:00:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1046/TestDate_2024_02_01-16_35_10/