
FEB_1050 08.04.24 09:02:45
TextEdit.txt
09:02:45:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:02:45:ST3_Shared:INFO: FEB-Sensor 09:02:45:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:02:46:ST3_ModuleSelector:INFO: L4UL201031 M4UL2T3010313B2 62 B 09:02:46:ST3_ModuleSelector:INFO: 25403 09:02:47:febtest:INFO: Testing FEB with SN 1050 09:02:50:smx_tester:INFO: Scanning setup 09:02:50:elinks:INFO: Disabling clock on downlink 0 09:02:50:elinks:INFO: Disabling clock on downlink 1 09:02:50:elinks:INFO: Disabling clock on downlink 2 09:02:50:elinks:INFO: Disabling clock on downlink 3 09:02:50:elinks:INFO: Disabling clock on downlink 4 09:02:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:02:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:02:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:02:50:elinks:INFO: Disabling clock on downlink 0 09:02:50:elinks:INFO: Disabling clock on downlink 1 09:02:50:elinks:INFO: Disabling clock on downlink 2 09:02:50:elinks:INFO: Disabling clock on downlink 3 09:02:50:elinks:INFO: Disabling clock on downlink 4 09:02:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:02:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:02:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 09:02:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 09:02:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 09:02:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 09:02:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 09:02:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 09:02:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 09:02:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 09:02:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 09:02:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 09:02:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 09:02:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 09:02:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 09:02:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 09:02:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 09:02:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 09:02:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:02:50:elinks:INFO: Disabling clock on downlink 0 09:02:50:elinks:INFO: Disabling clock on downlink 1 09:02:50:elinks:INFO: Disabling clock on downlink 2 09:02:50:elinks:INFO: Disabling clock on downlink 3 09:02:50:elinks:INFO: Disabling clock on downlink 4 09:02:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:02:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:02:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:02:50:elinks:INFO: Disabling clock on downlink 0 09:02:50:elinks:INFO: Disabling clock on downlink 1 09:02:50:elinks:INFO: Disabling clock on downlink 2 09:02:50:elinks:INFO: Disabling clock on downlink 3 09:02:50:elinks:INFO: Disabling clock on downlink 4 09:02:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:02:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:02:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:02:50:elinks:INFO: Disabling clock on downlink 0 09:02:50:elinks:INFO: Disabling clock on downlink 1 09:02:50:elinks:INFO: Disabling clock on downlink 2 09:02:50:elinks:INFO: Disabling clock on downlink 3 09:02:50:elinks:INFO: Disabling clock on downlink 4 09:02:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:02:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:02:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:02:50:setup_element:INFO: Scanning clock phase 09:02:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:02:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:02:51:setup_element:INFO: Clock phase scan results for group 0, downlink 1 09:02:51:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________________ Clock Delay: 40 09:02:51:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________________ Clock Delay: 40 09:02:51:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 09:02:51:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 09:02:51:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXX___ Clock Delay: 33 09:02:51:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXX___ Clock Delay: 33 09:02:51:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXX___ Clock Delay: 33 09:02:51:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXX___ Clock Delay: 33 09:02:51:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXX____ Clock Delay: 32 09:02:51:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXX____ Clock Delay: 32 09:02:51:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:02:51:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:02:51:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 09:02:51:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 09:02:51:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 09:02:51:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 09:02:51:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1 09:02:51:setup_element:INFO: Scanning data phases 09:02:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:02:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:02:56:setup_element:INFO: Data phase scan results for group 0, downlink 1 09:02:56:setup_element:INFO: Eye window for uplink 0 : ________XXXXX___________________________ Data delay found: 30 09:02:56:setup_element:INFO: Eye window for uplink 1 : ___XXXXX________________________________ Data delay found: 25 09:02:56:setup_element:INFO: Eye window for uplink 2 : ______XXXXX_____________________________ Data delay found: 28 09:02:56:setup_element:INFO: Eye window for uplink 3 : ___XXXXX________________________________ Data delay found: 25 09:02:56:setup_element:INFO: Eye window for uplink 4 : __XXXXX_________________________________ Data delay found: 24 09:02:56:setup_element:INFO: Eye window for uplink 5 : XXX__________________________________XXX Data delay found: 19 09:02:56:setup_element:INFO: Eye window for uplink 6 : X___________________________________XXXX Data delay found: 18 09:02:56:setup_element:INFO: Eye window for uplink 7 : ________________________________XXXXX___ Data delay found: 14 09:02:56:setup_element:INFO: Eye window for uplink 8 : _______________________XXXXX____________ Data delay found: 5 09:02:56:setup_element:INFO: Eye window for uplink 9 : ____________________________XXXXX_______ Data delay found: 10 09:02:56:setup_element:INFO: Eye window for uplink 10: ____________________XXXXXXXXXXXXXXXXXXXX Data delay found: 9 09:02:56:setup_element:INFO: Eye window for uplink 11: ____________________XXXXXXXXXXXXXXXXXXXX Data delay found: 9 09:02:56:setup_element:INFO: Eye window for uplink 12: __________________________XXXXXX________ Data delay found: 8 09:02:56:setup_element:INFO: Eye window for uplink 13: _____________________________XXXXXX_____ Data delay found: 11 09:02:56:setup_element:INFO: Eye window for uplink 14: __________________________XXXXX_________ Data delay found: 8 09:02:56:setup_element:INFO: Eye window for uplink 15: ____________________________XXXXX_______ Data delay found: 10 09:02:56:setup_element:INFO: Setting the data phase to 30 for uplink 0 09:02:56:setup_element:INFO: Setting the data phase to 25 for uplink 1 09:02:56:setup_element:INFO: Setting the data phase to 28 for uplink 2 09:02:56:setup_element:INFO: Setting the data phase to 25 for uplink 3 09:02:56:setup_element:INFO: Setting the data phase to 24 for uplink 4 09:02:56:setup_element:INFO: Setting the data phase to 19 for uplink 5 09:02:56:setup_element:INFO: Setting the data phase to 18 for uplink 6 09:02:56:setup_element:INFO: Setting the data phase to 14 for uplink 7 09:02:56:setup_element:INFO: Setting the data phase to 5 for uplink 8 09:02:56:setup_element:INFO: Setting the data phase to 10 for uplink 9 09:02:56:setup_element:INFO: Setting the data phase to 9 for uplink 10 09:02:56:setup_element:INFO: Setting the data phase to 9 for uplink 11 09:02:56:setup_element:INFO: Setting the data phase to 8 for uplink 12 09:02:56:setup_element:INFO: Setting the data phase to 11 for uplink 13 09:02:56:setup_element:INFO: Setting the data phase to 8 for uplink 14 09:02:56:setup_element:INFO: Setting the data phase to 10 for uplink 15 09:02:56:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 33 Window Length: 70 Eye Windows: Uplink 0: ________________________________________________________________________________ Uplink 1: ________________________________________________________________________________ Uplink 2: _______________________________________________________________________XXXXXXXX_ Uplink 3: _______________________________________________________________________XXXXXXXX_ Uplink 4: ______________________________________________________________________XXXXXXX___ Uplink 5: ______________________________________________________________________XXXXXXX___ Uplink 6: _______________________________________________________________________XXXXXX___ Uplink 7: _______________________________________________________________________XXXXXX___ Uplink 8: _____________________________________________________________________XXXXXXX____ Uplink 9: _____________________________________________________________________XXXXXXX____ Uplink 10: _____________________________________________________________________XXXXXXXX___ Uplink 11: _____________________________________________________________________XXXXXXXX___ Uplink 12: ______________________________________________________________________XXXXXXX___ Uplink 13: ______________________________________________________________________XXXXXXX___ Uplink 14: ______________________________________________________________________XXXXXXXX__ Uplink 15: ______________________________________________________________________XXXXXXXX__ Data phase characteristics: Uplink 0: Optimal Phase: 30 Window Length: 35 Eye Window: ________XXXXX___________________________ Uplink 1: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 2: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 3: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 4: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 5: Optimal Phase: 19 Window Length: 34 Eye Window: XXX__________________________________XXX Uplink 6: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 7: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ Uplink 8: Optimal Phase: 5 Window Length: 35 Eye Window: _______________________XXXXX____________ Uplink 9: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ Uplink 10: Optimal Phase: 9 Window Length: 20 Eye Window: ____________________XXXXXXXXXXXXXXXXXXXX Uplink 11: Optimal Phase: 9 Window Length: 20 Eye Window: ____________________XXXXXXXXXXXXXXXXXXXX Uplink 12: Optimal Phase: 8 Window Length: 34 Eye Window: __________________________XXXXXX________ Uplink 13: Optimal Phase: 11 Window Length: 34 Eye Window: _____________________________XXXXXX_____ Uplink 14: Optimal Phase: 8 Window Length: 35 Eye Window: __________________________XXXXX_________ Uplink 15: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ ] 09:02:56:setup_element:INFO: Beginning SMX ASICs map scan 09:02:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:02:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:02:56:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 09:02:56:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 09:02:56:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 09:02:56:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 09:02:56:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 09:02:56:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 09:02:56:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 09:02:56:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 09:02:56:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 09:02:57:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 09:02:57:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 09:02:57:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 09:02:57:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 09:02:57:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 09:02:57:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 09:02:57:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 09:02:57:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 09:02:57:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 09:02:57:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 09:02:59:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0) ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9) ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2) ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4) ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13) ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6) ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15) Clock Phase Characteristic: Optimal Phase: 33 Window Length: 70 Eye Windows: Uplink 0: ________________________________________________________________________________ Uplink 1: ________________________________________________________________________________ Uplink 2: _______________________________________________________________________XXXXXXXX_ Uplink 3: _______________________________________________________________________XXXXXXXX_ Uplink 4: ______________________________________________________________________XXXXXXX___ Uplink 5: ______________________________________________________________________XXXXXXX___ Uplink 6: _______________________________________________________________________XXXXXX___ Uplink 7: _______________________________________________________________________XXXXXX___ Uplink 8: _____________________________________________________________________XXXXXXX____ Uplink 9: _____________________________________________________________________XXXXXXX____ Uplink 10: _____________________________________________________________________XXXXXXXX___ Uplink 11: _____________________________________________________________________XXXXXXXX___ Uplink 12: ______________________________________________________________________XXXXXXX___ Uplink 13: ______________________________________________________________________XXXXXXX___ Uplink 14: ______________________________________________________________________XXXXXXXX__ Uplink 15: ______________________________________________________________________XXXXXXXX__ Data phase characteristics: Uplink 0: Optimal Phase: 30 Window Length: 35 Eye Window: ________XXXXX___________________________ Uplink 1: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 2: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 3: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 4: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 5: Optimal Phase: 19 Window Length: 34 Eye Window: XXX__________________________________XXX Uplink 6: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 7: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ Uplink 8: Optimal Phase: 5 Window Length: 35 Eye Window: _______________________XXXXX____________ Uplink 9: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ Uplink 10: Optimal Phase: 9 Window Length: 20 Eye Window: ____________________XXXXXXXXXXXXXXXXXXXX Uplink 11: Optimal Phase: 9 Window Length: 20 Eye Window: ____________________XXXXXXXXXXXXXXXXXXXX Uplink 12: Optimal Phase: 8 Window Length: 34 Eye Window: __________________________XXXXXX________ Uplink 13: Optimal Phase: 11 Window Length: 34 Eye Window: _____________________________XXXXXX_____ Uplink 14: Optimal Phase: 8 Window Length: 35 Eye Window: __________________________XXXXX_________ Uplink 15: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ 09:02:59:setup_element:INFO: Performing Elink synchronization 09:02:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:02:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:02:59:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 09:02:59:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 09:02:59:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 09:02:59:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 09:02:59:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)] FEB type: A FEB_A: 1 FEB_B: 0 09:03:00:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:03:00:febtest:INFO: 01-00 | XA-000-08-002-000-001-069-06 | 50.4 | 1159.7 09:03:00:febtest:INFO: 08-01 | XA-000-08-002-000-001-010-03 | 50.4 | 1147.8 09:03:01:febtest:INFO: 03-02 | XA-000-08-002-000-001-026-04 | 60.0 | 1130.0 09:03:01:febtest:INFO: 10-03 | XA-000-08-002-000-001-012-03 | 53.6 | 1153.7 09:03:01:febtest:INFO: 05-04 | XA-000-08-002-000-001-047-13 | 44.1 | 1189.2 09:03:01:febtest:INFO: 12-05 | XA-000-08-002-000-001-013-03 | 47.3 | 1171.5 09:03:02:febtest:INFO: 07-06 | XA-000-08-002-000-001-046-13 | 50.4 | 1153.7 09:03:02:febtest:INFO: 14-07 | XA-000-08-002-000-001-138-09 | 40.9 | 1201.0 09:03:02:ST3_smx:INFO: Configuring SMX FAST 09:03:04:ST3_smx:INFO: chip: 1-0 53.612520 C 1147.806000 mV 09:03:04:ST3_smx:INFO: Electrons 09:03:04:ST3_smx:INFO: # loops 0 09:03:06:ST3_smx:INFO: # loops 1 09:03:08:ST3_smx:INFO: # loops 2 09:03:10:ST3_smx:INFO: # loops 3 09:03:11:ST3_smx:INFO: # loops 4 09:03:13:ST3_smx:INFO: Total # of broken channels: 0 09:03:13:ST3_smx:INFO: List of broken channels: [] 09:03:13:ST3_smx:INFO: Total # of broken channels: 0 09:03:13:ST3_smx:INFO: List of broken channels: [] 09:03:14:ST3_smx:INFO: Configuring SMX FAST 09:03:16:ST3_smx:INFO: chip: 8-1 53.612520 C 1153.732915 mV 09:03:16:ST3_smx:INFO: Electrons 09:03:16:ST3_smx:INFO: # loops 0 09:03:18:ST3_smx:INFO: # loops 1 09:03:19:ST3_smx:INFO: # loops 2 09:03:21:ST3_smx:INFO: # loops 3 09:03:23:ST3_smx:INFO: # loops 4 09:03:24:ST3_smx:INFO: Total # of broken channels: 0 09:03:24:ST3_smx:INFO: List of broken channels: [] 09:03:24:ST3_smx:INFO: Total # of broken channels: 0 09:03:24:ST3_smx:INFO: List of broken channels: [] 09:03:25:ST3_smx:INFO: Configuring SMX FAST 09:03:27:ST3_smx:INFO: chip: 3-2 59.984250 C 1129.995435 mV 09:03:27:ST3_smx:INFO: Electrons 09:03:27:ST3_smx:INFO: # loops 0 09:03:29:ST3_smx:INFO: # loops 1 09:03:31:ST3_smx:INFO: # loops 2 09:03:32:ST3_smx:INFO: # loops 3 09:03:34:ST3_smx:INFO: # loops 4 09:03:36:ST3_smx:INFO: Total # of broken channels: 0 09:03:36:ST3_smx:INFO: List of broken channels: [] 09:03:36:ST3_smx:INFO: Total # of broken channels: 0 09:03:36:ST3_smx:INFO: List of broken channels: [] 09:03:37:ST3_smx:INFO: Configuring SMX FAST 09:03:39:ST3_smx:INFO: chip: 10-3 56.797143 C 1147.806000 mV 09:03:39:ST3_smx:INFO: Electrons 09:03:39:ST3_smx:INFO: # loops 0 09:03:40:ST3_smx:INFO: # loops 1 09:03:42:ST3_smx:INFO: # loops 2 09:03:44:ST3_smx:INFO: # loops 3 09:03:45:ST3_smx:INFO: # loops 4 09:03:47:ST3_smx:INFO: Total # of broken channels: 0 09:03:47:ST3_smx:INFO: List of broken channels: [] 09:03:47:ST3_smx:INFO: Total # of broken channels: 0 09:03:47:ST3_smx:INFO: List of broken channels: [] 09:03:48:ST3_smx:INFO: Configuring SMX FAST 09:03:50:ST3_smx:INFO: chip: 5-4 53.612520 C 1171.483840 mV 09:03:50:ST3_smx:INFO: Electrons 09:03:50:ST3_smx:INFO: # loops 0 09:03:51:ST3_smx:INFO: # loops 1 09:03:53:ST3_smx:INFO: # loops 2 09:03:55:ST3_smx:INFO: # loops 3 09:03:56:ST3_smx:INFO: # loops 4 09:03:58:ST3_smx:INFO: Total # of broken channels: 0 09:03:58:ST3_smx:INFO: List of broken channels: [] 09:03:58:ST3_smx:INFO: Total # of broken channels: 0 09:03:58:ST3_smx:INFO: List of broken channels: [] 09:03:59:ST3_smx:INFO: Configuring SMX FAST 09:04:01:ST3_smx:INFO: chip: 12-5 53.612520 C 1165.571835 mV 09:04:01:ST3_smx:INFO: Electrons 09:04:01:ST3_smx:INFO: # loops 0 09:04:03:ST3_smx:INFO: # loops 1 09:04:04:ST3_smx:INFO: # loops 2 09:04:06:ST3_smx:INFO: # loops 3 09:04:07:ST3_smx:INFO: # loops 4 09:04:09:ST3_smx:INFO: Total # of broken channels: 0 09:04:09:ST3_smx:INFO: List of broken channels: [] 09:04:09:ST3_smx:INFO: Total # of broken channels: 0 09:04:09:ST3_smx:INFO: List of broken channels: [] 09:04:10:ST3_smx:INFO: Configuring SMX FAST 09:04:12:ST3_smx:INFO: chip: 7-6 59.984250 C 1135.937260 mV 09:04:12:ST3_smx:INFO: Electrons 09:04:12:ST3_smx:INFO: # loops 0 09:04:14:ST3_smx:INFO: # loops 1 09:04:15:ST3_smx:INFO: # loops 2 09:04:17:ST3_smx:INFO: # loops 3 09:04:18:ST3_smx:INFO: # loops 4 09:04:20:ST3_smx:INFO: Total # of broken channels: 0 09:04:20:ST3_smx:INFO: List of broken channels: [] 09:04:20:ST3_smx:INFO: Total # of broken channels: 1 09:04:20:ST3_smx:INFO: List of broken channels: [0] 09:04:21:ST3_smx:INFO: Configuring SMX FAST 09:04:23:ST3_smx:INFO: chip: 14-7 53.612520 C 1177.390875 mV 09:04:23:ST3_smx:INFO: Electrons 09:04:23:ST3_smx:INFO: # loops 0 09:04:25:ST3_smx:INFO: # loops 1 09:04:26:ST3_smx:INFO: # loops 2 09:04:28:ST3_smx:INFO: # loops 3 09:04:30:ST3_smx:INFO: # loops 4 09:04:31:ST3_smx:INFO: Total # of broken channels: 0 09:04:31:ST3_smx:INFO: List of broken channels: [] 09:04:31:ST3_smx:INFO: Total # of broken channels: 0 09:04:31:ST3_smx:INFO: List of broken channels: [] 09:04:32:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:04:32:febtest:INFO: 01-00 | XA-000-08-002-000-001-069-06 | 60.0 | 1147.8 09:04:33:febtest:INFO: 08-01 | XA-000-08-002-000-001-010-03 | 56.8 | 1153.7 09:04:33:febtest:INFO: 03-02 | XA-000-08-002-000-001-026-04 | 63.2 | 1130.0 09:04:33:febtest:INFO: 10-03 | XA-000-08-002-000-001-012-03 | 60.0 | 1147.8 09:04:33:febtest:INFO: 05-04 | XA-000-08-002-000-001-047-13 | 56.8 | 1171.5 09:04:34:febtest:INFO: 12-05 | XA-000-08-002-000-001-013-03 | 56.8 | 1159.7 09:04:34:febtest:INFO: 07-06 | XA-000-08-002-000-001-046-13 | 63.2 | 1135.9 09:04:34:febtest:INFO: 14-07 | XA-000-08-002-000-001-138-09 | 56.8 | 1177.4 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 24_04_08-09_02_45 OPERATOR : Olga B.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : L4UL201031 M4UL2T3010313B2 62 B FEB_SN : 1050 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- SENSOR_ID: 25403 MODULE_NAME: L4UL201031 M4UL2T3010313B2 62 B MODULE_TYPE: MODULE_LADDER: L4UL201031 MODULE_MODULE: M4UL2T3010313B2 MODULE_SIZE: 62 MODULE_GRADE: B --------------------------------------- VI_before_Init : ['2.450', '1.9250', '1.850', '0.4708', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '2.0150', '1.850', '0.5860', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '2.0110', '1.850', '0.3281', '0.000', '0.0000', '0.000', '0.0000']