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FEB_1051 19.01.24 09:52:55
TextEdit.txt
08:32:13:febtest:INFO: FEB 8-2 selected
08:32:13:smx_tester:INFO: Setting Elink clock mode to 160 MHz
08:32:18:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:32:18:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
08:32:18:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:32:35:ST3_ModuleSelector:INFO: L4UL401032 M4UL4T1010321B2 42 C
08:32:35:ST3_ModuleSelector:INFO: 10182
08:32:35:febtest:INFO: Testing FEB with SN 2060
08:32:36:smx_tester:INFO: Scanning setup
08:32:36:elinks:INFO: Disabling clock on downlink 0
08:32:36:elinks:INFO: Disabling clock on downlink 1
08:32:36:elinks:INFO: Disabling clock on downlink 2
08:32:36:elinks:INFO: Disabling clock on downlink 3
08:32:36:elinks:INFO: Disabling clock on downlink 4
08:32:36:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:32:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:32:37:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
08:32:37:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 1
08:32:37:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 2
08:32:37:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 3
08:32:37:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 4
08:32:37:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 5
08:32:37:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 6
08:32:37:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 7
08:32:37:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 8
08:32:37:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 9
08:32:37:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 10
08:32:37:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 11
08:32:37:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 12
08:32:37:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 13
08:32:37:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 14
08:32:37:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 15
08:32:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:32:37:elinks:INFO: Disabling clock on downlink 0
08:32:37:elinks:INFO: Disabling clock on downlink 1
08:32:37:elinks:INFO: Disabling clock on downlink 2
08:32:37:elinks:INFO: Disabling clock on downlink 3
08:32:37:elinks:INFO: Disabling clock on downlink 4
08:32:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:32:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:32:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:32:37:elinks:INFO: Disabling clock on downlink 0
08:32:37:elinks:INFO: Disabling clock on downlink 1
08:32:37:elinks:INFO: Disabling clock on downlink 2
08:32:37:elinks:INFO: Disabling clock on downlink 3
08:32:37:elinks:INFO: Disabling clock on downlink 4
08:32:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:32:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:32:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:32:37:elinks:INFO: Disabling clock on downlink 0
08:32:37:elinks:INFO: Disabling clock on downlink 1
08:32:37:elinks:INFO: Disabling clock on downlink 2
08:32:37:elinks:INFO: Disabling clock on downlink 3
08:32:37:elinks:INFO: Disabling clock on downlink 4
08:32:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:32:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:32:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:32:37:elinks:INFO: Disabling clock on downlink 0
08:32:37:elinks:INFO: Disabling clock on downlink 1
08:32:37:elinks:INFO: Disabling clock on downlink 2
08:32:37:elinks:INFO: Disabling clock on downlink 3
08:32:37:elinks:INFO: Disabling clock on downlink 4
08:32:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:32:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:32:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:32:37:setup_element:INFO: Scanning clock phase
08:32:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:32:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
08:32:37:setup_element:INFO: Clock phase scan results for group 0, downlink 0
08:32:37:setup_element:INFO: Eye window for uplink 0 : X_________________________________________________________________________XXXXXX
Clock Delay: 37
08:32:37:setup_element:INFO: Eye window for uplink 1 : X_________________________________________________________________________XXXXXX
Clock Delay: 37
08:32:37:setup_element:INFO: Eye window for uplink 2 : X_________________________________________________________________________XXXXXX
Clock Delay: 37
08:32:37:setup_element:INFO: Eye window for uplink 3 : X_________________________________________________________________________XXXXXX
Clock Delay: 37
08:32:37:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:32:37:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:32:37:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:32:37:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:32:37:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:32:38:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:32:38:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:32:38:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:32:38:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:32:38:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:32:38:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXXXX_
Clock Delay: 35
08:32:38:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXXXX_
Clock Delay: 35
08:32:38:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 0
08:32:38:setup_element:INFO: Scanning data phases
08:32:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:32:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
08:32:43:setup_element:INFO: Data phase scan results for group 0, downlink 0
08:32:43:setup_element:INFO: Eye window for uplink 0 : __________________________________XXXXX_
Data delay found: 16
08:32:43:setup_element:INFO: Eye window for uplink 1 : ______________________________XXXXXX____
Data delay found: 12
08:32:43:setup_element:INFO: Eye window for uplink 2 : __________________________________XXXXXX
Data delay found: 16
08:32:43:setup_element:INFO: Eye window for uplink 3 : ________________________________XXXXXX__
Data delay found: 14
08:32:43:setup_element:INFO: Eye window for uplink 4 : _____________________________XXXXX______
Data delay found: 11
08:32:43:setup_element:INFO: Eye window for uplink 5 : __________________________XXXXX_________
Data delay found: 8
08:32:43:setup_element:INFO: Eye window for uplink 6 : ____________________________XXXXX_______
Data delay found: 10
08:32:43:setup_element:INFO: Eye window for uplink 7 : _________________________XXXXXX_________
Data delay found: 7
08:32:43:setup_element:INFO: Eye window for uplink 8 : ________________________________XXXX____
Data delay found: 13
08:32:43:setup_element:INFO: Eye window for uplink 9 : XX__________________________________XXXX
Data delay found: 18
08:32:43:setup_element:INFO: Eye window for uplink 10: __________________________________XXXXX_
Data delay found: 16
08:32:43:setup_element:INFO: Eye window for uplink 11: XXX__________________________________XXX
Data delay found: 19
08:32:43:setup_element:INFO: Eye window for uplink 12: __XXXXX_________________________________
Data delay found: 24
08:32:43:setup_element:INFO: Eye window for uplink 13: ____XXXXXX______________________________
Data delay found: 26
08:32:43:setup_element:INFO: Eye window for uplink 14: ______XXXX______________________________
Data delay found: 27
08:32:43:setup_element:INFO: Eye window for uplink 15: ________XXXXX___________________________
Data delay found: 30
08:32:43:setup_element:INFO: Setting the data phase to 16 for uplink 0
08:32:43:setup_element:INFO: Setting the data phase to 12 for uplink 1
08:32:43:setup_element:INFO: Setting the data phase to 16 for uplink 2
08:32:43:setup_element:INFO: Setting the data phase to 14 for uplink 3
08:32:43:setup_element:INFO: Setting the data phase to 11 for uplink 4
08:32:43:setup_element:INFO: Setting the data phase to 8 for uplink 5
08:32:43:setup_element:INFO: Setting the data phase to 10 for uplink 6
08:32:43:setup_element:INFO: Setting the data phase to 7 for uplink 7
08:32:43:setup_element:INFO: Setting the data phase to 13 for uplink 8
08:32:43:setup_element:INFO: Setting the data phase to 18 for uplink 9
08:32:43:setup_element:INFO: Setting the data phase to 16 for uplink 10
08:32:43:setup_element:INFO: Setting the data phase to 19 for uplink 11
08:32:43:setup_element:INFO: Setting the data phase to 24 for uplink 12
08:32:43:setup_element:INFO: Setting the data phase to 26 for uplink 13
08:32:43:setup_element:INFO: Setting the data phase to 27 for uplink 14
08:32:43:setup_element:INFO: Setting the data phase to 30 for uplink 15
08:32:43:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 69
Eye Windows:
Uplink 0: X_________________________________________________________________________XXXXXX
Uplink 1: X_________________________________________________________________________XXXXXX
Uplink 2: X_________________________________________________________________________XXXXXX
Uplink 3: X_________________________________________________________________________XXXXXX
Uplink 4: ______________________________________________________________________XXXXXXXXX_
Uplink 5: ______________________________________________________________________XXXXXXXXX_
Uplink 6: ________________________________________________________________________XXXXXXX_
Uplink 7: ________________________________________________________________________XXXXXXX_
Uplink 8: _______________________________________________________________________XXXXXXX__
Uplink 9: _______________________________________________________________________XXXXXXX__
Uplink 10: ______________________________________________________________________XXXXXXXX__
Uplink 11: ______________________________________________________________________XXXXXXXX__
Uplink 12: ________________________________________________________________________XXXXXXXX
Uplink 13: ________________________________________________________________________XXXXXXXX
Uplink 14: _________________________________________________________________________XXXXXX_
Uplink 15: _________________________________________________________________________XXXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 1:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 2:
Optimal Phase: 16
Window Length: 34
Eye Window: __________________________________XXXXXX
Uplink 3:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 4:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 5:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 6:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 7:
Optimal Phase: 7
Window Length: 34
Eye Window: _________________________XXXXXX_________
Uplink 8:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 9:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 10:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 11:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 12:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 13:
Optimal Phase: 26
Window Length: 34
Eye Window: ____XXXXXX______________________________
Uplink 14:
Optimal Phase: 27
Window Length: 36
Eye Window: ______XXXX______________________________
Uplink 15:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
]
08:32:43:setup_element:INFO: Beginning SMX ASICs map scan
08:32:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:32:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
08:32:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
08:32:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
08:32:43:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:32:43:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 7
08:32:43:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 6
08:32:43:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 14
08:32:43:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 15
08:32:43:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 5
08:32:43:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 4
08:32:43:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 12
08:32:43:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 13
08:32:43:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 3
08:32:43:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 2
08:32:44:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 10
08:32:44:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 11
08:32:44:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 1
08:32:44:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 0
08:32:44:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 8
08:32:44:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 9
08:32:45:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x1: (ASIC uplink, uplink): (0, 14), (1, 15)
ASIC address 0x2: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x3: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x4: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x5: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x6: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x7: (ASIC uplink, uplink): (0, 8), (1, 9)
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 69
Eye Windows:
Uplink 0: X_________________________________________________________________________XXXXXX
Uplink 1: X_________________________________________________________________________XXXXXX
Uplink 2: X_________________________________________________________________________XXXXXX
Uplink 3: X_________________________________________________________________________XXXXXX
Uplink 4: ______________________________________________________________________XXXXXXXXX_
Uplink 5: ______________________________________________________________________XXXXXXXXX_
Uplink 6: ________________________________________________________________________XXXXXXX_
Uplink 7: ________________________________________________________________________XXXXXXX_
Uplink 8: _______________________________________________________________________XXXXXXX__
Uplink 9: _______________________________________________________________________XXXXXXX__
Uplink 10: ______________________________________________________________________XXXXXXXX__
Uplink 11: ______________________________________________________________________XXXXXXXX__
Uplink 12: ________________________________________________________________________XXXXXXXX
Uplink 13: ________________________________________________________________________XXXXXXXX
Uplink 14: _________________________________________________________________________XXXXXX_
Uplink 15: _________________________________________________________________________XXXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 1:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 2:
Optimal Phase: 16
Window Length: 34
Eye Window: __________________________________XXXXXX
Uplink 3:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 4:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 5:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 6:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 7:
Optimal Phase: 7
Window Length: 34
Eye Window: _________________________XXXXXX_________
Uplink 8:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 9:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 10:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 11:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 12:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 13:
Optimal Phase: 26
Window Length: 34
Eye Window: ____XXXXXX______________________________
Uplink 14:
Optimal Phase: 27
Window Length: 36
Eye Window: ______XXXX______________________________
Uplink 15:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
08:32:45:setup_element:INFO: Performing Elink synchronization
08:32:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:32:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
08:32:45:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
08:32:45:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
08:32:45:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
08:32:45:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:32:45:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 0 | 0 | [7] | [(0, 7), (1, 6)]
1 | [0] | 0 | 0 | [14] | [(0, 14), (1, 15)]
2 | [0] | 0 | 0 | [5] | [(0, 5), (1, 4)]
3 | [0] | 0 | 0 | [12] | [(0, 12), (1, 13)]
4 | [0] | 0 | 0 | [3] | [(0, 3), (1, 2)]
5 | [0] | 0 | 0 | [10] | [(0, 10), (1, 11)]
6 | [0] | 0 | 0 | [1] | [(0, 1), (1, 0)]
7 | [0] | 0 | 0 | [8] | [(0, 8), (1, 9)]
08:32:46:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
08:32:46:febtest:INFO: 7-0 | XA-000-08-002-000-005-241-03 | 37.7 | 1171.5
08:32:46:febtest:INFO: 14-1 | XA-000-08-002-000-001-168-07 | 31.4 | 1201.0
08:32:47:febtest:INFO: 5-2 | XA-000-08-002-000-001-163-07 | 31.4 | 1201.0
08:32:47:febtest:INFO: 12-3 | XA-000-08-002-000-001-166-07 | 53.6 | 1124.0
08:32:47:febtest:INFO: 3-4 | XA-000-08-002-000-005-202-10 | 34.6 | 1177.4
08:32:47:febtest:INFO: 10-5 | XA-000-08-002-000-001-144-14 | 25.1 | 1218.6
08:32:47:febtest:INFO: 1-6 | XA-000-08-002-000-005-188-06 | 28.2 | 1206.9
08:32:48:febtest:INFO: 8-7 | XA-000-08-002-000-001-167-07 | 37.7 | 1183.3
08:32:48:ST3_smx:INFO: Configuring SMX FAST
08:32:50:ST3_smx:INFO: chip: 7-0 37.726682 C 1177.390875 mV
08:32:50:ST3_smx:INFO: Electrons
08:32:50:ST3_smx:INFO: # loops 0
08:32:52:ST3_smx:INFO: # loops 1
08:32:53:ST3_smx:INFO: # loops 2
08:32:55:ST3_smx:INFO: # loops 3
08:32:57:ST3_smx:INFO: # loops 4
08:32:58:ST3_smx:INFO: Total # of broken channels: 0
08:32:58:ST3_smx:INFO: List of broken channels: []
08:32:58:ST3_smx:INFO: Total # of broken channels: 1
08:32:58:ST3_smx:INFO: List of broken channels: [126]
08:32:59:ST3_smx:INFO: Configuring SMX FAST
08:33:01:ST3_smx:INFO: chip: 14-1 34.556970 C 1189.190035 mV
08:33:01:ST3_smx:INFO: Electrons
08:33:01:ST3_smx:INFO: # loops 0
08:33:02:ST3_smx:INFO: # loops 1
08:33:04:ST3_smx:INFO: # loops 2
08:33:05:ST3_smx:INFO: # loops 3
08:33:07:ST3_smx:INFO: # loops 4
08:33:09:ST3_smx:INFO: Total # of broken channels: 0
08:33:09:ST3_smx:INFO: List of broken channels: []
08:33:09:ST3_smx:INFO: Total # of broken channels: 0
08:33:09:ST3_smx:INFO: List of broken channels: []
08:33:09:ST3_smx:INFO: Configuring SMX FAST
08:33:11:ST3_smx:INFO: chip: 5-2 40.898880 C 1177.390875 mV
08:33:11:ST3_smx:INFO: Electrons
08:33:11:ST3_smx:INFO: # loops 0
08:33:13:ST3_smx:INFO: # loops 1
08:33:14:ST3_smx:INFO: # loops 2
08:33:16:ST3_smx:INFO: # loops 3
08:33:18:ST3_smx:INFO: # loops 4
08:33:19:ST3_smx:INFO: Total # of broken channels: 0
08:33:19:ST3_smx:INFO: List of broken channels: []
08:33:19:ST3_smx:INFO: Total # of broken channels: 0
08:33:19:ST3_smx:INFO: List of broken channels: []
08:33:19:ST3_smx:INFO: Configuring SMX FAST
08:33:21:ST3_smx:INFO: chip: 12-3 63.173842 C 1100.211760 mV
08:33:21:ST3_smx:INFO: Electrons
08:33:21:ST3_smx:INFO: # loops 0
08:33:23:ST3_smx:INFO: # loops 1
08:33:25:ST3_smx:INFO: # loops 2
08:33:26:ST3_smx:INFO: # loops 3
08:33:28:ST3_smx:INFO: # loops 4
08:33:30:ST3_smx:INFO: Total # of broken channels: 0
08:33:30:ST3_smx:INFO: List of broken channels: []
08:33:30:ST3_smx:INFO: Total # of broken channels: 1
08:33:30:ST3_smx:INFO: List of broken channels: [5]
08:33:30:ST3_smx:INFO: Configuring SMX FAST
08:33:32:ST3_smx:INFO: chip: 3-4 37.726682 C 1183.292940 mV
08:33:32:ST3_smx:INFO: Electrons
08:33:32:ST3_smx:INFO: # loops 0
08:33:34:ST3_smx:INFO: # loops 1
08:33:35:ST3_smx:INFO: # loops 2
08:33:37:ST3_smx:INFO: # loops 3
08:33:38:ST3_smx:INFO: # loops 4
08:33:40:ST3_smx:INFO: Total # of broken channels: 0
08:33:40:ST3_smx:INFO: List of broken channels: []
08:33:40:ST3_smx:INFO: Total # of broken channels: 3
08:33:40:ST3_smx:INFO: List of broken channels: [5, 9, 13]
08:33:40:ST3_smx:INFO: Configuring SMX FAST
08:33:42:ST3_smx:INFO: chip: 10-5 37.726682 C 1189.190035 mV
08:33:42:ST3_smx:INFO: Electrons
08:33:42:ST3_smx:INFO: # loops 0
08:33:44:ST3_smx:INFO: # loops 1
08:33:46:ST3_smx:INFO: # loops 2
08:33:47:ST3_smx:INFO: # loops 3
08:33:49:ST3_smx:INFO: # loops 4
08:33:50:ST3_smx:INFO: Total # of broken channels: 0
08:33:50:ST3_smx:INFO: List of broken channels: []
08:33:50:ST3_smx:INFO: Total # of broken channels: 8
08:33:50:ST3_smx:INFO: List of broken channels: [5, 7, 9, 11, 17, 21, 23, 31]
08:33:51:ST3_smx:INFO: Configuring SMX FAST
08:33:53:ST3_smx:INFO: chip: 1-6 37.726682 C 1195.082160 mV
08:33:53:ST3_smx:INFO: Electrons
08:33:53:ST3_smx:INFO: # loops 0
08:33:54:ST3_smx:INFO: # loops 1
08:33:56:ST3_smx:INFO: # loops 2
08:33:58:ST3_smx:INFO: # loops 3
08:33:59:ST3_smx:INFO: # loops 4
08:34:01:ST3_smx:INFO: Total # of broken channels: 0
08:34:01:ST3_smx:INFO: List of broken channels: []
08:34:01:ST3_smx:INFO: Total # of broken channels: 0
08:34:01:ST3_smx:INFO: List of broken channels: []
08:34:01:ST3_smx:INFO: Configuring SMX FAST
08:34:03:ST3_smx:INFO: chip: 8-7 40.898880 C 1177.390875 mV
08:34:03:ST3_smx:INFO: Electrons
08:34:03:ST3_smx:INFO: # loops 0
08:34:05:ST3_smx:INFO: # loops 1
08:34:06:ST3_smx:INFO: # loops 2
08:34:08:ST3_smx:INFO: # loops 3
08:34:10:ST3_smx:INFO: # loops 4
08:34:11:ST3_smx:INFO: Total # of broken channels: 1
08:34:11:ST3_smx:INFO: List of broken channels: [2]
08:34:11:ST3_smx:INFO: Total # of broken channels: 8
08:34:11:ST3_smx:INFO: List of broken channels: [0, 2, 4, 6, 8, 10, 12, 14]
08:34:12:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
08:34:12:febtest:INFO: 7-0 | XA-000-08-002-000-005-241-03 | 44.1 | 1177.4
08:34:12:febtest:INFO: 14-1 | XA-000-08-002-000-001-168-07 | 37.7 | 1189.2
08:34:12:febtest:INFO: 5-2 | XA-000-08-002-000-001-163-07 | 44.1 | 1177.4
08:34:13:febtest:INFO: 12-3 | XA-000-08-002-000-001-166-07 | 66.4 | 1094.2
08:34:13:febtest:INFO: 3-4 | XA-000-08-002-000-005-202-10 | 37.7 | 1183.3
08:34:13:febtest:INFO: 10-5 | XA-000-08-002-000-001-144-14 | 37.7 | 1189.2
08:34:13:febtest:INFO: 1-6 | XA-000-08-002-000-005-188-06 | 37.7 | 1195.1
08:34:14:febtest:INFO: 8-7 | XA-000-08-002-000-001-167-07 | 40.9 | 1177.4
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_01_19-08_32_18
OPERATOR : Olga B.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4UL401032 M4UL4T1010321B2 42 C
FEB_SN : 2060
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID: 10182
MODULE_NAME: L4UL401032 M4UL4T1010321B2 42 C
MODULE_TYPE:
MODULE_LADDER: L4UL401032
MODULE_MODULE: M4UL4T1010321B2
MODULE_SIZE: 42
MODULE_GRADE: C
---------------------------------------
VI_before_Init : ['2.450', '1.8380', '1.852', '0.4733', '7.000', '1.5770', '7.000', '1.5770']
VI_after__Init : ['2.450', '1.9930', '1.850', '0.6054', '7.000', '1.5780', '7.000', '1.5780']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
08:37:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:37:52:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
08:37:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:37:53:ST3_ModuleSelector:INFO: L4UL401032 M4UL4T1010321B2 42 C
08:37:53:ST3_ModuleSelector:INFO: 10182
08:37:53:febtest:INFO: Testing FEB with SN 2060
08:37:54:smx_tester:INFO: Scanning setup
08:37:54:elinks:INFO: Disabling clock on downlink 0
08:37:54:elinks:INFO: Disabling clock on downlink 1
08:37:54:elinks:INFO: Disabling clock on downlink 2
08:37:54:elinks:INFO: Disabling clock on downlink 3
08:37:54:elinks:INFO: Disabling clock on downlink 4
08:37:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:37:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:37:55:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
08:37:55:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 1
08:37:55:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 2
08:37:55:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 3
08:37:55:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 4
08:37:55:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 5
08:37:55:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 6
08:37:55:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 7
08:37:55:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 8
08:37:55:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 9
08:37:55:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 10
08:37:55:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 11
08:37:55:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 12
08:37:55:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 13
08:37:55:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 14
08:37:55:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 15
08:37:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:37:55:elinks:INFO: Disabling clock on downlink 0
08:37:55:elinks:INFO: Disabling clock on downlink 1
08:37:55:elinks:INFO: Disabling clock on downlink 2
08:37:55:elinks:INFO: Disabling clock on downlink 3
08:37:55:elinks:INFO: Disabling clock on downlink 4
08:37:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:37:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:37:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:37:55:elinks:INFO: Disabling clock on downlink 0
08:37:55:elinks:INFO: Disabling clock on downlink 1
08:37:55:elinks:INFO: Disabling clock on downlink 2
08:37:55:elinks:INFO: Disabling clock on downlink 3
08:37:55:elinks:INFO: Disabling clock on downlink 4
08:37:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:37:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:37:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:37:55:elinks:INFO: Disabling clock on downlink 0
08:37:55:elinks:INFO: Disabling clock on downlink 1
08:37:55:elinks:INFO: Disabling clock on downlink 2
08:37:55:elinks:INFO: Disabling clock on downlink 3
08:37:55:elinks:INFO: Disabling clock on downlink 4
08:37:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:37:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:37:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:37:55:elinks:INFO: Disabling clock on downlink 0
08:37:55:elinks:INFO: Disabling clock on downlink 1
08:37:55:elinks:INFO: Disabling clock on downlink 2
08:37:55:elinks:INFO: Disabling clock on downlink 3
08:37:55:elinks:INFO: Disabling clock on downlink 4
08:37:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:37:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:37:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:37:55:setup_element:INFO: Scanning clock phase
08:37:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:37:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
08:37:55:setup_element:INFO: Clock phase scan results for group 0, downlink 0
08:37:55:setup_element:INFO: Eye window for uplink 0 : X_________________________________________________________________________XXXXXX
Clock Delay: 37
08:37:55:setup_element:INFO: Eye window for uplink 1 : X_________________________________________________________________________XXXXXX
Clock Delay: 37
08:37:55:setup_element:INFO: Eye window for uplink 2 : X_________________________________________________________________________XXXXXX
Clock Delay: 37
08:37:55:setup_element:INFO: Eye window for uplink 3 : X_________________________________________________________________________XXXXXX
Clock Delay: 37
08:37:55:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:37:55:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:37:55:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:37:55:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:37:55:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:37:55:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
08:37:55:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:37:55:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:37:55:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:37:55:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:37:55:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXXXXX
Clock Delay: 36
08:37:55:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXXXXX
Clock Delay: 36
08:37:55:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 0
08:37:55:setup_element:INFO: Scanning data phases
08:37:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:37:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
08:38:01:setup_element:INFO: Data phase scan results for group 0, downlink 0
08:38:01:setup_element:INFO: Eye window for uplink 0 : X_________________________________XXXXX_
Data delay found: 17
08:38:01:setup_element:INFO: Eye window for uplink 1 : ______________________________XXXXXX____
Data delay found: 12
08:38:01:setup_element:INFO: Eye window for uplink 2 : X_________________________________XXXXX_
Data delay found: 17
08:38:01:setup_element:INFO: Eye window for uplink 3 : ________________________________XXXXX___
Data delay found: 14
08:38:01:setup_element:INFO: Eye window for uplink 4 : _____________________________XXXXX______
Data delay found: 11
08:38:01:setup_element:INFO: Eye window for uplink 5 : _________________________XXXXX__________
Data delay found: 7
08:38:01:setup_element:INFO: Eye window for uplink 6 : ____________________________XXXXX_______
Data delay found: 10
08:38:01:setup_element:INFO: Eye window for uplink 7 : _________________________XXXXXX_________
Data delay found: 7
08:38:01:setup_element:INFO: Eye window for uplink 8 : ________________________________XXXX____
Data delay found: 13
08:38:01:setup_element:INFO: Eye window for uplink 9 : X___________________________________XXXX
Data delay found: 18
08:38:01:setup_element:INFO: Eye window for uplink 10: __________________________________XXXXX_
Data delay found: 16
08:38:01:setup_element:INFO: Eye window for uplink 11: XXX__________________________________XXX
Data delay found: 19
08:38:01:setup_element:INFO: Eye window for uplink 12: __XXXXX_________________________________
Data delay found: 24
08:38:01:setup_element:INFO: Eye window for uplink 13: _____XXXXX______________________________
Data delay found: 27
08:38:01:setup_element:INFO: Eye window for uplink 14: _____XXXXX______________________________
Data delay found: 27
08:38:01:setup_element:INFO: Eye window for uplink 15: _______XXXXX____________________________
Data delay found: 29
08:38:01:setup_element:INFO: Setting the data phase to 17 for uplink 0
08:38:01:setup_element:INFO: Setting the data phase to 12 for uplink 1
08:38:01:setup_element:INFO: Setting the data phase to 17 for uplink 2
08:38:01:setup_element:INFO: Setting the data phase to 14 for uplink 3
08:38:01:setup_element:INFO: Setting the data phase to 11 for uplink 4
08:38:01:setup_element:INFO: Setting the data phase to 7 for uplink 5
08:38:01:setup_element:INFO: Setting the data phase to 10 for uplink 6
08:38:01:setup_element:INFO: Setting the data phase to 7 for uplink 7
08:38:01:setup_element:INFO: Setting the data phase to 13 for uplink 8
08:38:01:setup_element:INFO: Setting the data phase to 18 for uplink 9
08:38:01:setup_element:INFO: Setting the data phase to 16 for uplink 10
08:38:01:setup_element:INFO: Setting the data phase to 19 for uplink 11
08:38:01:setup_element:INFO: Setting the data phase to 24 for uplink 12
08:38:01:setup_element:INFO: Setting the data phase to 27 for uplink 13
08:38:01:setup_element:INFO: Setting the data phase to 27 for uplink 14
08:38:01:setup_element:INFO: Setting the data phase to 29 for uplink 15
08:38:01:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 69
Eye Windows:
Uplink 0: X_________________________________________________________________________XXXXXX
Uplink 1: X_________________________________________________________________________XXXXXX
Uplink 2: X_________________________________________________________________________XXXXXX
Uplink 3: X_________________________________________________________________________XXXXXX
Uplink 4: ______________________________________________________________________XXXXXXXXX_
Uplink 5: ______________________________________________________________________XXXXXXXXX_
Uplink 6: ________________________________________________________________________XXXXXXXX
Uplink 7: ________________________________________________________________________XXXXXXXX
Uplink 8: ______________________________________________________________________XXXXXXXXX_
Uplink 9: ______________________________________________________________________XXXXXXXXX_
Uplink 10: ______________________________________________________________________XXXXXXXX__
Uplink 11: ______________________________________________________________________XXXXXXXX__
Uplink 12: ________________________________________________________________________XXXXXXXX
Uplink 13: ________________________________________________________________________XXXXXXXX
Uplink 14: _________________________________________________________________________XXXXXXX
Uplink 15: _________________________________________________________________________XXXXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXX_
Uplink 1:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 2:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXX_
Uplink 3:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 4:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 5:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 6:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 7:
Optimal Phase: 7
Window Length: 34
Eye Window: _________________________XXXXXX_________
Uplink 8:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 9:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 10:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 11:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 12:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 13:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 14:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 15:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
]
08:38:01:setup_element:INFO: Beginning SMX ASICs map scan
08:38:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:38:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
08:38:01:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
08:38:01:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
08:38:01:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:38:01:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 7
08:38:01:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 6
08:38:01:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 14
08:38:01:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 15
08:38:02:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 5
08:38:02:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 4
08:38:02:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 12
08:38:02:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 13
08:38:02:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 3
08:38:02:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 2
08:38:02:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 10
08:38:02:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 11
08:38:02:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 1
08:38:02:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 0
08:38:02:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 8
08:38:02:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 9
08:38:04:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x1: (ASIC uplink, uplink): (0, 14), (1, 15)
ASIC address 0x2: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x3: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x4: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x5: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x6: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x7: (ASIC uplink, uplink): (0, 8), (1, 9)
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 69
Eye Windows:
Uplink 0: X_________________________________________________________________________XXXXXX
Uplink 1: X_________________________________________________________________________XXXXXX
Uplink 2: X_________________________________________________________________________XXXXXX
Uplink 3: X_________________________________________________________________________XXXXXX
Uplink 4: ______________________________________________________________________XXXXXXXXX_
Uplink 5: ______________________________________________________________________XXXXXXXXX_
Uplink 6: ________________________________________________________________________XXXXXXXX
Uplink 7: ________________________________________________________________________XXXXXXXX
Uplink 8: ______________________________________________________________________XXXXXXXXX_
Uplink 9: ______________________________________________________________________XXXXXXXXX_
Uplink 10: ______________________________________________________________________XXXXXXXX__
Uplink 11: ______________________________________________________________________XXXXXXXX__
Uplink 12: ________________________________________________________________________XXXXXXXX
Uplink 13: ________________________________________________________________________XXXXXXXX
Uplink 14: _________________________________________________________________________XXXXXXX
Uplink 15: _________________________________________________________________________XXXXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXX_
Uplink 1:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 2:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXX_
Uplink 3:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 4:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 5:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 6:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 7:
Optimal Phase: 7
Window Length: 34
Eye Window: _________________________XXXXXX_________
Uplink 8:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 9:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 10:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 11:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 12:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 13:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 14:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 15:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
08:38:04:setup_element:INFO: Performing Elink synchronization
08:38:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:38:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
08:38:04:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
08:38:04:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
08:38:04:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
08:38:04:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:38:04:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 0 | 0 | [7] | [(0, 7), (1, 6)]
1 | [0] | 0 | 0 | [14] | [(0, 14), (1, 15)]
2 | [0] | 0 | 0 | [5] | [(0, 5), (1, 4)]
3 | [0] | 0 | 0 | [12] | [(0, 12), (1, 13)]
4 | [0] | 0 | 0 | [3] | [(0, 3), (1, 2)]
5 | [0] | 0 | 0 | [10] | [(0, 10), (1, 11)]
6 | [0] | 0 | 0 | [1] | [(0, 1), (1, 0)]
7 | [0] | 0 | 0 | [8] | [(0, 8), (1, 9)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_0__upli_7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_14 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_1__upli_14
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_2__upli_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_12 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_3__upli_12
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4_3 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_4__upli_3
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_10 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_5__upli_10
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_6__upli_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_8 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_7__upli_8
08:38:05:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
08:38:05:febtest:INFO: 7-0 | XA-000-08-002-000-005-241-03 | 37.7 | 1171.5
08:38:06:febtest:INFO: 14-1 | XA-000-08-002-000-001-168-07 | 31.4 | 1201.0
08:38:06:febtest:INFO: 5-2 | XA-000-08-002-000-001-163-07 | 34.6 | 1201.0
08:38:06:febtest:INFO: 12-3 | XA-000-08-002-000-001-166-07 | 53.6 | 1124.0
08:38:06:febtest:INFO: 3-4 | XA-000-08-002-000-005-202-10 | 37.7 | 1177.4
08:38:06:febtest:INFO: 10-5 | XA-000-08-002-000-001-144-14 | 28.2 | 1218.6
08:38:07:febtest:INFO: 1-6 | XA-000-08-002-000-005-188-06 | 31.4 | 1206.9
08:38:07:febtest:INFO: 8-7 | XA-000-08-002-000-001-167-07 | 37.7 | 1189.2
08:38:07:ST3_smx:INFO: Configuring SMX FAST
08:38:09:ST3_smx:INFO: chip: 7-0 37.726682 C 1177.390875 mV
08:38:09:ST3_smx:INFO: Electrons
08:38:09:ST3_smx:INFO: # loops 0
08:38:11:ST3_smx:INFO: # loops 1
08:38:12:ST3_smx:INFO: # loops 2
08:38:14:ST3_smx:INFO: # loops 3
08:38:16:ST3_smx:INFO: # loops 4
08:38:17:ST3_smx:INFO: Total # of broken channels: 0
08:38:17:ST3_smx:INFO: List of broken channels: []
08:38:17:ST3_smx:INFO: Total # of broken channels: 1
08:38:17:ST3_smx:INFO: List of broken channels: [126]
08:38:18:ST3_smx:INFO: Configuring SMX FAST
08:38:20:ST3_smx:INFO: chip: 14-1 34.556970 C 1189.190035 mV
08:38:20:ST3_smx:INFO: Electrons
08:38:20:ST3_smx:INFO: # loops 0
08:38:21:ST3_smx:INFO: # loops 1
08:38:23:ST3_smx:INFO: # loops 2
08:38:24:ST3_smx:INFO: # loops 3
08:38:26:ST3_smx:INFO: # loops 4
08:38:28:ST3_smx:INFO: Total # of broken channels: 0
08:38:28:ST3_smx:INFO: List of broken channels: []
08:38:28:ST3_smx:INFO: Total # of broken channels: 0
08:38:28:ST3_smx:INFO: List of broken channels: []
08:38:28:ST3_smx:INFO: Configuring SMX FAST
08:38:30:ST3_smx:INFO: chip: 5-2 44.073563 C 1177.390875 mV
08:38:30:ST3_smx:INFO: Electrons
08:38:30:ST3_smx:INFO: # loops 0
08:38:32:ST3_smx:INFO: # loops 1
08:38:33:ST3_smx:INFO: # loops 2
08:38:35:ST3_smx:INFO: # loops 3
08:38:36:ST3_smx:INFO: # loops 4
08:38:38:ST3_smx:INFO: Total # of broken channels: 0
08:38:38:ST3_smx:INFO: List of broken channels: []
08:38:38:ST3_smx:INFO: Total # of broken channels: 0
08:38:38:ST3_smx:INFO: List of broken channels: []
08:38:38:ST3_smx:INFO: Configuring SMX FAST
08:38:40:ST3_smx:INFO: chip: 12-3 63.173842 C 1100.211760 mV
08:38:40:ST3_smx:INFO: Electrons
08:38:40:ST3_smx:INFO: # loops 0
08:38:42:ST3_smx:INFO: # loops 1
08:38:44:ST3_smx:INFO: # loops 2
08:38:45:ST3_smx:INFO: # loops 3
08:38:47:ST3_smx:INFO: # loops 4
08:38:49:ST3_smx:INFO: Total # of broken channels: 0
08:38:49:ST3_smx:INFO: List of broken channels: []
08:38:49:ST3_smx:INFO: Total # of broken channels: 0
08:38:49:ST3_smx:INFO: List of broken channels: []
08:38:49:ST3_smx:INFO: Configuring SMX FAST
08:38:51:ST3_smx:INFO: chip: 3-4 37.726682 C 1183.292940 mV
08:38:51:ST3_smx:INFO: Electrons
08:38:51:ST3_smx:INFO: # loops 0
08:38:52:ST3_smx:INFO: # loops 1
08:38:54:ST3_smx:INFO: # loops 2
08:38:56:ST3_smx:INFO: # loops 3
08:38:57:ST3_smx:INFO: # loops 4
08:38:59:ST3_smx:INFO: Total # of broken channels: 0
08:38:59:ST3_smx:INFO: List of broken channels: []
08:38:59:ST3_smx:INFO: Total # of broken channels: 2
08:38:59:ST3_smx:INFO: List of broken channels: [7, 13]
08:38:59:ST3_smx:INFO: Configuring SMX FAST
08:39:01:ST3_smx:INFO: chip: 10-5 40.898880 C 1189.190035 mV
08:39:01:ST3_smx:INFO: Electrons
08:39:01:ST3_smx:INFO: # loops 0
08:39:03:ST3_smx:INFO: # loops 1
08:39:04:ST3_smx:INFO: # loops 2
08:39:06:ST3_smx:INFO: # loops 3
08:39:08:ST3_smx:INFO: # loops 4
08:39:09:ST3_smx:INFO: Total # of broken channels: 0
08:39:09:ST3_smx:INFO: List of broken channels: []
08:39:09:ST3_smx:INFO: Total # of broken channels: 7
08:39:09:ST3_smx:INFO: List of broken channels: [5, 7, 9, 11, 17, 21, 23]
08:39:10:ST3_smx:INFO: Configuring SMX FAST
08:39:12:ST3_smx:INFO: chip: 1-6 37.726682 C 1195.082160 mV
08:39:12:ST3_smx:INFO: Electrons
08:39:12:ST3_smx:INFO: # loops 0
08:39:13:ST3_smx:INFO: # loops 1
08:39:15:ST3_smx:INFO: # loops 2
08:39:16:ST3_smx:INFO: # loops 3
08:39:18:ST3_smx:INFO: # loops 4
08:39:20:ST3_smx:INFO: Total # of broken channels: 0
08:39:20:ST3_smx:INFO: List of broken channels: []
08:39:20:ST3_smx:INFO: Total # of broken channels: 0
08:39:20:ST3_smx:INFO: List of broken channels: []
08:39:20:ST3_smx:INFO: Configuring SMX FAST
08:39:22:ST3_smx:INFO: chip: 8-7 40.898880 C 1177.390875 mV
08:39:22:ST3_smx:INFO: Electrons
08:39:22:ST3_smx:INFO: # loops 0
08:39:24:ST3_smx:INFO: # loops 1
08:39:25:ST3_smx:INFO: # loops 2
08:39:27:ST3_smx:INFO: # loops 3
08:39:28:ST3_smx:INFO: # loops 4
08:39:30:ST3_smx:INFO: Total # of broken channels: 1
08:39:30:ST3_smx:INFO: List of broken channels: [2]
08:39:30:ST3_smx:INFO: Total # of broken channels: 8
08:39:30:ST3_smx:INFO: List of broken channels: [0, 2, 4, 6, 8, 10, 12, 14]
08:39:31:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
08:39:31:febtest:INFO: 7-0 | XA-000-08-002-000-005-241-03 | 44.1 | 1177.4
08:39:31:febtest:INFO: 14-1 | XA-000-08-002-000-001-168-07 | 40.9 | 1189.2
08:39:31:febtest:INFO: 5-2 | XA-000-08-002-000-001-163-07 | 47.3 | 1177.4
08:39:31:febtest:INFO: 12-3 | XA-000-08-002-000-001-166-07 | 66.4 | 1094.2
08:39:32:febtest:INFO: 3-4 | XA-000-08-002-000-005-202-10 | 40.9 | 1183.3
08:39:32:febtest:INFO: 10-5 | XA-000-08-002-000-001-144-14 | 40.9 | 1189.2
08:39:32:febtest:INFO: 1-6 | XA-000-08-002-000-005-188-06 | 37.7 | 1195.1
08:39:32:febtest:INFO: 8-7 | XA-000-08-002-000-001-167-07 | 44.1 | 1177.4
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_01_19-08_37_52
OPERATOR : Olga B.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4UL401032 M4UL4T1010321B2 42 C
FEB_SN : 2060
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID: 10182
MODULE_NAME: L4UL401032 M4UL4T1010321B2 42 C
MODULE_TYPE:
MODULE_LADDER: L4UL401032
MODULE_MODULE: M4UL4T1010321B2
MODULE_SIZE: 42
MODULE_GRADE: C
---------------------------------------
VI_before_Init : ['2.450', '1.8340', '1.851', '0.4684', '7.000', '1.5790', '7.000', '1.5790']
VI_after__Init : ['2.450', '1.9930', '1.850', '0.6056', '7.000', '1.5800', '7.000', '1.5800']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
08:42:26:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2060/TestDate_2024_01_19-08_37_52/
09:52:44:febtest:INFO: FEB 8-2 selected
09:52:44:smx_tester:INFO: Setting Elink clock mode to 160 MHz
09:52:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:52:55:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
09:52:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:53:45:ST3_ModuleSelector:INFO: L4UL401032 M4UL4T0010320B2 42 C
09:53:45:ST3_ModuleSelector:INFO: 01072
09:53:45:febtest:INFO: Testing FEB with SN 1051
09:53:46:smx_tester:INFO: Scanning setup
09:53:46:elinks:INFO: Disabling clock on downlink 0
09:53:46:elinks:INFO: Disabling clock on downlink 1
09:53:46:elinks:INFO: Disabling clock on downlink 2
09:53:46:elinks:INFO: Disabling clock on downlink 3
09:53:46:elinks:INFO: Disabling clock on downlink 4
09:53:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:53:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:53:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:53:46:elinks:INFO: Disabling clock on downlink 0
09:53:46:elinks:INFO: Disabling clock on downlink 1
09:53:46:elinks:INFO: Disabling clock on downlink 2
09:53:46:elinks:INFO: Disabling clock on downlink 3
09:53:46:elinks:INFO: Disabling clock on downlink 4
09:53:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:53:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:53:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
09:53:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
09:53:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
09:53:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
09:53:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
09:53:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
09:53:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
09:53:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
09:53:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
09:53:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
09:53:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
09:53:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
09:53:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
09:53:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
09:53:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
09:53:47:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
09:53:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:53:47:elinks:INFO: Disabling clock on downlink 0
09:53:47:elinks:INFO: Disabling clock on downlink 1
09:53:47:elinks:INFO: Disabling clock on downlink 2
09:53:47:elinks:INFO: Disabling clock on downlink 3
09:53:47:elinks:INFO: Disabling clock on downlink 4
09:53:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:53:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:53:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:53:47:elinks:INFO: Disabling clock on downlink 0
09:53:47:elinks:INFO: Disabling clock on downlink 1
09:53:47:elinks:INFO: Disabling clock on downlink 2
09:53:47:elinks:INFO: Disabling clock on downlink 3
09:53:47:elinks:INFO: Disabling clock on downlink 4
09:53:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:53:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:53:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:53:47:elinks:INFO: Disabling clock on downlink 0
09:53:47:elinks:INFO: Disabling clock on downlink 1
09:53:47:elinks:INFO: Disabling clock on downlink 2
09:53:47:elinks:INFO: Disabling clock on downlink 3
09:53:47:elinks:INFO: Disabling clock on downlink 4
09:53:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:53:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:53:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:53:47:setup_element:INFO: Scanning clock phase
09:53:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:53:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:53:47:setup_element:INFO: Clock phase scan results for group 0, downlink 1
09:53:47:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:53:47:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:53:47:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:53:47:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:53:47:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:53:47:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:53:47:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:53:47:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:53:47:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:53:47:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:53:47:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________________
Clock Delay: 40
09:53:47:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________________
Clock Delay: 40
09:53:47:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________________
Clock Delay: 40
09:53:47:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________________
Clock Delay: 40
09:53:47:setup_element:INFO: Eye window for uplink 14: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:53:47:setup_element:INFO: Eye window for uplink 15: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:53:48:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
09:53:48:setup_element:INFO: Scanning data phases
09:53:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:53:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:53:53:setup_element:INFO: Data phase scan results for group 0, downlink 1
09:53:53:setup_element:INFO: Eye window for uplink 0 : ___________XXXXX________________________
Data delay found: 33
09:53:53:setup_element:INFO: Eye window for uplink 1 : _______XXXXX____________________________
Data delay found: 29
09:53:53:setup_element:INFO: Eye window for uplink 2 : _____XXXXXX_____________________________
Data delay found: 27
09:53:53:setup_element:INFO: Eye window for uplink 3 : ___XXXXX________________________________
Data delay found: 25
09:53:53:setup_element:INFO: Eye window for uplink 4 : ___XXXXX________________________________
Data delay found: 25
09:53:53:setup_element:INFO: Eye window for uplink 5 : XXXX___________________________________X
Data delay found: 21
09:53:53:setup_element:INFO: Eye window for uplink 6 : XXX___________________________________XX
Data delay found: 20
09:53:53:setup_element:INFO: Eye window for uplink 7 : X_________________________________XXXXX_
Data delay found: 17
09:53:53:setup_element:INFO: Eye window for uplink 8 : _______________________XXXXX____________
Data delay found: 5
09:53:53:setup_element:INFO: Eye window for uplink 9 : ____________________________XXXXX_______
Data delay found: 10
09:53:53:setup_element:INFO: Eye window for uplink 10: ________________________XXXXXX__________
Data delay found: 6
09:53:53:setup_element:INFO: Eye window for uplink 11: ____________________________XXXXXX______
Data delay found: 10
09:53:53:setup_element:INFO: Eye window for uplink 12: __________________________XXXXX_________
Data delay found: 8
09:53:53:setup_element:INFO: Eye window for uplink 13: _____________________________XXXXX______
Data delay found: 11
09:53:53:setup_element:INFO: Eye window for uplink 14: _________________________XXXX___________
Data delay found: 6
09:53:53:setup_element:INFO: Eye window for uplink 15: ___________________________XXXX_________
Data delay found: 8
09:53:53:setup_element:INFO: Setting the data phase to 33 for uplink 0
09:53:53:setup_element:INFO: Setting the data phase to 29 for uplink 1
09:53:53:setup_element:INFO: Setting the data phase to 27 for uplink 2
09:53:53:setup_element:INFO: Setting the data phase to 25 for uplink 3
09:53:53:setup_element:INFO: Setting the data phase to 25 for uplink 4
09:53:53:setup_element:INFO: Setting the data phase to 21 for uplink 5
09:53:53:setup_element:INFO: Setting the data phase to 20 for uplink 6
09:53:53:setup_element:INFO: Setting the data phase to 17 for uplink 7
09:53:53:setup_element:INFO: Setting the data phase to 5 for uplink 8
09:53:53:setup_element:INFO: Setting the data phase to 10 for uplink 9
09:53:53:setup_element:INFO: Setting the data phase to 6 for uplink 10
09:53:53:setup_element:INFO: Setting the data phase to 10 for uplink 11
09:53:53:setup_element:INFO: Setting the data phase to 8 for uplink 12
09:53:53:setup_element:INFO: Setting the data phase to 11 for uplink 13
09:53:53:setup_element:INFO: Setting the data phase to 6 for uplink 14
09:53:53:setup_element:INFO: Setting the data phase to 8 for uplink 15
09:53:53:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXX_
Uplink 1: _______________________________________________________________________XXXXXXXX_
Uplink 2: ______________________________________________________________________XXXXXX____
Uplink 3: ______________________________________________________________________XXXXXX____
Uplink 4: ______________________________________________________________________XXXXXXX___
Uplink 5: ______________________________________________________________________XXXXXXX___
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: _____________________________________________________________________XXXXXXX____
Uplink 9: _____________________________________________________________________XXXXXXX____
Uplink 10: ________________________________________________________________________________
Uplink 11: ________________________________________________________________________________
Uplink 12: ________________________________________________________________________________
Uplink 13: ________________________________________________________________________________
Uplink 14: ____________________________________________________________________XXXXXXXX____
Uplink 15: ____________________________________________________________________XXXXXXXX____
Data phase characteristics:
Uplink 0:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 1:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 2:
Optimal Phase: 27
Window Length: 34
Eye Window: _____XXXXXX_____________________________
Uplink 3:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 4:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 5:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 6:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 7:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXX_
Uplink 8:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 9:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 10:
Optimal Phase: 6
Window Length: 34
Eye Window: ________________________XXXXXX__________
Uplink 11:
Optimal Phase: 10
Window Length: 34
Eye Window: ____________________________XXXXXX______
Uplink 12:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 13:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 14:
Optimal Phase: 6
Window Length: 36
Eye Window: _________________________XXXX___________
Uplink 15:
Optimal Phase: 8
Window Length: 36
Eye Window: ___________________________XXXX_________
]
09:53:53:setup_element:INFO: Beginning SMX ASICs map scan
09:53:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:53:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:53:53:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:53:53:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:53:53:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:53:53:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:53:53:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:53:54:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:53:54:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:53:54:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:53:54:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:53:54:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:53:54:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:53:54:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:53:54:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:53:54:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:53:54:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:53:54:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:53:55:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:53:55:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:53:55:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:53:56:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXX_
Uplink 1: _______________________________________________________________________XXXXXXXX_
Uplink 2: ______________________________________________________________________XXXXXX____
Uplink 3: ______________________________________________________________________XXXXXX____
Uplink 4: ______________________________________________________________________XXXXXXX___
Uplink 5: ______________________________________________________________________XXXXXXX___
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: _____________________________________________________________________XXXXXXX____
Uplink 9: _____________________________________________________________________XXXXXXX____
Uplink 10: ________________________________________________________________________________
Uplink 11: ________________________________________________________________________________
Uplink 12: ________________________________________________________________________________
Uplink 13: ________________________________________________________________________________
Uplink 14: ____________________________________________________________________XXXXXXXX____
Uplink 15: ____________________________________________________________________XXXXXXXX____
Data phase characteristics:
Uplink 0:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 1:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 2:
Optimal Phase: 27
Window Length: 34
Eye Window: _____XXXXXX_____________________________
Uplink 3:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 4:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 5:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 6:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 7:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXX_
Uplink 8:
Optimal Phase: 5
Window Length: 35
Eye Window: _______________________XXXXX____________
Uplink 9:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 10:
Optimal Phase: 6
Window Length: 34
Eye Window: ________________________XXXXXX__________
Uplink 11:
Optimal Phase: 10
Window Length: 34
Eye Window: ____________________________XXXXXX______
Uplink 12:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 13:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 14:
Optimal Phase: 6
Window Length: 36
Eye Window: _________________________XXXX___________
Uplink 15:
Optimal Phase: 8
Window Length: 36
Eye Window: ___________________________XXXX_________
09:53:56:setup_element:INFO: Performing Elink synchronization
09:53:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:53:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:53:56:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:53:56:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:53:56:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
09:53:56:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:53:56:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
09:53:57:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
09:53:57:febtest:INFO: 1-0 | XA-000-08-002-000-001-147-14 | 44.1 | 1135.9
09:53:57:febtest:INFO: 8-1 | XA-000-08-002-000-001-152-14 | 37.7 | 1177.4
09:53:58:febtest:INFO: 3-2 | XA-000-08-002-000-001-146-14 | 25.1 | 1206.9
09:53:58:febtest:INFO: 10-3 | XA-000-08-002-000-001-153-14 | 28.2 | 1206.9
09:53:58:febtest:INFO: 5-4 | XA-000-08-002-000-001-141-09 | 25.1 | 1224.5
09:53:58:febtest:INFO: 12-5 | XA-000-08-002-000-001-154-14 | 28.2 | 1201.0
09:53:58:febtest:INFO: 7-6 | XA-000-08-002-000-001-142-09 | 18.7 | 1236.2
09:53:59:febtest:INFO: 14-7 | XA-000-08-002-000-001-159-14 | 28.2 | 1206.9
09:53:59:ST3_smx:INFO: Configuring SMX FAST
09:54:01:ST3_smx:INFO: chip: 1-0 40.898880 C 1153.732915 mV
09:54:01:ST3_smx:INFO: Electrons
09:54:01:ST3_smx:INFO: # loops 0
09:54:03:ST3_smx:INFO: # loops 1
09:54:04:ST3_smx:INFO: # loops 2
09:54:06:ST3_smx:INFO: # loops 3
09:54:08:ST3_smx:INFO: # loops 4
09:54:09:ST3_smx:INFO: Total # of broken channels: 0
09:54:09:ST3_smx:INFO: List of broken channels: []
09:54:09:ST3_smx:INFO: Total # of broken channels: 0
09:54:09:ST3_smx:INFO: List of broken channels: []
09:54:10:ST3_smx:INFO: Configuring SMX FAST
09:54:12:ST3_smx:INFO: chip: 8-1 34.556970 C 1195.082160 mV
09:54:12:ST3_smx:INFO: Electrons
09:54:12:ST3_smx:INFO: # loops 0
09:54:13:ST3_smx:INFO: # loops 1
09:54:15:ST3_smx:INFO: # loops 2
09:54:17:ST3_smx:INFO: # loops 3
09:54:18:ST3_smx:INFO: # loops 4
09:54:20:ST3_smx:INFO: Total # of broken channels: 0
09:54:20:ST3_smx:INFO: List of broken channels: []
09:54:20:ST3_smx:INFO: Total # of broken channels: 0
09:54:20:ST3_smx:INFO: List of broken channels: []
09:54:20:ST3_smx:INFO: Configuring SMX FAST
09:54:22:ST3_smx:INFO: chip: 3-2 34.556970 C 1177.390875 mV
09:54:22:ST3_smx:INFO: Electrons
09:54:22:ST3_smx:INFO: # loops 0
09:54:24:ST3_smx:INFO: # loops 1
09:54:26:ST3_smx:INFO: # loops 2
09:54:27:ST3_smx:INFO: # loops 3
09:54:29:ST3_smx:INFO: # loops 4
09:54:30:ST3_smx:INFO: Total # of broken channels: 0
09:54:30:ST3_smx:INFO: List of broken channels: []
09:54:30:ST3_smx:INFO: Total # of broken channels: 0
09:54:30:ST3_smx:INFO: List of broken channels: []
09:54:31:ST3_smx:INFO: Configuring SMX FAST
09:54:33:ST3_smx:INFO: chip: 10-3 34.556970 C 1195.082160 mV
09:54:33:ST3_smx:INFO: Electrons
09:54:33:ST3_smx:INFO: # loops 0
09:54:34:ST3_smx:INFO: # loops 1
09:54:36:ST3_smx:INFO: # loops 2
09:54:38:ST3_smx:INFO: # loops 3
09:54:39:ST3_smx:INFO: # loops 4
09:54:41:ST3_smx:INFO: Total # of broken channels: 0
09:54:41:ST3_smx:INFO: List of broken channels: []
09:54:41:ST3_smx:INFO: Total # of broken channels: 0
09:54:41:ST3_smx:INFO: List of broken channels: []
09:54:41:ST3_smx:INFO: Configuring SMX FAST
09:54:43:ST3_smx:INFO: chip: 5-4 28.225000 C 1212.728715 mV
09:54:43:ST3_smx:INFO: Electrons
09:54:43:ST3_smx:INFO: # loops 0
09:54:45:ST3_smx:INFO: # loops 1
09:54:46:ST3_smx:INFO: # loops 2
09:54:48:ST3_smx:INFO: # loops 3
09:54:50:ST3_smx:INFO: # loops 4
09:54:51:ST3_smx:INFO: Total # of broken channels: 0
09:54:51:ST3_smx:INFO: List of broken channels: []
09:54:51:ST3_smx:INFO: Total # of broken channels: 0
09:54:51:ST3_smx:INFO: List of broken channels: []
09:54:52:ST3_smx:INFO: Configuring SMX FAST
09:54:53:ST3_smx:INFO: chip: 12-5 31.389742 C 1200.969315 mV
09:54:53:ST3_smx:INFO: Electrons
09:54:54:ST3_smx:INFO: # loops 0
09:54:55:ST3_smx:INFO: # loops 1
09:54:57:ST3_smx:INFO: # loops 2
09:54:58:ST3_smx:INFO: # loops 3
09:55:00:ST3_smx:INFO: # loops 4
09:55:01:ST3_smx:INFO: Total # of broken channels: 0
09:55:01:ST3_smx:INFO: List of broken channels: []
09:55:01:ST3_smx:INFO: Total # of broken channels: 0
09:55:01:ST3_smx:INFO: List of broken channels: []
09:55:02:ST3_smx:INFO: Configuring SMX FAST
09:55:04:ST3_smx:INFO: chip: 7-6 28.225000 C 1206.851500 mV
09:55:04:ST3_smx:INFO: Electrons
09:55:04:ST3_smx:INFO: # loops 0
09:55:05:ST3_smx:INFO: # loops 1
09:55:07:ST3_smx:INFO: # loops 2
09:55:08:ST3_smx:INFO: # loops 3
09:55:10:ST3_smx:INFO: # loops 4
09:55:11:ST3_smx:INFO: Total # of broken channels: 0
09:55:11:ST3_smx:INFO: List of broken channels: []
09:55:11:ST3_smx:INFO: Total # of broken channels: 1
09:55:11:ST3_smx:INFO: List of broken channels: [127]
09:55:12:ST3_smx:INFO: Configuring SMX FAST
09:55:14:ST3_smx:INFO: chip: 14-7 34.556970 C 1200.969315 mV
09:55:14:ST3_smx:INFO: Electrons
09:55:14:ST3_smx:INFO: # loops 0
09:55:15:ST3_smx:INFO: # loops 1
09:55:17:ST3_smx:INFO: # loops 2
09:55:18:ST3_smx:INFO: # loops 3
09:55:20:ST3_smx:INFO: # loops 4
09:55:22:ST3_smx:INFO: Total # of broken channels: 0
09:55:22:ST3_smx:INFO: List of broken channels: []
09:55:22:ST3_smx:INFO: Total # of broken channels: 0
09:55:22:ST3_smx:INFO: List of broken channels: []
09:55:22:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
09:55:22:febtest:INFO: 1-0 | XA-000-08-002-000-001-147-14 | 40.9 | 1153.7
09:55:23:febtest:INFO: 8-1 | XA-000-08-002-000-001-152-14 | 34.6 | 1195.1
09:55:23:febtest:INFO: 3-2 | XA-000-08-002-000-001-146-14 | 37.7 | 1177.4
09:55:23:febtest:INFO: 10-3 | XA-000-08-002-000-001-153-14 | 34.6 | 1201.0
09:55:23:febtest:INFO: 5-4 | XA-000-08-002-000-001-141-09 | 28.2 | 1212.7
09:55:24:febtest:INFO: 12-5 | XA-000-08-002-000-001-154-14 | 31.4 | 1201.0
09:55:24:febtest:INFO: 7-6 | XA-000-08-002-000-001-142-09 | 31.4 | 1206.9
09:55:24:febtest:INFO: 14-7 | XA-000-08-002-000-001-159-14 | 34.6 | 1201.0
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_01_19-09_52_55
OPERATOR : Olga B.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4UL401032 M4UL4T0010320B2 42 C
FEB_SN : 1051
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID: 01072
MODULE_NAME: L4UL401032 M4UL4T0010320B2 42 C
MODULE_TYPE:
MODULE_LADDER: L4UL401032
MODULE_MODULE: M4UL4T0010320B2
MODULE_SIZE: 42
MODULE_GRADE: C
---------------------------------------
VI_before_Init : ['2.450', '1.8860', '1.851', '0.5575', '7.000', '1.5810', '7.000', '1.5810']
VI_after__Init : ['2.450', '1.9860', '1.850', '0.6025', '7.001', '1.5820', '7.001', '1.5820']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
09:56:08:ST3_Shared:INFO: Listo of operators:Olga B.; Robert V.;
09:56:11:ST3_Shared:INFO: Listo of operators:Robert V.;
09:56:15:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1051/TestDate_2024_01_19-09_52_55/