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FEB_1051 10.01.24 11:05:05
Info
11:05:00:febtest:INFO: FEB 8-2 selected
11:05:00:smx_tester:INFO: Setting Elink clock mode to 160 MHz
11:05:05:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:05:05:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
11:05:05:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:05:05:febtest:INFO: Testing FEB with SN 1051
11:05:07:smx_tester:INFO: Scanning setup
11:05:07:elinks:INFO: Disabling clock on downlink 0
11:05:07:elinks:INFO: Disabling clock on downlink 1
11:05:07:elinks:INFO: Disabling clock on downlink 2
11:05:07:elinks:INFO: Disabling clock on downlink 3
11:05:07:elinks:INFO: Disabling clock on downlink 4
11:05:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:05:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:05:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:05:07:elinks:INFO: Disabling clock on downlink 0
11:05:07:elinks:INFO: Disabling clock on downlink 1
11:05:07:elinks:INFO: Disabling clock on downlink 2
11:05:07:elinks:INFO: Disabling clock on downlink 3
11:05:07:elinks:INFO: Disabling clock on downlink 4
11:05:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:05:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:05:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:05:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:05:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:05:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:05:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:05:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:05:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:05:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:05:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:05:07:elinks:INFO: Disabling clock on downlink 0
11:05:07:elinks:INFO: Disabling clock on downlink 1
11:05:07:elinks:INFO: Disabling clock on downlink 2
11:05:07:elinks:INFO: Disabling clock on downlink 3
11:05:07:elinks:INFO: Disabling clock on downlink 4
11:05:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:05:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:05:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:05:07:elinks:INFO: Disabling clock on downlink 0
11:05:07:elinks:INFO: Disabling clock on downlink 1
11:05:07:elinks:INFO: Disabling clock on downlink 2
11:05:07:elinks:INFO: Disabling clock on downlink 3
11:05:07:elinks:INFO: Disabling clock on downlink 4
11:05:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:05:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:05:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:05:07:elinks:INFO: Disabling clock on downlink 0
11:05:07:elinks:INFO: Disabling clock on downlink 1
11:05:07:elinks:INFO: Disabling clock on downlink 2
11:05:07:elinks:INFO: Disabling clock on downlink 3
11:05:07:elinks:INFO: Disabling clock on downlink 4
11:05:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:05:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:05:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:05:08:setup_element:INFO: Scanning clock phase
11:05:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:05:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:05:08:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:05:08:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:05:08:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:05:08:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________________
Clock Delay: 40
11:05:08:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________________
Clock Delay: 40
11:05:08:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:05:08:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:05:08:setup_element:INFO: Eye window for uplink 14: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
11:05:08:setup_element:INFO: Eye window for uplink 15: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
11:05:08:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
11:05:08:setup_element:INFO: Scanning data phases
11:05:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:05:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:05:13:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:05:13:setup_element:INFO: Eye window for uplink 8 : __________________________XXXXX_________
Data delay found: 8
11:05:13:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXXX____
Data delay found: 13
11:05:13:setup_element:INFO: Eye window for uplink 10: ____________________________XXXXX_______
Data delay found: 10
11:05:13:setup_element:INFO: Eye window for uplink 11: _______________________________XXXXXX___
Data delay found: 13
11:05:13:setup_element:INFO: Eye window for uplink 12: _____________________________XXXXX______
Data delay found: 11
11:05:13:setup_element:INFO: Eye window for uplink 13: ________________________________XXXXX___
Data delay found: 14
11:05:13:setup_element:INFO: Eye window for uplink 14: ____________________________XXXXX_______
Data delay found: 10
11:05:13:setup_element:INFO: Eye window for uplink 15: ______________________________XXXXX_____
Data delay found: 12
11:05:13:setup_element:INFO: Setting the data phase to 8 for uplink 8
11:05:13:setup_element:INFO: Setting the data phase to 13 for uplink 9
11:05:13:setup_element:INFO: Setting the data phase to 10 for uplink 10
11:05:13:setup_element:INFO: Setting the data phase to 13 for uplink 11
11:05:13:setup_element:INFO: Setting the data phase to 11 for uplink 12
11:05:13:setup_element:INFO: Setting the data phase to 14 for uplink 13
11:05:13:setup_element:INFO: Setting the data phase to 10 for uplink 14
11:05:13:setup_element:INFO: Setting the data phase to 12 for uplink 15
11:05:13:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 71
Eye Windows:
Uplink 8: ____________________________________________________________________XXXXXXXX____
Uplink 9: ____________________________________________________________________XXXXXXXX____
Uplink 10: ________________________________________________________________________________
Uplink 11: ________________________________________________________________________________
Uplink 12: _____________________________________________________________________XXXXXXXX___
Uplink 13: _____________________________________________________________________XXXXXXXX___
Uplink 14: ____________________________________________________________________XXXXXXX_____
Uplink 15: ____________________________________________________________________XXXXXXX_____
Data phase characteristics:
Uplink 8:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 9:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 10:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 11:
Optimal Phase: 13
Window Length: 34
Eye Window: _______________________________XXXXXX___
Uplink 12:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 13:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 14:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 15:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
]
11:05:13:setup_element:INFO: Beginning SMX ASICs map scan
11:05:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:05:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:05:13:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:05:13:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:05:13:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
11:05:13:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:05:13:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:05:14:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:05:14:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:05:14:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:05:14:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:05:15:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:05:15:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:05:16:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 71
Eye Windows:
Uplink 8: ____________________________________________________________________XXXXXXXX____
Uplink 9: ____________________________________________________________________XXXXXXXX____
Uplink 10: ________________________________________________________________________________
Uplink 11: ________________________________________________________________________________
Uplink 12: _____________________________________________________________________XXXXXXXX___
Uplink 13: _____________________________________________________________________XXXXXXXX___
Uplink 14: ____________________________________________________________________XXXXXXX_____
Uplink 15: ____________________________________________________________________XXXXXXX_____
Data phase characteristics:
Uplink 8:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 9:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 10:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 11:
Optimal Phase: 13
Window Length: 34
Eye Window: _______________________________XXXXXX___
Uplink 12:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 13:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 14:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 15:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
11:05:16:setup_element:INFO: Performing Elink synchronization
11:05:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:05:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:05:16:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:05:16:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:05:16:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:05:16:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
11:05:16:ST3_emu:INFO: Number of chips: 4
addr | upli | dwnli | grp | uplinks | uplinks_map
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
11:05:17:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
11:05:17:febtest:INFO: 8-1 | XA-000-08-002-000-001-152-14 | 37.7 | 1177.4
11:05:17:febtest:INFO: 10-3 | XA-000-08-002-000-001-153-14 | 31.4 | 1206.9
11:05:17:febtest:INFO: 12-5 | XA-000-08-002-000-001-154-14 | 25.1 | 1212.7
11:05:17:febtest:INFO: 14-7 | XA-000-08-002-000-001-159-14 | 31.4 | 1201.0
11:05:17:ST3_smx:INFO: Configuring SMX FAST
11:05:20:ST3_smx:INFO: chip: 8-1 34.556970 C 1189.190035 mV
11:05:20:ST3_smx:INFO: Electrons
11:05:20:ST3_smx:INFO: # loops 0
11:05:21:ST3_smx:INFO: # loops 1
11:05:23:ST3_smx:INFO: # loops 2
11:05:25:ST3_smx:INFO: # loops 3
11:05:26:ST3_smx:INFO: # loops 4
11:05:28:ST3_smx:INFO: Total # of broken channels: 0
11:05:28:ST3_smx:INFO: List of broken channels: []
11:05:28:ST3_smx:INFO: Total # of broken channels: 0
11:05:28:ST3_smx:INFO: List of broken channels: []
11:05:28:ST3_smx:INFO: Configuring SMX FAST
11:05:30:ST3_smx:INFO: chip: 10-3 31.389742 C 1195.082160 mV
11:05:30:ST3_smx:INFO: Electrons
11:05:30:ST3_smx:INFO: # loops 0
11:05:32:ST3_smx:INFO: # loops 1
11:05:33:ST3_smx:INFO: # loops 2
11:05:35:ST3_smx:INFO: # loops 3
11:05:37:ST3_smx:INFO: # loops 4
11:05:38:ST3_smx:INFO: Total # of broken channels: 0
11:05:38:ST3_smx:INFO: List of broken channels: []
11:05:38:ST3_smx:INFO: Total # of broken channels: 0
11:05:38:ST3_smx:INFO: List of broken channels: []
11:05:39:ST3_smx:INFO: Configuring SMX FAST
11:05:41:ST3_smx:INFO: chip: 12-5 31.389742 C 1200.969315 mV
11:05:41:ST3_smx:INFO: Electrons
11:05:41:ST3_smx:INFO: # loops 0
11:05:42:ST3_smx:INFO: # loops 1
11:05:44:ST3_smx:INFO: # loops 2
11:05:46:ST3_smx:INFO: # loops 3
11:05:47:ST3_smx:INFO: # loops 4
11:05:49:ST3_smx:INFO: Total # of broken channels: 0
11:05:49:ST3_smx:INFO: List of broken channels: []
11:05:49:ST3_smx:INFO: Total # of broken channels: 0
11:05:49:ST3_smx:INFO: List of broken channels: []
11:05:50:ST3_smx:INFO: Configuring SMX FAST
11:05:52:ST3_smx:INFO: chip: 14-7 34.556970 C 1195.082160 mV
11:05:52:ST3_smx:INFO: Electrons
11:05:52:ST3_smx:INFO: # loops 0
11:05:53:ST3_smx:INFO: # loops 1
11:05:55:ST3_smx:INFO: # loops 2
11:05:56:ST3_smx:INFO: # loops 3
11:05:58:ST3_smx:INFO: # loops 4
11:06:00:ST3_smx:INFO: Total # of broken channels: 0
11:06:00:ST3_smx:INFO: List of broken channels: []
11:06:00:ST3_smx:INFO: Total # of broken channels: 0
11:06:00:ST3_smx:INFO: List of broken channels: []
11:06:00:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
11:06:00:febtest:INFO: 8-1 | XA-000-08-002-000-001-152-14 | 34.6 | 1189.2
11:06:01:febtest:INFO: 10-3 | XA-000-08-002-000-001-153-14 | 31.4 | 1195.1
11:06:01:febtest:INFO: 12-5 | XA-000-08-002-000-001-154-14 | 28.2 | 1201.0
11:06:01:febtest:INFO: 14-7 | XA-000-08-002-000-001-159-14 | 34.6 | 1195.1
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_10-11_05_05
OPERATOR : Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L6DL200120 M6DL2B4001204B2 124 C
FEB_SN : 1051
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.449', '0.7737', '1.848', '1.1510', '7.001', '1.5450', '7.001', '1.5450']
VI_after__Init : ['2.450', '1.9830', '1.850', '0.5867', '7.000', '1.5480', '7.000', '1.5480']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
11:06:02:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1051/TestDate_2024_01_10-11_05_05/