09:33:06:febtest:INFO:	FEB 8-2 A @ GSI
09:33:11:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:33:11:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
09:33:11:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:33:11:febtest:INFO:	Tsting FEB with SN 1053
09:33:12:smx_tester:INFO:	Scanning setup
09:33:12:elinks:INFO:	Disabling clock on downlink 0
09:33:12:elinks:INFO:	Disabling clock on downlink 1
09:33:12:elinks:INFO:	Disabling clock on downlink 2
09:33:12:elinks:INFO:	Disabling clock on downlink 3
09:33:12:elinks:INFO:	Disabling clock on downlink 4
09:33:12:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:33:12:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:33:12:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:33:12:elinks:INFO:	Disabling clock on downlink 0
09:33:12:elinks:INFO:	Disabling clock on downlink 1
09:33:12:elinks:INFO:	Disabling clock on downlink 2
09:33:12:elinks:INFO:	Disabling clock on downlink 3
09:33:12:elinks:INFO:	Disabling clock on downlink 4
09:33:12:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:33:12:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:33:13:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:33:13:elinks:INFO:	Disabling clock on downlink 0
09:33:13:elinks:INFO:	Disabling clock on downlink 1
09:33:13:elinks:INFO:	Disabling clock on downlink 2
09:33:13:elinks:INFO:	Disabling clock on downlink 3
09:33:13:elinks:INFO:	Disabling clock on downlink 4
09:33:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:33:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:33:13:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:33:13:elinks:INFO:	Disabling clock on downlink 0
09:33:13:elinks:INFO:	Disabling clock on downlink 1
09:33:13:elinks:INFO:	Disabling clock on downlink 2
09:33:13:elinks:INFO:	Disabling clock on downlink 3
09:33:13:elinks:INFO:	Disabling clock on downlink 4
09:33:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:33:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:33:13:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 16
09:33:13:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 17
09:33:13:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 18
09:33:13:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 19
09:33:13:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 20
09:33:13:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 21
09:33:13:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 22
09:33:13:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 23
09:33:13:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 24
09:33:13:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 25
09:33:13:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 26
09:33:13:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 27
09:33:13:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 28
09:33:13:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 29
09:33:13:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 30
09:33:13:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 31
09:33:13:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:33:13:elinks:INFO:	Disabling clock on downlink 0
09:33:13:elinks:INFO:	Disabling clock on downlink 1
09:33:13:elinks:INFO:	Disabling clock on downlink 2
09:33:13:elinks:INFO:	Disabling clock on downlink 3
09:33:13:elinks:INFO:	Disabling clock on downlink 4
09:33:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:33:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:33:13:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:33:13:setup_element:INFO:	Scanning clock phase
09:33:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:33:13:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
09:33:13:setup_element:INFO:	Clock phase scan results for group 0, downlink 3
09:33:13:setup_element:INFO:	Eye window for uplink 16: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:33:13:setup_element:INFO:	Eye window for uplink 17: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:33:13:setup_element:INFO:	Eye window for uplink 18: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:33:13:setup_element:INFO:	Eye window for uplink 19: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:33:13:setup_element:INFO:	Eye window for uplink 20: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:33:13:setup_element:INFO:	Eye window for uplink 21: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:33:13:setup_element:INFO:	Eye window for uplink 22: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:33:13:setup_element:INFO:	Eye window for uplink 23: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
09:33:13:setup_element:INFO:	Eye window for uplink 24: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
09:33:13:setup_element:INFO:	Eye window for uplink 25: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
09:33:13:setup_element:INFO:	Eye window for uplink 26: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
09:33:13:setup_element:INFO:	Eye window for uplink 27: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
09:33:13:setup_element:INFO:	Eye window for uplink 28: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
09:33:13:setup_element:INFO:	Eye window for uplink 29: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
09:33:13:setup_element:INFO:	Eye window for uplink 30: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
09:33:13:setup_element:INFO:	Eye window for uplink 31: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
09:33:13:setup_element:INFO:	Setting the clock phase to 31 for group 0, downlink 3
09:33:13:setup_element:INFO:	Scanning data phases
09:33:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:33:14:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
09:33:19:setup_element:INFO:	Data phase scan results for group 0, downlink 3
09:33:19:setup_element:INFO:	Eye window for uplink 16: ___________________XXXXX________________
Data delay found: 1
09:33:19:setup_element:INFO:	Eye window for uplink 17: _______________XXXX_____________________
Data delay found: 36
09:33:19:setup_element:INFO:	Eye window for uplink 18: ____________XXXXX_______________________
Data delay found: 34
09:33:19:setup_element:INFO:	Eye window for uplink 19: __________XXXXX_________________________
Data delay found: 32
09:33:19:setup_element:INFO:	Eye window for uplink 20: _________XXXX___________________________
Data delay found: 30
09:33:19:setup_element:INFO:	Eye window for uplink 21: _______XXXXX____________________________
Data delay found: 29
09:33:19:setup_element:INFO:	Eye window for uplink 22: ____XXXXX_______________________________
Data delay found: 26
09:33:19:setup_element:INFO:	Eye window for uplink 23: __XXXXX_________________________________
Data delay found: 24
09:33:19:setup_element:INFO:	Eye window for uplink 24: _________________________________XXXXXX_
Data delay found: 15
09:33:19:setup_element:INFO:	Eye window for uplink 25: XX__________________________________XXXX
Data delay found: 18
09:33:19:setup_element:INFO:	Eye window for uplink 26: ________________________________XXXX____
Data delay found: 13
09:33:19:setup_element:INFO:	Eye window for uplink 27: X__________________________________XXXXX
Data delay found: 17
09:33:19:setup_element:INFO:	Eye window for uplink 28: _________________________________XXXXXX_
Data delay found: 15
09:33:19:setup_element:INFO:	Eye window for uplink 29: X___________________________________XXXX
Data delay found: 18
09:33:19:setup_element:INFO:	Eye window for uplink 30: _________________________________XXXX___
Data delay found: 14
09:33:19:setup_element:INFO:	Eye window for uplink 31: ______________________________XXXXX_____
Data delay found: 12
09:33:19:setup_element:INFO:	Setting the data phase to 1 for uplink 16
09:33:19:setup_element:INFO:	Setting the data phase to 36 for uplink 17
09:33:19:setup_element:INFO:	Setting the data phase to 34 for uplink 18
09:33:19:setup_element:INFO:	Setting the data phase to 32 for uplink 19
09:33:19:setup_element:INFO:	Setting the data phase to 30 for uplink 20
09:33:19:setup_element:INFO:	Setting the data phase to 29 for uplink 21
09:33:19:setup_element:INFO:	Setting the data phase to 26 for uplink 22
09:33:19:setup_element:INFO:	Setting the data phase to 24 for uplink 23
09:33:19:setup_element:INFO:	Setting the data phase to 15 for uplink 24
09:33:19:setup_element:INFO:	Setting the data phase to 18 for uplink 25
09:33:19:setup_element:INFO:	Setting the data phase to 13 for uplink 26
09:33:19:setup_element:INFO:	Setting the data phase to 17 for uplink 27
09:33:19:setup_element:INFO:	Setting the data phase to 15 for uplink 28
09:33:19:setup_element:INFO:	Setting the data phase to 18 for uplink 29
09:33:19:setup_element:INFO:	Setting the data phase to 14 for uplink 30
09:33:19:setup_element:INFO:	Setting the data phase to 12 for uplink 31
09:33:19:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 31
    Window Length: 69
    Eye Windows:
      Uplink 16: _____________________________________________________________________XXXXXXXX___
      Uplink 17: _____________________________________________________________________XXXXXXXX___
      Uplink 18: _____________________________________________________________________XXXXXXX____
      Uplink 19: _____________________________________________________________________XXXXXXX____
      Uplink 20: _____________________________________________________________________XXXXXXX____
      Uplink 21: _____________________________________________________________________XXXXXXX____
      Uplink 22: ____________________________________________________________________XXXXXXXX____
      Uplink 23: ____________________________________________________________________XXXXXXXX____
      Uplink 24: __________________________________________________________________XXXXXXXX______
      Uplink 25: __________________________________________________________________XXXXXXXX______
      Uplink 26: ___________________________________________________________________XXXXXXX______
      Uplink 27: ___________________________________________________________________XXXXXXX______
      Uplink 28: __________________________________________________________________XXXXXXXX______
      Uplink 29: __________________________________________________________________XXXXXXXX______
      Uplink 30: ___________________________________________________________________XXXXXX_______
      Uplink 31: ___________________________________________________________________XXXXXX_______
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 1
      Window Length: 35
      Eye Window: ___________________XXXXX________________
    Uplink 17:
      Optimal Phase: 36
      Window Length: 36
      Eye Window: _______________XXXX_____________________
    Uplink 18:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 19:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 20:
      Optimal Phase: 30
      Window Length: 36
      Eye Window: _________XXXX___________________________
    Uplink 21:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 22:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 23:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 24:
      Optimal Phase: 15
      Window Length: 34
      Eye Window: _________________________________XXXXXX_
    Uplink 25:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 26:
      Optimal Phase: 13
      Window Length: 36
      Eye Window: ________________________________XXXX____
    Uplink 27:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 28:
      Optimal Phase: 15
      Window Length: 34
      Eye Window: _________________________________XXXXXX_
    Uplink 29:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 30:
      Optimal Phase: 14
      Window Length: 36
      Eye Window: _________________________________XXXX___
    Uplink 31:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
]
09:33:19:setup_element:INFO:	Beginning SMX ASICs map scan
09:33:19:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:33:19:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
09:33:19:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
09:33:19:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
09:33:19:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:33:19:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 17
09:33:19:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 16
09:33:19:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 24
09:33:19:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 25
09:33:19:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 19
09:33:19:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 18
09:33:20:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 26
09:33:20:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 27
09:33:20:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 21
09:33:20:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 20
09:33:20:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 28
09:33:20:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 29
09:33:20:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 23
09:33:20:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 22
09:33:20:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 30
09:33:20:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 31
09:33:22:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 24), (1, 25)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 30), (1, 31)
  Clock Phase Characteristic:
    Optimal Phase: 31
    Window Length: 69
    Eye Windows:
      Uplink 16: _____________________________________________________________________XXXXXXXX___
      Uplink 17: _____________________________________________________________________XXXXXXXX___
      Uplink 18: _____________________________________________________________________XXXXXXX____
      Uplink 19: _____________________________________________________________________XXXXXXX____
      Uplink 20: _____________________________________________________________________XXXXXXX____
      Uplink 21: _____________________________________________________________________XXXXXXX____
      Uplink 22: ____________________________________________________________________XXXXXXXX____
      Uplink 23: ____________________________________________________________________XXXXXXXX____
      Uplink 24: __________________________________________________________________XXXXXXXX______
      Uplink 25: __________________________________________________________________XXXXXXXX______
      Uplink 26: ___________________________________________________________________XXXXXXX______
      Uplink 27: ___________________________________________________________________XXXXXXX______
      Uplink 28: __________________________________________________________________XXXXXXXX______
      Uplink 29: __________________________________________________________________XXXXXXXX______
      Uplink 30: ___________________________________________________________________XXXXXX_______
      Uplink 31: ___________________________________________________________________XXXXXX_______
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 1
      Window Length: 35
      Eye Window: ___________________XXXXX________________
    Uplink 17:
      Optimal Phase: 36
      Window Length: 36
      Eye Window: _______________XXXX_____________________
    Uplink 18:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 19:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 20:
      Optimal Phase: 30
      Window Length: 36
      Eye Window: _________XXXX___________________________
    Uplink 21:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 22:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 23:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 24:
      Optimal Phase: 15
      Window Length: 34
      Eye Window: _________________________________XXXXXX_
    Uplink 25:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 26:
      Optimal Phase: 13
      Window Length: 36
      Eye Window: ________________________________XXXX____
    Uplink 27:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 28:
      Optimal Phase: 15
      Window Length: 34
      Eye Window: _________________________________XXXXXX_
    Uplink 29:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 30:
      Optimal Phase: 14
      Window Length: 36
      Eye Window: _________________________________XXXX___
    Uplink 31:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____

09:33:22:setup_element:INFO:	Performing Elink synchronization
09:33:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:33:22:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
09:33:22:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
09:33:22:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
09:33:22:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 3
09:33:22:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:33:22:ST3_emu:INFO:	Number of chips: 8
09:33:22:ST3_emu:INFO:	Chip address:  	0x0
09:33:22:ST3_emu:INFO:	Chip address:  	0x1
09:33:22:ST3_emu:INFO:	Chip address:  	0x2
09:33:22:ST3_emu:INFO:	Chip address:  	0x3
09:33:22:ST3_emu:INFO:	Chip address:  	0x4
09:33:22:ST3_emu:INFO:	Chip address:  	0x5
09:33:22:ST3_emu:INFO:	Chip address:  	0x6
09:33:22:ST3_emu:INFO:	Chip address:  	0x7
09:33:22:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:33:23:febtest:INFO:	0-0 | XA-000-08-002-000-005-197-10 |  12.4 | 1236.2
09:33:23:febtest:INFO:	0-1 | XA-000-08-002-000-000-020-09 |  12.4 | 1236.2
09:33:23:febtest:INFO:	0-2 | XA-000-08-002-000-005-198-10 |  25.1 | 1206.9
09:33:23:febtest:INFO:	0-3 | XA-000-08-002-000-000-041-00 |  37.7 | 1159.7
09:33:24:febtest:INFO:	0-4 | XA-000-08-002-000-001-207-12 |  28.2 | 1195.1
09:33:24:febtest:INFO:	0-5 | XA-000-08-002-000-000-035-00 |  34.6 | 1165.6
09:33:24:febtest:INFO:	0-6 | XA-000-08-002-000-005-228-04 |  31.4 | 1177.4
09:33:24:febtest:INFO:	0-7 | XA-000-08-002-000-000-036-00 |  31.4 | 1177.4
09:33:24:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
09:33:28:ST3_smx:INFO:	chip: 0-0 	 25.062742 C 	 1189.190035 mV
09:33:28:ST3_smx:INFO:	# loops 0
09:33:30:ST3_smx:INFO:	# loops 1
09:33:31:ST3_smx:INFO:	# loops 2
09:33:33:ST3_smx:INFO:	# loops 3
09:33:35:ST3_smx:INFO:	# loops 4
09:33:37:ST3_smx:INFO:	Total # of broken channels: 0
09:33:37:ST3_smx:INFO:	List of broken channels: []
09:33:37:ST3_smx:INFO:	Total # of broken channels: 8
09:33:37:ST3_smx:INFO:	List of broken channels: [18, 26, 28, 30, 32, 34, 46, 48]
09:33:37:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
09:33:41:ST3_smx:INFO:	chip: 0-1 	 18.745682 C 	 1200.969315 mV
09:33:41:ST3_smx:INFO:	# loops 0
09:33:43:ST3_smx:INFO:	# loops 1
09:33:45:ST3_smx:INFO:	# loops 2
09:33:46:ST3_smx:INFO:	# loops 3
09:33:48:ST3_smx:INFO:	# loops 4
09:33:50:ST3_smx:INFO:	Total # of broken channels: 1
09:33:50:ST3_smx:INFO:	List of broken channels: [1]
09:33:50:ST3_smx:INFO:	Total # of broken channels: 1
09:33:50:ST3_smx:INFO:	List of broken channels: [1]
09:33:50:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
09:33:54:ST3_smx:INFO:	chip: 0-2 	 25.062742 C 	 1189.190035 mV
09:33:54:ST3_smx:INFO:	# loops 0
09:33:56:ST3_smx:INFO:	# loops 1
09:33:58:ST3_smx:INFO:	# loops 2
09:33:59:ST3_smx:INFO:	# loops 3
09:34:01:ST3_smx:INFO:	# loops 4
09:34:03:ST3_smx:INFO:	Total # of broken channels: 1
09:34:03:ST3_smx:INFO:	List of broken channels: [0]
09:34:03:ST3_smx:INFO:	Total # of broken channels: 1
09:34:03:ST3_smx:INFO:	List of broken channels: [0]
09:34:04:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
09:34:08:ST3_smx:INFO:	chip: 0-3 	 37.726682 C 	 1147.806000 mV
09:34:08:ST3_smx:INFO:	# loops 0
09:34:09:ST3_smx:INFO:	# loops 1
09:34:11:ST3_smx:INFO:	# loops 2
09:34:13:ST3_smx:INFO:	# loops 3
09:34:14:ST3_smx:INFO:	# loops 4
09:34:16:ST3_smx:INFO:	Total # of broken channels: 0
09:34:16:ST3_smx:INFO:	List of broken channels: []
09:34:16:ST3_smx:INFO:	Total # of broken channels: 0
09:34:16:ST3_smx:INFO:	List of broken channels: []
09:34:17:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
09:34:20:ST3_smx:INFO:	chip: 0-4 	 47.250730 C 	 1129.995435 mV
09:34:20:ST3_smx:INFO:	# loops 0
09:34:22:ST3_smx:INFO:	# loops 1
09:34:24:ST3_smx:INFO:	# loops 2
09:34:26:ST3_smx:INFO:	# loops 3
09:34:27:ST3_smx:INFO:	# loops 4
09:34:29:ST3_smx:INFO:	Total # of broken channels: 0
09:34:29:ST3_smx:INFO:	List of broken channels: []
09:34:29:ST3_smx:INFO:	Total # of broken channels: 0
09:34:29:ST3_smx:INFO:	List of broken channels: []
09:34:30:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
09:34:34:ST3_smx:INFO:	chip: 0-5 	 44.073563 C 	 1124.048640 mV
09:34:34:ST3_smx:INFO:	# loops 0
09:34:35:ST3_smx:INFO:	# loops 1
09:34:37:ST3_smx:INFO:	# loops 2
09:34:39:ST3_smx:INFO:	# loops 3
09:34:40:ST3_smx:INFO:	# loops 4
09:34:42:ST3_smx:INFO:	Total # of broken channels: 0
09:34:42:ST3_smx:INFO:	List of broken channels: []
09:34:42:ST3_smx:INFO:	Total # of broken channels: 0
09:34:42:ST3_smx:INFO:	List of broken channels: []
09:34:43:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
09:34:46:ST3_smx:INFO:	chip: 0-6 	 34.556970 C 	 1165.571835 mV
09:34:46:ST3_smx:INFO:	# loops 0
09:34:48:ST3_smx:INFO:	# loops 1
09:34:50:ST3_smx:INFO:	# loops 2
09:34:52:ST3_smx:INFO:	# loops 3
09:34:53:ST3_smx:INFO:	# loops 4
09:34:55:ST3_smx:INFO:	Total # of broken channels: 1
09:34:55:ST3_smx:INFO:	List of broken channels: [0]
09:34:55:ST3_smx:INFO:	Total # of broken channels: 2
09:34:55:ST3_smx:INFO:	List of broken channels: [0, 126]
09:34:56:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
09:34:59:ST3_smx:INFO:	chip: 0-7 	 40.898880 C 	 1147.806000 mV
09:34:59:ST3_smx:INFO:	# loops 0
09:35:01:ST3_smx:INFO:	# loops 1
09:35:03:ST3_smx:INFO:	# loops 2
09:35:05:ST3_smx:INFO:	# loops 3
09:35:06:ST3_smx:INFO:	# loops 4
09:35:08:ST3_smx:INFO:	Total # of broken channels: 0
09:35:08:ST3_smx:INFO:	List of broken channels: []
09:35:08:ST3_smx:INFO:	Total # of broken channels: 3
09:35:08:ST3_smx:INFO:	List of broken channels: [124, 126, 127]
09:35:09:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:35:09:febtest:INFO:	0-0 | XA-000-08-002-000-005-197-10 |  28.2 | 1183.3
09:35:09:febtest:INFO:	0-1 | XA-000-08-002-000-000-020-09 |  21.9 | 1189.2
09:35:09:febtest:INFO:	0-2 | XA-000-08-002-000-005-198-10 |  31.4 | 1183.3
09:35:09:febtest:INFO:	0-3 | XA-000-08-002-000-000-041-00 |  40.9 | 1141.9
09:35:10:febtest:INFO:	0-4 | XA-000-08-002-000-001-207-12 |  50.4 | 1124.0
09:35:10:febtest:INFO:	0-5 | XA-000-08-002-000-000-035-00 |  47.3 | 1118.1
09:35:10:febtest:INFO:	0-6 | XA-000-08-002-000-005-228-04 |  37.7 | 1165.6
09:35:10:febtest:INFO:	0-7 | XA-000-08-002-000-000-036-00 |  40.9 | 1147.8
09:35:40:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_1053/TestDate_2023_11_14-09_33_11/