FEB_1055    19.10.23 13:45:01

TextEdit.txt
            13:44:55:febtest:INFO:	FEB 8-2 A @ GSI
13:44:59:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
13:45:01:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:45:01:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
13:45:01:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:45:02:febtest:INFO:	Tsting FEB with SN 1055
13:45:03:smx_tester:INFO:	Scanning setup
13:45:03:elinks:INFO:	Disabling clock on downlink 0
13:45:03:elinks:INFO:	Disabling clock on downlink 1
13:45:03:elinks:INFO:	Disabling clock on downlink 2
13:45:03:elinks:INFO:	Disabling clock on downlink 3
13:45:03:elinks:INFO:	Disabling clock on downlink 4
13:45:03:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:45:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:45:03:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:45:03:elinks:INFO:	Disabling clock on downlink 0
13:45:03:elinks:INFO:	Disabling clock on downlink 1
13:45:03:elinks:INFO:	Disabling clock on downlink 2
13:45:03:elinks:INFO:	Disabling clock on downlink 3
13:45:03:elinks:INFO:	Disabling clock on downlink 4
13:45:03:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:45:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:45:03:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:45:03:elinks:INFO:	Disabling clock on downlink 0
13:45:03:elinks:INFO:	Disabling clock on downlink 1
13:45:03:elinks:INFO:	Disabling clock on downlink 2
13:45:03:elinks:INFO:	Disabling clock on downlink 3
13:45:03:elinks:INFO:	Disabling clock on downlink 4
13:45:03:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:45:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:45:03:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:45:03:elinks:INFO:	Disabling clock on downlink 0
13:45:03:elinks:INFO:	Disabling clock on downlink 1
13:45:03:elinks:INFO:	Disabling clock on downlink 2
13:45:03:elinks:INFO:	Disabling clock on downlink 3
13:45:03:elinks:INFO:	Disabling clock on downlink 4
13:45:03:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:45:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:45:04:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 24
13:45:04:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 25
13:45:04:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 26
13:45:04:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 27
13:45:04:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 28
13:45:04:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 29
13:45:04:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 30
13:45:04:setup_element:INFO:	SOS detected for group 0, downlink 3, uplink 31
13:45:04:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:45:04:elinks:INFO:	Disabling clock on downlink 0
13:45:04:elinks:INFO:	Disabling clock on downlink 1
13:45:04:elinks:INFO:	Disabling clock on downlink 2
13:45:04:elinks:INFO:	Disabling clock on downlink 3
13:45:04:elinks:INFO:	Disabling clock on downlink 4
13:45:04:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:45:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:45:04:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:45:04:setup_element:INFO:	Scanning clock phase
13:45:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:45:04:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
13:45:04:setup_element:INFO:	Clock phase scan results for group 0, downlink 3
13:45:04:setup_element:INFO:	Eye window for uplink 24: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
13:45:04:setup_element:INFO:	Eye window for uplink 25: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
13:45:04:setup_element:INFO:	Eye window for uplink 26: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
13:45:04:setup_element:INFO:	Eye window for uplink 27: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
13:45:04:setup_element:INFO:	Eye window for uplink 28: _________________________________________________________________XXXXXXX________
Clock Delay: 28
13:45:04:setup_element:INFO:	Eye window for uplink 29: _________________________________________________________________XXXXXXX________
Clock Delay: 28
13:45:04:setup_element:INFO:	Eye window for uplink 30: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
13:45:04:setup_element:INFO:	Eye window for uplink 31: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
13:45:04:setup_element:INFO:	Setting the clock phase to 29 for group 0, downlink 3
13:45:04:setup_element:INFO:	Scanning data phases
13:45:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:45:04:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
13:45:09:setup_element:INFO:	Data phase scan results for group 0, downlink 3
13:45:09:setup_element:INFO:	Eye window for uplink 24: XXX__________________________________XXX
Data delay found: 19
13:45:09:setup_element:INFO:	Eye window for uplink 25: _XXXXX__________________________________
Data delay found: 23
13:45:09:setup_element:INFO:	Eye window for uplink 26: X___________________________________XXXX
Data delay found: 18
13:45:09:setup_element:INFO:	Eye window for uplink 27: XXXXX___________________________________
Data delay found: 22
13:45:09:setup_element:INFO:	Eye window for uplink 28: X__________________________________XXXXX
Data delay found: 17
13:45:09:setup_element:INFO:	Eye window for uplink 29: XXXX_________________________________XXX
Data delay found: 20
13:45:09:setup_element:INFO:	Eye window for uplink 30: XXXX__________________________________XX
Data delay found: 20
13:45:09:setup_element:INFO:	Eye window for uplink 31: XXX_________________________________XXXX
Data delay found: 19
13:45:09:setup_element:INFO:	Setting the data phase to 19 for uplink 24
13:45:09:setup_element:INFO:	Setting the data phase to 23 for uplink 25
13:45:09:setup_element:INFO:	Setting the data phase to 18 for uplink 26
13:45:09:setup_element:INFO:	Setting the data phase to 22 for uplink 27
13:45:09:setup_element:INFO:	Setting the data phase to 17 for uplink 28
13:45:09:setup_element:INFO:	Setting the data phase to 20 for uplink 29
13:45:09:setup_element:INFO:	Setting the data phase to 20 for uplink 30
13:45:09:setup_element:INFO:	Setting the data phase to 19 for uplink 31
13:45:09:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 29
    Window Length: 71
    Eye Windows:
      Uplink 24: _________________________________________________________________XXXXXXXX_______
      Uplink 25: _________________________________________________________________XXXXXXXX_______
      Uplink 26: _________________________________________________________________XXXXXXXX_______
      Uplink 27: _________________________________________________________________XXXXXXXX_______
      Uplink 28: _________________________________________________________________XXXXXXX________
      Uplink 29: _________________________________________________________________XXXXXXX________
      Uplink 30: __________________________________________________________________XXXXXXXX______
      Uplink 31: __________________________________________________________________XXXXXXXX______
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 25:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
    Uplink 26:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 27:
      Optimal Phase: 22
      Window Length: 35
      Eye Window: XXXXX___________________________________
    Uplink 28:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 29:
      Optimal Phase: 20
      Window Length: 33
      Eye Window: XXXX_________________________________XXX
    Uplink 30:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 31:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX
]
13:45:09:setup_element:INFO:	Beginning SMX ASICs map scan
13:45:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:45:09:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
13:45:09:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
13:45:09:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
13:45:09:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:45:10:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 24
13:45:10:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 25
13:45:10:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 26
13:45:10:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 27
13:45:10:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 28
13:45:10:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 29
13:45:11:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 30
13:45:11:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 31
13:45:12:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 3
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 24), (1, 25)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 30), (1, 31)
  Clock Phase Characteristic:
    Optimal Phase: 29
    Window Length: 71
    Eye Windows:
      Uplink 24: _________________________________________________________________XXXXXXXX_______
      Uplink 25: _________________________________________________________________XXXXXXXX_______
      Uplink 26: _________________________________________________________________XXXXXXXX_______
      Uplink 27: _________________________________________________________________XXXXXXXX_______
      Uplink 28: _________________________________________________________________XXXXXXX________
      Uplink 29: _________________________________________________________________XXXXXXX________
      Uplink 30: __________________________________________________________________XXXXXXXX______
      Uplink 31: __________________________________________________________________XXXXXXXX______
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 25:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
    Uplink 26:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 27:
      Optimal Phase: 22
      Window Length: 35
      Eye Window: XXXXX___________________________________
    Uplink 28:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 29:
      Optimal Phase: 20
      Window Length: 33
      Eye Window: XXXX_________________________________XXX
    Uplink 30:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 31:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX

13:45:12:setup_element:INFO:	Performing Elink synchronization
13:45:12:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:45:12:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [3]
13:45:12:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [3]
13:45:12:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [3]
13:45:12:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 3
13:45:12:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
13:45:12:ST3_emu:INFO:	Number of chips: 4
13:45:12:ST3_emu:INFO:	Chip address:  	0x1
13:45:12:ST3_emu:INFO:	Chip address:  	0x3
13:45:12:ST3_emu:INFO:	Chip address:  	0x5
13:45:12:ST3_emu:INFO:	Chip address:  	0x7
13:45:13:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
13:45:13:febtest:INFO:	0-1 | XA-000-08-002-000-001-042-13 |  18.7 | 1236.2
13:45:13:febtest:INFO:	0-3 | XA-000-08-002-000-001-043-13 |  44.1 | 1153.7
13:45:13:febtest:INFO:	0-5 | XA-000-08-002-000-001-077-06 |  60.0 | 1100.2
13:45:14:febtest:INFO:	0-7 | XA-000-08-002-000-001-079-06 |  25.1 | 1236.2
13:45:14:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
13:45:17:ST3_smx:INFO:	chip: 0-1 	 34.556970 C 	 1177.390875 mV
13:45:17:ST3_smx:INFO:	# loops 0
13:45:19:ST3_smx:INFO:	# loops 1
13:45:20:ST3_smx:INFO:	# loops 2
13:45:22:ST3_smx:INFO:	# loops 3
13:45:24:ST3_smx:INFO:	# loops 4
13:45:26:ST3_smx:INFO:	Total # of broken channels: 0
13:45:26:ST3_smx:INFO:	List of broken channels: []
13:45:26:ST3_smx:INFO:	Total # of broken channels: 2
13:45:26:ST3_smx:INFO:	List of broken channels: [67, 113]
13:45:26:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
13:45:30:ST3_smx:INFO:	chip: 0-3 	 50.430383 C 	 1124.048640 mV
13:45:30:ST3_smx:INFO:	# loops 0
13:45:32:ST3_smx:INFO:	# loops 1
13:45:33:ST3_smx:INFO:	# loops 2
13:45:35:ST3_smx:INFO:	# loops 3
13:45:36:ST3_smx:INFO:	# loops 4
13:45:38:ST3_smx:INFO:	Total # of broken channels: 0
13:45:38:ST3_smx:INFO:	List of broken channels: []
13:45:38:ST3_smx:INFO:	Total # of broken channels: 0
13:45:38:ST3_smx:INFO:	List of broken channels: []
13:45:39:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
13:45:43:ST3_smx:INFO:	chip: 0-5 	 50.430383 C 	 1124.048640 mV
13:45:43:ST3_smx:INFO:	# loops 0
13:45:44:ST3_smx:INFO:	# loops 1
13:45:46:ST3_smx:INFO:	# loops 2
13:45:47:ST3_smx:INFO:	# loops 3
13:45:49:ST3_smx:INFO:	# loops 4
13:45:51:ST3_smx:INFO:	Total # of broken channels: 0
13:45:51:ST3_smx:INFO:	List of broken channels: []
13:45:51:ST3_smx:INFO:	Total # of broken channels: 0
13:45:51:ST3_smx:INFO:	List of broken channels: []
13:45:51:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
13:45:55:ST3_smx:INFO:	chip: 0-7 	 37.726682 C 	 1177.390875 mV
13:45:55:ST3_smx:INFO:	# loops 0
13:45:57:ST3_smx:INFO:	# loops 1
13:45:58:ST3_smx:INFO:	# loops 2
13:46:00:ST3_smx:INFO:	# loops 3
13:46:02:ST3_smx:INFO:	# loops 4
13:46:03:ST3_smx:INFO:	Total # of broken channels: 0
13:46:03:ST3_smx:INFO:	List of broken channels: []
13:46:03:ST3_smx:INFO:	Total # of broken channels: 0
13:46:03:ST3_smx:INFO:	List of broken channels: []
13:46:04:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
13:46:04:febtest:INFO:	0-1 | XA-000-08-002-000-001-042-13 |  34.6 | 1165.6
13:46:05:febtest:INFO:	0-3 | XA-000-08-002-000-001-043-13 |  50.4 | 1118.1
13:46:05:febtest:INFO:	0-5 | XA-000-08-002-000-001-077-06 |  53.6 | 1118.1
13:46:05:febtest:INFO:	0-7 | XA-000-08-002-000-001-079-06 |  37.7 | 1171.5
13:47:54:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_1055/TestDate_2023_10_19-13_45_01/