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FEB_1057 29.01.24 10:54:47
Info
10:54:45:febtest:INFO: FEB 8-2 selected
10:54:45:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:54:47:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:54:47:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
10:54:47:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:54:48:febtest:INFO: Testing FEB with SN 1057
10:54:49:smx_tester:INFO: Scanning setup
10:54:49:elinks:INFO: Disabling clock on downlink 0
10:54:49:elinks:INFO: Disabling clock on downlink 1
10:54:49:elinks:INFO: Disabling clock on downlink 2
10:54:49:elinks:INFO: Disabling clock on downlink 3
10:54:49:elinks:INFO: Disabling clock on downlink 4
10:54:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:54:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:54:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:54:49:elinks:INFO: Disabling clock on downlink 0
10:54:49:elinks:INFO: Disabling clock on downlink 1
10:54:49:elinks:INFO: Disabling clock on downlink 2
10:54:49:elinks:INFO: Disabling clock on downlink 3
10:54:49:elinks:INFO: Disabling clock on downlink 4
10:54:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:54:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:54:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:54:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:54:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:54:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:54:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:54:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:54:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:54:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:54:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:54:49:elinks:INFO: Disabling clock on downlink 0
10:54:49:elinks:INFO: Disabling clock on downlink 1
10:54:50:elinks:INFO: Disabling clock on downlink 2
10:54:50:elinks:INFO: Disabling clock on downlink 3
10:54:50:elinks:INFO: Disabling clock on downlink 4
10:54:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:54:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:54:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:54:50:elinks:INFO: Disabling clock on downlink 0
10:54:50:elinks:INFO: Disabling clock on downlink 1
10:54:50:elinks:INFO: Disabling clock on downlink 2
10:54:50:elinks:INFO: Disabling clock on downlink 3
10:54:50:elinks:INFO: Disabling clock on downlink 4
10:54:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:54:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:54:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:54:50:elinks:INFO: Disabling clock on downlink 0
10:54:50:elinks:INFO: Disabling clock on downlink 1
10:54:50:elinks:INFO: Disabling clock on downlink 2
10:54:50:elinks:INFO: Disabling clock on downlink 3
10:54:50:elinks:INFO: Disabling clock on downlink 4
10:54:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:54:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:54:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:54:50:setup_element:INFO: Scanning clock phase
10:54:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:54:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:54:50:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:54:50:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:54:50:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:54:50:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:54:50:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:54:50:setup_element:INFO: Eye window for uplink 12: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:54:50:setup_element:INFO: Eye window for uplink 13: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:54:50:setup_element:INFO: Eye window for uplink 14: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:54:50:setup_element:INFO: Eye window for uplink 15: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:54:50:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
10:54:50:setup_element:INFO: Scanning data phases
10:54:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:54:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:54:56:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:54:56:setup_element:INFO: Eye window for uplink 8 : ___________________________XXXXX________
Data delay found: 9
10:54:56:setup_element:INFO: Eye window for uplink 9 : _________________________________XXXXX__
Data delay found: 15
10:54:56:setup_element:INFO: Eye window for uplink 10: ____________________________XXXXXX______
Data delay found: 10
10:54:56:setup_element:INFO: Eye window for uplink 11: ________________________________XXXXX___
Data delay found: 14
10:54:56:setup_element:INFO: Eye window for uplink 12: ____________________________XXXX________
Data delay found: 9
10:54:56:setup_element:INFO: Eye window for uplink 13: _______________________________XXXX_____
Data delay found: 12
10:54:56:setup_element:INFO: Eye window for uplink 14: ____________________________XXXXX_______
Data delay found: 10
10:54:56:setup_element:INFO: Eye window for uplink 15: ______________________________XXXXXX____
Data delay found: 12
10:54:56:setup_element:INFO: Setting the data phase to 9 for uplink 8
10:54:56:setup_element:INFO: Setting the data phase to 15 for uplink 9
10:54:56:setup_element:INFO: Setting the data phase to 10 for uplink 10
10:54:56:setup_element:INFO: Setting the data phase to 14 for uplink 11
10:54:56:setup_element:INFO: Setting the data phase to 9 for uplink 12
10:54:56:setup_element:INFO: Setting the data phase to 12 for uplink 13
10:54:56:setup_element:INFO: Setting the data phase to 10 for uplink 14
10:54:56:setup_element:INFO: Setting the data phase to 12 for uplink 15
10:54:56:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 71
Eye Windows:
Uplink 8: ____________________________________________________________________XXXXXXXXX___
Uplink 9: ____________________________________________________________________XXXXXXXXX___
Uplink 10: _____________________________________________________________________XXXXXXX____
Uplink 11: _____________________________________________________________________XXXXXXX____
Uplink 12: ____________________________________________________________________XXXXXXXX____
Uplink 13: ____________________________________________________________________XXXXXXXX____
Uplink 14: ____________________________________________________________________XXXXXXXXX___
Uplink 15: ____________________________________________________________________XXXXXXXXX___
Data phase characteristics:
Uplink 8:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 9:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 10:
Optimal Phase: 10
Window Length: 34
Eye Window: ____________________________XXXXXX______
Uplink 11:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 12:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 13:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 14:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 15:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
]
10:54:56:setup_element:INFO: Beginning SMX ASICs map scan
10:54:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:54:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:54:56:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:54:56:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:54:56:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
10:54:56:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:54:56:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:54:56:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:54:56:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:54:57:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:54:57:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:54:57:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:54:57:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:54:58:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 71
Eye Windows:
Uplink 8: ____________________________________________________________________XXXXXXXXX___
Uplink 9: ____________________________________________________________________XXXXXXXXX___
Uplink 10: _____________________________________________________________________XXXXXXX____
Uplink 11: _____________________________________________________________________XXXXXXX____
Uplink 12: ____________________________________________________________________XXXXXXXX____
Uplink 13: ____________________________________________________________________XXXXXXXX____
Uplink 14: ____________________________________________________________________XXXXXXXXX___
Uplink 15: ____________________________________________________________________XXXXXXXXX___
Data phase characteristics:
Uplink 8:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 9:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 10:
Optimal Phase: 10
Window Length: 34
Eye Window: ____________________________XXXXXX______
Uplink 11:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 12:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 13:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 14:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 15:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
10:54:58:setup_element:INFO: Performing Elink synchronization
10:54:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:54:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:54:58:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:54:58:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:54:58:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:54:58:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
10:54:59:ST3_emu:INFO: Number of chips: 4
addr | upli | dwnli | grp | uplinks | uplinks_map
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
10:54:59:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:55:00:febtest:INFO: 8-1 | XA-000-08-002-000-000-090-12 | 47.3 | 1159.7
10:55:00:febtest:INFO: 10-3 | XA-000-08-002-000-000-086-12 | 34.6 | 1195.1
10:55:00:febtest:INFO: 12-5 | XA-000-08-002-000-000-085-12 | 37.7 | 1195.1
10:55:00:febtest:INFO: 14-7 | XA-000-08-002-000-000-084-12 | 47.3 | 1165.6
10:55:00:ST3_smx:INFO: Configuring SMX FAST
10:55:02:ST3_smx:INFO: chip: 8-1 47.250730 C 1159.654860 mV
10:55:02:ST3_smx:INFO: Electrons
10:55:02:ST3_smx:INFO: # loops 0
10:55:04:ST3_smx:INFO: # loops 1
10:55:06:ST3_smx:INFO: # loops 2
10:55:08:ST3_smx:INFO: # loops 3
10:55:09:ST3_smx:INFO: # loops 4
10:55:11:ST3_smx:INFO: Total # of broken channels: 0
10:55:11:ST3_smx:INFO: List of broken channels: []
10:55:11:ST3_smx:INFO: Total # of broken channels: 0
10:55:11:ST3_smx:INFO: List of broken channels: []
10:55:12:ST3_smx:INFO: Configuring SMX FAST
10:55:14:ST3_smx:INFO: chip: 10-3 44.073563 C 1165.571835 mV
10:55:14:ST3_smx:INFO: Electrons
10:55:14:ST3_smx:INFO: # loops 0
10:55:16:ST3_smx:INFO: # loops 1
10:55:17:ST3_smx:INFO: # loops 2
10:55:19:ST3_smx:INFO: # loops 3
10:55:21:ST3_smx:INFO: # loops 4
10:55:22:ST3_smx:INFO: Total # of broken channels: 0
10:55:22:ST3_smx:INFO: List of broken channels: []
10:55:22:ST3_smx:INFO: Total # of broken channels: 0
10:55:22:ST3_smx:INFO: List of broken channels: []
10:55:23:ST3_smx:INFO: Configuring SMX FAST
10:55:25:ST3_smx:INFO: chip: 12-5 40.898880 C 1183.292940 mV
10:55:25:ST3_smx:INFO: Electrons
10:55:25:ST3_smx:INFO: # loops 0
10:55:27:ST3_smx:INFO: # loops 1
10:55:29:ST3_smx:INFO: # loops 2
10:55:30:ST3_smx:INFO: # loops 3
10:55:32:ST3_smx:INFO: # loops 4
10:55:34:ST3_smx:INFO: Total # of broken channels: 0
10:55:34:ST3_smx:INFO: List of broken channels: []
10:55:34:ST3_smx:INFO: Total # of broken channels: 0
10:55:34:ST3_smx:INFO: List of broken channels: []
10:55:35:ST3_smx:INFO: Configuring SMX FAST
10:55:37:ST3_smx:INFO: chip: 14-7 40.898880 C 1189.190035 mV
10:55:37:ST3_smx:INFO: Electrons
10:55:37:ST3_smx:INFO: # loops 0
10:55:39:ST3_smx:INFO: # loops 1
10:55:40:ST3_smx:INFO: # loops 2
10:55:42:ST3_smx:INFO: # loops 3
10:55:44:ST3_smx:INFO: # loops 4
10:55:45:ST3_smx:INFO: Total # of broken channels: 0
10:55:45:ST3_smx:INFO: List of broken channels: []
10:55:45:ST3_smx:INFO: Total # of broken channels: 0
10:55:45:ST3_smx:INFO: List of broken channels: []
10:55:46:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:55:46:febtest:INFO: 8-1 | XA-000-08-002-000-000-090-12 | 47.3 | 1165.6
10:55:47:febtest:INFO: 10-3 | XA-000-08-002-000-000-086-12 | 44.1 | 1165.6
10:55:47:febtest:INFO: 12-5 | XA-000-08-002-000-000-085-12 | 40.9 | 1183.3
10:55:47:febtest:INFO: 14-7 | XA-000-08-002-000-000-084-12 | 40.9 | 1189.2
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_29-10_54_47
OPERATOR : Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4DL600119 M4DL6T1001191A2 124 D
FEB_SN : 1057
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.451', '0.8039', '1.850', '0.9176', '0.000', '0.0000', '7.000', '1.5750']
VI_after__Init : ['2.450', '2.0050', '1.850', '0.4454', '0.000', '0.0000', '7.000', '1.5770']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
10:55:49:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1057/TestDate_2024_01_29-10_54_47/