
FEB_1059 22.01.24 09:45:53
TextEdit.txt
08:30:06:ST3_hmp4040:INFO: HAMEG,HMP2030,017836163,HW50010002/SW2.30 08:31:00:ST3_Shared:INFO: Listo of operators:Kerstin S.; 08:31:08:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:31:08:ST3_Shared:INFO: -------------------------FEB-Sensor------------------------- 08:31:08:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:31:51:ST3_ModuleSelector:INFO: L4UL401032 M4UL4B2010322A2 62 C 08:31:51:ST3_ModuleSelector:INFO: 08:31:51:febtest:INFO: Testing FEB with SN 1042 Traceback (most recent call last): File "febtest.py", line 321, in DoFEB_SensorTest if self.DoScanFEB8(reporter.out_dict): File "febtest.py", line 178, in DoScanFEB8 if self.EMU.Scan_FEB8(reporter): AttributeError: 'int' object has no attribute 'Scan_FEB8' 08:32:40:febtest:INFO: FEB 8-2 selected 08:32:40:smx_tester:INFO: Setting Elink clock mode to 160 MHz 08:32:44:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:32:44:ST3_Shared:INFO: -------------------------FEB-Sensor------------------------- 08:32:44:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:32:46:ST3_ModuleSelector:INFO: L4UL401032 M4UL4B2010322A2 62 C 08:32:46:ST3_ModuleSelector:INFO: 08:32:47:febtest:INFO: Testing FEB with SN 1042 08:32:48:smx_tester:INFO: Scanning setup 08:32:48:elinks:INFO: Disabling clock on downlink 0 08:32:48:elinks:INFO: Disabling clock on downlink 1 08:32:48:elinks:INFO: Disabling clock on downlink 2 08:32:48:elinks:INFO: Disabling clock on downlink 3 08:32:48:elinks:INFO: Disabling clock on downlink 4 08:32:48:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:32:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 08:32:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:32:48:elinks:INFO: Disabling clock on downlink 0 08:32:48:elinks:INFO: Disabling clock on downlink 1 08:32:48:elinks:INFO: Disabling clock on downlink 2 08:32:48:elinks:INFO: Disabling clock on downlink 3 08:32:48:elinks:INFO: Disabling clock on downlink 4 08:32:48:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:32:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:32:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 08:32:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 08:32:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 08:32:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 08:32:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 08:32:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 08:32:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 08:32:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 08:32:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 08:32:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 08:32:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 08:32:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 08:32:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 08:32:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 08:32:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 08:32:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 08:32:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:32:48:elinks:INFO: Disabling clock on downlink 0 08:32:48:elinks:INFO: Disabling clock on downlink 1 08:32:48:elinks:INFO: Disabling clock on downlink 2 08:32:48:elinks:INFO: Disabling clock on downlink 3 08:32:48:elinks:INFO: Disabling clock on downlink 4 08:32:48:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:32:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 08:32:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:32:48:elinks:INFO: Disabling clock on downlink 0 08:32:48:elinks:INFO: Disabling clock on downlink 1 08:32:48:elinks:INFO: Disabling clock on downlink 2 08:32:48:elinks:INFO: Disabling clock on downlink 3 08:32:48:elinks:INFO: Disabling clock on downlink 4 08:32:48:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:32:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 08:32:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:32:49:elinks:INFO: Disabling clock on downlink 0 08:32:49:elinks:INFO: Disabling clock on downlink 1 08:32:49:elinks:INFO: Disabling clock on downlink 2 08:32:49:elinks:INFO: Disabling clock on downlink 3 08:32:49:elinks:INFO: Disabling clock on downlink 4 08:32:49:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:32:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 08:32:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:32:49:setup_element:INFO: Scanning clock phase 08:32:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:32:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 08:32:49:setup_element:INFO: Clock phase scan results for group 0, downlink 1 08:32:49:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________________XXXXXXX Clock Delay: 36 08:32:49:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________________XXXXXXX Clock Delay: 36 08:32:49:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXX_ Clock Delay: 35 08:32:49:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXX_ Clock Delay: 35 08:32:49:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXXXX_ Clock Delay: 35 08:32:49:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXXXX_ Clock Delay: 35 08:32:49:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXX___ Clock Delay: 33 08:32:49:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXX___ Clock Delay: 33 08:32:49:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 08:32:49:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 08:32:49:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 08:32:49:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 08:32:49:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXXXX Clock Delay: 35 08:32:49:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXXXX Clock Delay: 35 08:32:49:setup_element:INFO: Eye window for uplink 14: X_______________________________________________________________________XXXXXXX_ Clock Delay: 36 08:32:49:setup_element:INFO: Eye window for uplink 15: X_______________________________________________________________________XXXXXXX_ Clock Delay: 36 08:32:49:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1 08:32:49:setup_element:INFO: Scanning data phases 08:32:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:32:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 08:32:54:setup_element:INFO: Data phase scan results for group 0, downlink 1 08:32:54:setup_element:INFO: Eye window for uplink 0 : _______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 3 08:32:54:setup_element:INFO: Eye window for uplink 1 : _______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 3 08:32:54:setup_element:INFO: Eye window for uplink 2 : _______XXXXX____________________________ Data delay found: 29 08:32:54:setup_element:INFO: Eye window for uplink 3 : _____XXXXX______________________________ Data delay found: 27 08:32:54:setup_element:INFO: Eye window for uplink 4 : ______XXXXX_____________________________ Data delay found: 28 08:32:54:setup_element:INFO: Eye window for uplink 5 : __XXXXX_________________________________ Data delay found: 24 08:32:54:setup_element:INFO: Eye window for uplink 6 : X__________________________________XXXXX Data delay found: 17 08:32:54:setup_element:INFO: Eye window for uplink 7 : _______________________________XXXXX____ Data delay found: 13 08:32:54:setup_element:INFO: Eye window for uplink 8 : __________________________XXXXX_________ Data delay found: 8 08:32:54:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXXXX___ Data delay found: 13 08:32:54:setup_element:INFO: Eye window for uplink 10: ___________________________XXXXXX_______ Data delay found: 9 08:32:54:setup_element:INFO: Eye window for uplink 11: ________________________________XXXX____ Data delay found: 13 08:32:54:setup_element:INFO: Eye window for uplink 12: _____________________________XXXXX______ Data delay found: 11 08:32:54:setup_element:INFO: Eye window for uplink 13: _______________________________XXXXX____ Data delay found: 13 08:32:54:setup_element:INFO: Eye window for uplink 14: _______________________________XXXXX____ Data delay found: 13 08:32:54:setup_element:INFO: Eye window for uplink 15: _________________________________XXXXX__ Data delay found: 15 08:32:54:setup_element:INFO: Setting the data phase to 3 for uplink 0 08:32:54:setup_element:INFO: Setting the data phase to 3 for uplink 1 08:32:54:setup_element:INFO: Setting the data phase to 29 for uplink 2 08:32:54:setup_element:INFO: Setting the data phase to 27 for uplink 3 08:32:54:setup_element:INFO: Setting the data phase to 28 for uplink 4 08:32:54:setup_element:INFO: Setting the data phase to 24 for uplink 5 08:32:54:setup_element:INFO: Setting the data phase to 17 for uplink 6 08:32:54:setup_element:INFO: Setting the data phase to 13 for uplink 7 08:32:54:setup_element:INFO: Setting the data phase to 8 for uplink 8 08:32:54:setup_element:INFO: Setting the data phase to 13 for uplink 9 08:32:54:setup_element:INFO: Setting the data phase to 9 for uplink 10 08:32:54:setup_element:INFO: Setting the data phase to 13 for uplink 11 08:32:54:setup_element:INFO: Setting the data phase to 11 for uplink 12 08:32:54:setup_element:INFO: Setting the data phase to 13 for uplink 13 08:32:54:setup_element:INFO: Setting the data phase to 13 for uplink 14 08:32:54:setup_element:INFO: Setting the data phase to 15 for uplink 15 08:32:54:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 35 Window Length: 70 Eye Windows: Uplink 0: _________________________________________________________________________XXXXXXX Uplink 1: _________________________________________________________________________XXXXXXX Uplink 2: ________________________________________________________________________XXXXXXX_ Uplink 3: ________________________________________________________________________XXXXXXX_ Uplink 4: ________________________________________________________________________XXXXXXX_ Uplink 5: ________________________________________________________________________XXXXXXX_ Uplink 6: _______________________________________________________________________XXXXXX___ Uplink 7: _______________________________________________________________________XXXXXX___ Uplink 8: _______________________________________________________________________XXXXXXXX_ Uplink 9: _______________________________________________________________________XXXXXXXX_ Uplink 10: _______________________________________________________________________XXXXXXXX_ Uplink 11: _______________________________________________________________________XXXXXXXX_ Uplink 12: _______________________________________________________________________XXXXXXXXX Uplink 13: _______________________________________________________________________XXXXXXXXX Uplink 14: X_______________________________________________________________________XXXXXXX_ Uplink 15: X_______________________________________________________________________XXXXXXX_ Data phase characteristics: Uplink 0: Optimal Phase: 3 Window Length: 7 Eye Window: _______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Uplink 1: Optimal Phase: 3 Window Length: 7 Eye Window: _______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Uplink 2: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 3: Optimal Phase: 27 Window Length: 35 Eye Window: _____XXXXX______________________________ Uplink 4: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 5: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 6: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 7: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 8: Optimal Phase: 8 Window Length: 35 Eye Window: __________________________XXXXX_________ Uplink 9: Optimal Phase: 13 Window Length: 34 Eye Window: _______________________________XXXXXX___ Uplink 10: Optimal Phase: 9 Window Length: 34 Eye Window: ___________________________XXXXXX_______ Uplink 11: Optimal Phase: 13 Window Length: 36 Eye Window: ________________________________XXXX____ Uplink 12: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 13: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 14: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 15: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ ] 08:32:54:setup_element:INFO: Beginning SMX ASICs map scan 08:32:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:32:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 08:32:54:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 08:32:54:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 08:32:54:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 08:32:54:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 08:32:54:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 08:32:54:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 08:32:54:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 08:32:55:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 08:32:55:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 08:32:55:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 08:32:55:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 08:32:55:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 08:32:55:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 08:32:55:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 08:32:55:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 08:32:55:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 08:32:55:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 08:32:56:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 08:32:56:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 08:32:57:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0) ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9) ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2) ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4) ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13) ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6) ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15) Clock Phase Characteristic: Optimal Phase: 35 Window Length: 70 Eye Windows: Uplink 0: _________________________________________________________________________XXXXXXX Uplink 1: _________________________________________________________________________XXXXXXX Uplink 2: ________________________________________________________________________XXXXXXX_ Uplink 3: ________________________________________________________________________XXXXXXX_ Uplink 4: ________________________________________________________________________XXXXXXX_ Uplink 5: ________________________________________________________________________XXXXXXX_ Uplink 6: _______________________________________________________________________XXXXXX___ Uplink 7: _______________________________________________________________________XXXXXX___ Uplink 8: _______________________________________________________________________XXXXXXXX_ Uplink 9: _______________________________________________________________________XXXXXXXX_ Uplink 10: _______________________________________________________________________XXXXXXXX_ Uplink 11: _______________________________________________________________________XXXXXXXX_ Uplink 12: _______________________________________________________________________XXXXXXXXX Uplink 13: _______________________________________________________________________XXXXXXXXX Uplink 14: X_______________________________________________________________________XXXXXXX_ Uplink 15: X_______________________________________________________________________XXXXXXX_ Data phase characteristics: Uplink 0: Optimal Phase: 3 Window Length: 7 Eye Window: _______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Uplink 1: Optimal Phase: 3 Window Length: 7 Eye Window: _______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Uplink 2: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 3: Optimal Phase: 27 Window Length: 35 Eye Window: _____XXXXX______________________________ Uplink 4: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 5: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 6: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 7: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 8: Optimal Phase: 8 Window Length: 35 Eye Window: __________________________XXXXX_________ Uplink 9: Optimal Phase: 13 Window Length: 34 Eye Window: _______________________________XXXXXX___ Uplink 10: Optimal Phase: 9 Window Length: 34 Eye Window: ___________________________XXXXXX_______ Uplink 11: Optimal Phase: 13 Window Length: 36 Eye Window: ________________________________XXXX____ Uplink 12: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 13: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 14: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 15: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ 08:32:57:setup_element:INFO: Performing Elink synchronization 08:32:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:32:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 08:32:57:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 08:32:57:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 08:32:57:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 08:32:57:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 08:32:57:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)] 08:32:58:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 08:32:59:febtest:INFO: 1-0 | XA-000-08-002-000-006-007-11 | 28.2 | 1201.0 08:32:59:febtest:INFO: 8-1 | XA-000-08-002-000-004-063-01 | 28.2 | 1183.3 08:32:59:febtest:INFO: 3-2 | XA-000-08-002-000-006-011-11 | 28.2 | 1201.0 08:32:59:febtest:INFO: 10-3 | XA-000-08-002-000-005-232-04 | 12.4 | 1236.2 08:32:59:febtest:INFO: 5-4 | XA-000-08-002-000-006-012-11 | 25.1 | 1218.6 08:33:00:febtest:INFO: 12-5 | XA-000-08-002-000-005-218-13 | 31.4 | 1183.3 08:33:00:febtest:INFO: 7-6 | XA-000-08-002-000-001-083-01 | 50.4 | 1141.9 08:33:00:febtest:INFO: 14-7 | XA-000-08-002-000-005-203-10 | 21.9 | 1212.7 08:33:00:ST3_smx:INFO: Configuring SMX FAST 08:33:02:ST3_smx:INFO: chip: 1-0 28.225000 C 1200.969315 mV 08:33:02:ST3_smx:INFO: Electrons 08:33:02:ST3_smx:INFO: # loops 0 08:33:04:ST3_smx:INFO: # loops 1 08:33:06:ST3_smx:INFO: # loops 2 08:33:07:ST3_smx:INFO: # loops 3 08:33:09:ST3_smx:INFO: # loops 4 08:33:11:ST3_smx:INFO: Total # of broken channels: 0 08:33:11:ST3_smx:INFO: List of broken channels: [] 08:33:11:ST3_smx:INFO: Total # of broken channels: 0 08:33:11:ST3_smx:INFO: List of broken channels: [] 08:33:11:ST3_smx:INFO: Configuring SMX FAST 08:33:13:ST3_smx:INFO: chip: 8-1 31.389742 C 1171.483840 mV 08:33:13:ST3_smx:INFO: Electrons 08:33:13:ST3_smx:INFO: # loops 0 08:33:15:ST3_smx:INFO: # loops 1 08:33:17:ST3_smx:INFO: # loops 2 08:33:18:ST3_smx:INFO: # loops 3 08:33:20:ST3_smx:INFO: # loops 4 08:33:22:ST3_smx:INFO: Total # of broken channels: 0 08:33:22:ST3_smx:INFO: List of broken channels: [] 08:33:22:ST3_smx:INFO: Total # of broken channels: 0 08:33:22:ST3_smx:INFO: List of broken channels: [] 08:33:22:ST3_smx:INFO: Configuring SMX FAST 08:33:24:ST3_smx:INFO: chip: 3-2 28.225000 C 1195.082160 mV 08:33:24:ST3_smx:INFO: Electrons 08:33:24:ST3_smx:INFO: # loops 0 08:33:25:ST3_smx:INFO: # loops 1 08:33:27:ST3_smx:INFO: # loops 2 08:33:29:ST3_smx:INFO: # loops 3 08:33:30:ST3_smx:INFO: # loops 4 08:33:32:ST3_smx:INFO: Total # of broken channels: 0 08:33:32:ST3_smx:INFO: List of broken channels: [] 08:33:32:ST3_smx:INFO: Total # of broken channels: 0 08:33:32:ST3_smx:INFO: List of broken channels: [] 08:33:32:ST3_smx:INFO: Configuring SMX FAST 08:33:34:ST3_smx:INFO: chip: 10-3 21.902970 C 1206.851500 mV 08:33:34:ST3_smx:INFO: Electrons 08:33:34:ST3_smx:INFO: # loops 0 08:33:36:ST3_smx:INFO: # loops 1 08:33:37:ST3_smx:INFO: # loops 2 08:33:39:ST3_smx:INFO: # loops 3 08:33:41:ST3_smx:INFO: # loops 4 08:33:42:ST3_smx:INFO: Total # of broken channels: 0 08:33:42:ST3_smx:INFO: List of broken channels: [] 08:33:42:ST3_smx:INFO: Total # of broken channels: 0 08:33:42:ST3_smx:INFO: List of broken channels: [] 08:33:43:ST3_smx:INFO: Configuring SMX FAST 08:33:45:ST3_smx:INFO: chip: 5-4 21.902970 C 1236.187875 mV 08:33:45:ST3_smx:INFO: Electrons 08:33:45:ST3_smx:INFO: # loops 0 08:33:46:ST3_smx:INFO: # loops 1 08:33:48:ST3_smx:INFO: # loops 2 08:33:50:ST3_smx:INFO: # loops 3 08:33:51:ST3_smx:INFO: # loops 4 08:33:53:ST3_smx:INFO: Total # of broken channels: 0 08:33:53:ST3_smx:INFO: List of broken channels: [] 08:33:53:ST3_smx:INFO: Total # of broken channels: 0 08:33:53:ST3_smx:INFO: List of broken channels: [] 08:33:53:ST3_smx:INFO: Configuring SMX FAST 08:33:55:ST3_smx:INFO: chip: 12-5 31.389742 C 1171.483840 mV 08:33:55:ST3_smx:INFO: Electrons 08:33:55:ST3_smx:INFO: # loops 0 08:33:57:ST3_smx:INFO: # loops 1 08:33:58:ST3_smx:INFO: # loops 2 08:34:00:ST3_smx:INFO: # loops 3 08:34:02:ST3_smx:INFO: # loops 4 08:34:03:ST3_smx:INFO: Total # of broken channels: 0 08:34:03:ST3_smx:INFO: List of broken channels: [] 08:34:03:ST3_smx:INFO: Total # of broken channels: 0 08:34:03:ST3_smx:INFO: List of broken channels: [] 08:34:04:ST3_smx:INFO: Configuring SMX FAST 08:34:06:ST3_smx:INFO: chip: 7-6 50.430383 C 1135.937260 mV 08:34:06:ST3_smx:INFO: Electrons 08:34:06:ST3_smx:INFO: # loops 0 08:34:07:ST3_smx:INFO: # loops 1 08:34:09:ST3_smx:INFO: # loops 2 08:34:11:ST3_smx:INFO: # loops 3 08:34:12:ST3_smx:INFO: # loops 4 08:34:14:ST3_smx:INFO: Total # of broken channels: 0 08:34:14:ST3_smx:INFO: List of broken channels: [] 08:34:14:ST3_smx:INFO: Total # of broken channels: 0 08:34:14:ST3_smx:INFO: List of broken channels: [] 08:34:14:ST3_smx:INFO: Configuring SMX FAST 08:34:16:ST3_smx:INFO: chip: 14-7 25.062742 C 1200.969315 mV 08:34:16:ST3_smx:INFO: Electrons 08:34:16:ST3_smx:INFO: # loops 0 08:34:18:ST3_smx:INFO: # loops 1 08:34:19:ST3_smx:INFO: # loops 2 08:34:21:ST3_smx:INFO: # loops 3 08:34:23:ST3_smx:INFO: # loops 4 08:34:24:ST3_smx:INFO: Total # of broken channels: 0 08:34:24:ST3_smx:INFO: List of broken channels: [] 08:34:24:ST3_smx:INFO: Total # of broken channels: 0 08:34:24:ST3_smx:INFO: List of broken channels: [] 08:34:25:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 08:34:25:febtest:INFO: 1-0 | XA-000-08-002-000-006-007-11 | 25.1 | 1201.0 08:34:25:febtest:INFO: 8-1 | XA-000-08-002-000-004-063-01 | 31.4 | 1177.4 08:34:26:febtest:INFO: 3-2 | XA-000-08-002-000-006-011-11 | 28.2 | 1195.1 08:34:26:febtest:INFO: 10-3 | XA-000-08-002-000-005-232-04 | 21.9 | 1206.9 08:34:26:febtest:INFO: 5-4 | XA-000-08-002-000-006-012-11 | 21.9 | 1230.3 08:34:26:febtest:INFO: 12-5 | XA-000-08-002-000-005-218-13 | 34.6 | 1171.5 08:34:27:febtest:INFO: 7-6 | XA-000-08-002-000-001-083-01 | 50.4 | 1141.9 08:34:27:febtest:INFO: 14-7 | XA-000-08-002-000-005-203-10 | 28.2 | 1201.0 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 2024_01_22-08_32_44 OPERATOR : Kerstin S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : L4UL401032 M4UL4B2010322A2 62 C FEB_SN : 1042 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- SENSOR_ID: MODULE_NAME: L4UL401032 M4UL4B2010322A2 62 C MODULE_TYPE: MODULE_LADDER: L4UL401032 MODULE_MODULE: M4UL4B2010322A2 MODULE_SIZE: 62 MODULE_GRADE: C --------------------------------------- VI_before_Init : ['2.450', '1.8470', '1.851', '0.4771', '7.000', '1.5780', '7.000', '1.5780'] VI_after__Init : ['2.450', '1.9920', '1.850', '0.6014', '7.000', '1.5790', '7.000', '1.5790'] VI_at__the_End : ['0', '0', '0', '0', '0', '0'] 08:34:36:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1042/TestDate_2024_01_22-08_32_44/ 09:44:10:ST3_Shared:INFO: Listo of operators:Kerstin S.; Robert V.; 09:44:11:ST3_Shared:INFO: Listo of operators:Robert V.; 09:44:25:febtest:INFO: FEB 8-2 selected 09:44:25:smx_tester:INFO: Setting Elink clock mode to 160 MHz 09:44:35:febtest:INFO: FEB 8-2 selected 09:44:35:smx_tester:INFO: Setting Elink clock mode to 160 MHz 09:44:40:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:44:40:ST3_Shared:INFO: -------------------------FEB-Sensor------------------------- 09:44:40:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:45:11:ST3_ModuleSelector:INFO: L4UL401032 M4UL4T1010321B2 42 C 09:45:11:ST3_ModuleSelector:INFO: 10182 09:45:11:febtest:INFO: Testing FEB with SN 1059 09:45:12:smx_tester:INFO: Scanning setup 09:45:12:elinks:INFO: Disabling clock on downlink 0 09:45:12:elinks:INFO: Disabling clock on downlink 1 09:45:12:elinks:INFO: Disabling clock on downlink 2 09:45:12:elinks:INFO: Disabling clock on downlink 3 09:45:12:elinks:INFO: Disabling clock on downlink 4 09:45:12:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:45:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:45:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:45:12:elinks:INFO: Disabling clock on downlink 0 09:45:12:elinks:INFO: Disabling clock on downlink 1 09:45:12:elinks:INFO: Disabling clock on downlink 2 09:45:12:elinks:INFO: Disabling clock on downlink 3 09:45:12:elinks:INFO: Disabling clock on downlink 4 09:45:12:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:45:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:45:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:45:12:elinks:INFO: Disabling clock on downlink 0 09:45:12:elinks:INFO: Disabling clock on downlink 1 09:45:12:elinks:INFO: Disabling clock on downlink 2 09:45:13:elinks:INFO: Disabling clock on downlink 3 09:45:13:elinks:INFO: Disabling clock on downlink 4 09:45:13:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:45:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:45:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:45:13:elinks:INFO: Disabling clock on downlink 0 09:45:13:elinks:INFO: Disabling clock on downlink 1 09:45:13:elinks:INFO: Disabling clock on downlink 2 09:45:13:elinks:INFO: Disabling clock on downlink 3 09:45:13:elinks:INFO: Disabling clock on downlink 4 09:45:13:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:45:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:45:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:45:13:elinks:INFO: Disabling clock on downlink 0 09:45:13:elinks:INFO: Disabling clock on downlink 1 09:45:13:elinks:INFO: Disabling clock on downlink 2 09:45:13:elinks:INFO: Disabling clock on downlink 3 09:45:13:elinks:INFO: Disabling clock on downlink 4 09:45:13:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:45:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:45:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:45:13:ST3_emu:ERROR: # of setup_elements is ZERO! 09:45:53:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:45:53:ST3_Shared:INFO: -------------------------FEB-Sensor------------------------- 09:45:53:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:45:57:ST3_ModuleSelector:INFO: L4UL401032 M4UL4T1010321B2 42 C 09:45:57:ST3_ModuleSelector:INFO: 10182 09:45:57:febtest:INFO: Testing FEB with SN 1059 09:45:58:smx_tester:INFO: Scanning setup 09:45:58:elinks:INFO: Disabling clock on downlink 0 09:45:58:elinks:INFO: Disabling clock on downlink 1 09:45:58:elinks:INFO: Disabling clock on downlink 2 09:45:58:elinks:INFO: Disabling clock on downlink 3 09:45:58:elinks:INFO: Disabling clock on downlink 4 09:45:58:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:45:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:45:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:45:58:elinks:INFO: Disabling clock on downlink 0 09:45:58:elinks:INFO: Disabling clock on downlink 1 09:45:58:elinks:INFO: Disabling clock on downlink 2 09:45:58:elinks:INFO: Disabling clock on downlink 3 09:45:58:elinks:INFO: Disabling clock on downlink 4 09:45:58:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:45:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:45:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 09:45:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 09:45:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 09:45:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 09:45:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 09:45:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 09:45:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 09:45:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 09:45:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 09:45:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 09:45:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 09:45:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 09:45:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 09:45:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 09:45:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 09:45:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 09:45:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:45:59:elinks:INFO: Disabling clock on downlink 0 09:45:59:elinks:INFO: Disabling clock on downlink 1 09:45:59:elinks:INFO: Disabling clock on downlink 2 09:45:59:elinks:INFO: Disabling clock on downlink 3 09:45:59:elinks:INFO: Disabling clock on downlink 4 09:45:59:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:45:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:45:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:45:59:elinks:INFO: Disabling clock on downlink 0 09:45:59:elinks:INFO: Disabling clock on downlink 1 09:45:59:elinks:INFO: Disabling clock on downlink 2 09:45:59:elinks:INFO: Disabling clock on downlink 3 09:45:59:elinks:INFO: Disabling clock on downlink 4 09:45:59:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:45:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:45:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:45:59:elinks:INFO: Disabling clock on downlink 0 09:45:59:elinks:INFO: Disabling clock on downlink 1 09:45:59:elinks:INFO: Disabling clock on downlink 2 09:45:59:elinks:INFO: Disabling clock on downlink 3 09:45:59:elinks:INFO: Disabling clock on downlink 4 09:45:59:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:45:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:45:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:45:59:setup_element:INFO: Scanning clock phase 09:45:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:45:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:46:00:setup_element:INFO: Clock phase scan results for group 0, downlink 1 09:46:00:setup_element:INFO: Eye window for uplink 0 : X________________________________________________________________________XXXXXXX Clock Delay: 36 09:46:00:setup_element:INFO: Eye window for uplink 1 : X________________________________________________________________________XXXXXXX Clock Delay: 36 09:46:00:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXXX Clock Delay: 35 09:46:00:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXXX Clock Delay: 35 09:46:00:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 09:46:00:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 09:46:00:setup_element:INFO: Eye window for uplink 6 : _________________________________________________________________________XXXXXX_ Clock Delay: 35 09:46:00:setup_element:INFO: Eye window for uplink 7 : _________________________________________________________________________XXXXXX_ Clock Delay: 35 09:46:00:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:46:00:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:46:00:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:46:00:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 09:46:00:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXX______ Clock Delay: 31 09:46:00:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXX______ Clock Delay: 31 09:46:00:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 09:46:00:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 09:46:00:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1 09:46:00:setup_element:INFO: Scanning data phases 09:46:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:46:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:46:05:setup_element:INFO: Data phase scan results for group 0, downlink 1 09:46:05:setup_element:INFO: Eye window for uplink 0 : _____________XXXXXX_____________________ Data delay found: 35 09:46:05:setup_element:INFO: Eye window for uplink 1 : ________XXXXXX__________________________ Data delay found: 30 09:46:05:setup_element:INFO: Eye window for uplink 2 : __________XXXXX_________________________ Data delay found: 32 09:46:05:setup_element:INFO: Eye window for uplink 3 : _______XXXXX____________________________ Data delay found: 29 09:46:05:setup_element:INFO: Eye window for uplink 4 : ______XXXXX_____________________________ Data delay found: 28 09:46:05:setup_element:INFO: Eye window for uplink 5 : __XXXXX_________________________________ Data delay found: 24 09:46:05:setup_element:INFO: Eye window for uplink 6 : _XXXX___________________________________ Data delay found: 22 09:46:05:setup_element:INFO: Eye window for uplink 7 : XXX_________________________________XXXX Data delay found: 19 09:46:05:setup_element:INFO: Eye window for uplink 8 : _______________________XXXX_____________ Data delay found: 4 09:46:05:setup_element:INFO: Eye window for uplink 9 : ___________________________XXXXXX_______ Data delay found: 9 09:46:05:setup_element:INFO: Eye window for uplink 10: ________________________XXXXX___________ Data delay found: 6 09:46:05:setup_element:INFO: Eye window for uplink 11: ____________________________XXXXX_______ Data delay found: 10 09:46:05:setup_element:INFO: Eye window for uplink 12: ___________________________XXXXX________ Data delay found: 9 09:46:05:setup_element:INFO: Eye window for uplink 13: ______________________________XXXX______ Data delay found: 11 09:46:05:setup_element:INFO: Eye window for uplink 14: _________________________XXXX___________ Data delay found: 6 09:46:05:setup_element:INFO: Eye window for uplink 15: __________________________XXXXX_________ Data delay found: 8 09:46:05:setup_element:INFO: Setting the data phase to 35 for uplink 0 09:46:05:setup_element:INFO: Setting the data phase to 30 for uplink 1 09:46:05:setup_element:INFO: Setting the data phase to 32 for uplink 2 09:46:05:setup_element:INFO: Setting the data phase to 29 for uplink 3 09:46:05:setup_element:INFO: Setting the data phase to 28 for uplink 4 09:46:05:setup_element:INFO: Setting the data phase to 24 for uplink 5 09:46:05:setup_element:INFO: Setting the data phase to 22 for uplink 6 09:46:05:setup_element:INFO: Setting the data phase to 19 for uplink 7 09:46:05:setup_element:INFO: Setting the data phase to 4 for uplink 8 09:46:05:setup_element:INFO: Setting the data phase to 9 for uplink 9 09:46:05:setup_element:INFO: Setting the data phase to 6 for uplink 10 09:46:05:setup_element:INFO: Setting the data phase to 10 for uplink 11 09:46:05:setup_element:INFO: Setting the data phase to 9 for uplink 12 09:46:05:setup_element:INFO: Setting the data phase to 11 for uplink 13 09:46:05:setup_element:INFO: Setting the data phase to 6 for uplink 14 09:46:05:setup_element:INFO: Setting the data phase to 8 for uplink 15 09:46:05:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 34 Window Length: 68 Eye Windows: Uplink 0: X________________________________________________________________________XXXXXXX Uplink 1: X________________________________________________________________________XXXXXXX Uplink 2: ________________________________________________________________________XXXXXXXX Uplink 3: ________________________________________________________________________XXXXXXXX Uplink 4: _______________________________________________________________________XXXXXXXX_ Uplink 5: _______________________________________________________________________XXXXXXXX_ Uplink 6: _________________________________________________________________________XXXXXX_ Uplink 7: _________________________________________________________________________XXXXXX_ Uplink 8: _____________________________________________________________________XXXXXXXX___ Uplink 9: _____________________________________________________________________XXXXXXXX___ Uplink 10: _____________________________________________________________________XXXXXXXX___ Uplink 11: _____________________________________________________________________XXXXXXXX___ Uplink 12: ______________________________________________________________________XXXX______ Uplink 13: ______________________________________________________________________XXXX______ Uplink 14: ______________________________________________________________________XXXXXXX___ Uplink 15: ______________________________________________________________________XXXXXXX___ Data phase characteristics: Uplink 0: Optimal Phase: 35 Window Length: 34 Eye Window: _____________XXXXXX_____________________ Uplink 1: Optimal Phase: 30 Window Length: 34 Eye Window: ________XXXXXX__________________________ Uplink 2: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 3: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 4: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 5: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 6: Optimal Phase: 22 Window Length: 36 Eye Window: _XXXX___________________________________ Uplink 7: Optimal Phase: 19 Window Length: 33 Eye Window: XXX_________________________________XXXX Uplink 8: Optimal Phase: 4 Window Length: 36 Eye Window: _______________________XXXX_____________ Uplink 9: Optimal Phase: 9 Window Length: 34 Eye Window: ___________________________XXXXXX_______ Uplink 10: Optimal Phase: 6 Window Length: 35 Eye Window: ________________________XXXXX___________ Uplink 11: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ Uplink 12: Optimal Phase: 9 Window Length: 35 Eye Window: ___________________________XXXXX________ Uplink 13: Optimal Phase: 11 Window Length: 36 Eye Window: ______________________________XXXX______ Uplink 14: Optimal Phase: 6 Window Length: 36 Eye Window: _________________________XXXX___________ Uplink 15: Optimal Phase: 8 Window Length: 35 Eye Window: __________________________XXXXX_________ ] 09:46:05:setup_element:INFO: Beginning SMX ASICs map scan 09:46:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:46:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:46:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 09:46:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 09:46:06:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 09:46:06:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 09:46:06:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 09:46:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 09:46:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 09:46:06:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 09:46:06:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 09:46:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 09:46:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 09:46:06:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 09:46:06:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 09:46:06:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 09:46:07:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 09:46:07:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 09:46:07:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 09:46:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 09:46:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 09:46:08:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0) ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9) ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2) ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4) ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13) ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6) ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15) Clock Phase Characteristic: Optimal Phase: 34 Window Length: 68 Eye Windows: Uplink 0: X________________________________________________________________________XXXXXXX Uplink 1: X________________________________________________________________________XXXXXXX Uplink 2: ________________________________________________________________________XXXXXXXX Uplink 3: ________________________________________________________________________XXXXXXXX Uplink 4: _______________________________________________________________________XXXXXXXX_ Uplink 5: _______________________________________________________________________XXXXXXXX_ Uplink 6: _________________________________________________________________________XXXXXX_ Uplink 7: _________________________________________________________________________XXXXXX_ Uplink 8: _____________________________________________________________________XXXXXXXX___ Uplink 9: _____________________________________________________________________XXXXXXXX___ Uplink 10: _____________________________________________________________________XXXXXXXX___ Uplink 11: _____________________________________________________________________XXXXXXXX___ Uplink 12: ______________________________________________________________________XXXX______ Uplink 13: ______________________________________________________________________XXXX______ Uplink 14: ______________________________________________________________________XXXXXXX___ Uplink 15: ______________________________________________________________________XXXXXXX___ Data phase characteristics: Uplink 0: Optimal Phase: 35 Window Length: 34 Eye Window: _____________XXXXXX_____________________ Uplink 1: Optimal Phase: 30 Window Length: 34 Eye Window: ________XXXXXX__________________________ Uplink 2: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 3: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 4: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 5: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 6: Optimal Phase: 22 Window Length: 36 Eye Window: _XXXX___________________________________ Uplink 7: Optimal Phase: 19 Window Length: 33 Eye Window: XXX_________________________________XXXX Uplink 8: Optimal Phase: 4 Window Length: 36 Eye Window: _______________________XXXX_____________ Uplink 9: Optimal Phase: 9 Window Length: 34 Eye Window: ___________________________XXXXXX_______ Uplink 10: Optimal Phase: 6 Window Length: 35 Eye Window: ________________________XXXXX___________ Uplink 11: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ Uplink 12: Optimal Phase: 9 Window Length: 35 Eye Window: ___________________________XXXXX________ Uplink 13: Optimal Phase: 11 Window Length: 36 Eye Window: ______________________________XXXX______ Uplink 14: Optimal Phase: 6 Window Length: 36 Eye Window: _________________________XXXX___________ Uplink 15: Optimal Phase: 8 Window Length: 35 Eye Window: __________________________XXXXX_________ 09:46:08:setup_element:INFO: Performing Elink synchronization 09:46:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:46:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:46:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 09:46:08:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 09:46:08:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 09:46:08:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 09:46:09:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)] 09:46:09:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 09:46:09:febtest:INFO: 1-0 | XA-000-08-002-000-005-209-13 | 15.6 | 1236.2 09:46:10:febtest:INFO: 8-1 | XA-000-08-002-000-001-143-09 | 15.6 | 1236.2 09:46:10:febtest:INFO: 3-2 | XA-000-08-002-000-005-212-13 | 18.7 | 1230.3 09:46:10:febtest:INFO: 10-3 | XA-000-08-002-000-001-157-14 | 15.6 | 1242.0 09:46:10:febtest:INFO: 5-4 | XA-000-08-002-000-005-185-06 | 21.9 | 1218.6 09:46:11:febtest:INFO: 12-5 | XA-000-08-002-000-001-165-07 | 25.1 | 1206.9 09:46:11:febtest:INFO: 7-6 | XA-000-08-002-000-005-199-10 | 21.9 | 1218.6 09:46:11:febtest:INFO: 14-7 | XA-000-08-002-000-001-160-07 | 28.2 | 1189.2 09:46:11:ST3_smx:INFO: Configuring SMX FAST 09:46:13:ST3_smx:INFO: chip: 1-0 21.902970 C 1218.600960 mV 09:46:13:ST3_smx:INFO: Electrons 09:46:13:ST3_smx:INFO: # loops 0 09:46:15:ST3_smx:INFO: # loops 1 09:46:17:ST3_smx:INFO: # loops 2 09:46:18:ST3_smx:INFO: # loops 3 09:46:20:ST3_smx:INFO: # loops 4 09:46:21:ST3_smx:INFO: Total # of broken channels: 0 09:46:21:ST3_smx:INFO: List of broken channels: [] 09:46:21:ST3_smx:INFO: Total # of broken channels: 0 09:46:21:ST3_smx:INFO: List of broken channels: [] 09:46:22:ST3_smx:INFO: Configuring SMX FAST 09:46:24:ST3_smx:INFO: chip: 8-1 34.556970 C 1183.292940 mV 09:46:24:ST3_smx:INFO: Electrons 09:46:24:ST3_smx:INFO: # loops 0 09:46:25:ST3_smx:INFO: # loops 1 09:46:27:ST3_smx:INFO: # loops 2 09:46:29:ST3_smx:INFO: # loops 3 09:46:30:ST3_smx:INFO: # loops 4 09:46:32:ST3_smx:INFO: Total # of broken channels: 0 09:46:32:ST3_smx:INFO: List of broken channels: [] 09:46:32:ST3_smx:INFO: Total # of broken channels: 1 09:46:32:ST3_smx:INFO: List of broken channels: [1] 09:46:32:ST3_smx:INFO: Configuring SMX FAST 09:46:34:ST3_smx:INFO: chip: 3-2 21.902970 C 1212.728715 mV 09:46:34:ST3_smx:INFO: Electrons 09:46:34:ST3_smx:INFO: # loops 0 09:46:36:ST3_smx:INFO: # loops 1 09:46:37:ST3_smx:INFO: # loops 2 09:46:39:ST3_smx:INFO: # loops 3 09:46:40:ST3_smx:INFO: # loops 4 09:46:42:ST3_smx:INFO: Total # of broken channels: 0 09:46:42:ST3_smx:INFO: List of broken channels: [] 09:46:42:ST3_smx:INFO: Total # of broken channels: 0 09:46:42:ST3_smx:INFO: List of broken channels: [] 09:46:42:ST3_smx:INFO: Configuring SMX FAST 09:46:44:ST3_smx:INFO: chip: 10-3 28.225000 C 1200.969315 mV 09:46:44:ST3_smx:INFO: Electrons 09:46:44:ST3_smx:INFO: # loops 0 09:46:46:ST3_smx:INFO: # loops 1 09:46:47:ST3_smx:INFO: # loops 2 09:46:49:ST3_smx:INFO: # loops 3 09:46:51:ST3_smx:INFO: # loops 4 09:46:52:ST3_smx:INFO: Total # of broken channels: 0 09:46:52:ST3_smx:INFO: List of broken channels: [] 09:46:52:ST3_smx:INFO: Total # of broken channels: 0 09:46:52:ST3_smx:INFO: List of broken channels: [] 09:46:52:ST3_smx:INFO: Configuring SMX FAST 09:46:54:ST3_smx:INFO: chip: 5-4 37.726682 C 1183.292940 mV 09:46:54:ST3_smx:INFO: Electrons 09:46:54:ST3_smx:INFO: # loops 0 09:46:56:ST3_smx:INFO: # loops 1 09:46:58:ST3_smx:INFO: # loops 2 09:46:59:ST3_smx:INFO: # loops 3 09:47:01:ST3_smx:INFO: # loops 4 09:47:02:ST3_smx:INFO: Total # of broken channels: 1 09:47:02:ST3_smx:INFO: List of broken channels: [9] 09:47:02:ST3_smx:INFO: Total # of broken channels: 2 09:47:02:ST3_smx:INFO: List of broken channels: [9, 75] 09:47:03:ST3_smx:INFO: Configuring SMX FAST 09:47:05:ST3_smx:INFO: chip: 12-5 31.389742 C 1195.082160 mV 09:47:05:ST3_smx:INFO: Electrons 09:47:05:ST3_smx:INFO: # loops 0 09:47:06:ST3_smx:INFO: # loops 1 09:47:08:ST3_smx:INFO: # loops 2 09:47:09:ST3_smx:INFO: # loops 3 09:47:11:ST3_smx:INFO: # loops 4 09:47:13:ST3_smx:INFO: Total # of broken channels: 0 09:47:13:ST3_smx:INFO: List of broken channels: [] 09:47:13:ST3_smx:INFO: Total # of broken channels: 0 09:47:13:ST3_smx:INFO: List of broken channels: [] 09:47:13:ST3_smx:INFO: Configuring SMX FAST 09:47:15:ST3_smx:INFO: chip: 7-6 31.389742 C 1200.969315 mV 09:47:15:ST3_smx:INFO: Electrons 09:47:15:ST3_smx:INFO: # loops 0 09:47:16:ST3_smx:INFO: # loops 1 09:47:18:ST3_smx:INFO: # loops 2 09:47:20:ST3_smx:INFO: # loops 3 09:47:21:ST3_smx:INFO: # loops 4 09:47:23:ST3_smx:INFO: Total # of broken channels: 0 09:47:23:ST3_smx:INFO: List of broken channels: [] 09:47:23:ST3_smx:INFO: Total # of broken channels: 1 09:47:23:ST3_smx:INFO: List of broken channels: [21] 09:47:23:ST3_smx:INFO: Configuring SMX FAST 09:47:25:ST3_smx:INFO: chip: 14-7 28.225000 C 1200.969315 mV 09:47:25:ST3_smx:INFO: Electrons 09:47:25:ST3_smx:INFO: # loops 0 09:47:27:ST3_smx:INFO: # loops 1 09:47:28:ST3_smx:INFO: # loops 2 09:47:30:ST3_smx:INFO: # loops 3 09:47:31:ST3_smx:INFO: # loops 4 09:47:33:ST3_smx:INFO: Total # of broken channels: 0 09:47:33:ST3_smx:INFO: List of broken channels: [] 09:47:33:ST3_smx:INFO: Total # of broken channels: 0 09:47:33:ST3_smx:INFO: List of broken channels: [] 09:47:33:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 09:47:34:febtest:INFO: 1-0 | XA-000-08-002-000-005-209-13 | 21.9 | 1218.6 09:47:34:febtest:INFO: 8-1 | XA-000-08-002-000-001-143-09 | 34.6 | 1183.3 09:47:34:febtest:INFO: 3-2 | XA-000-08-002-000-005-212-13 | 25.1 | 1212.7 09:47:34:febtest:INFO: 10-3 | XA-000-08-002-000-001-157-14 | 31.4 | 1195.1 09:47:35:febtest:INFO: 5-4 | XA-000-08-002-000-005-185-06 | 37.7 | 1183.3 09:47:35:febtest:INFO: 12-5 | XA-000-08-002-000-001-165-07 | 31.4 | 1195.1 09:47:35:febtest:INFO: 7-6 | XA-000-08-002-000-005-199-10 | 31.4 | 1201.0 09:47:35:febtest:INFO: 14-7 | XA-000-08-002-000-001-160-07 | 28.2 | 1201.0 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 2024_01_22-09_45_53 OPERATOR : Robert V.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : L4UL401032 M4UL4T1010321B2 42 C FEB_SN : 1059 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- SENSOR_ID: 10182 MODULE_NAME: L4UL401032 M4UL4T1010321B2 42 C MODULE_TYPE: MODULE_LADDER: L4UL401032 MODULE_MODULE: M4UL4T1010321B2 MODULE_SIZE: 42 MODULE_GRADE: C --------------------------------------- VI_before_Init : ['2.450', '1.7250', '1.851', '0.5738', '7.000', '1.5790', '7.000', '1.5790'] VI_after__Init : ['2.450', '1.9870', '1.850', '0.5924', '7.000', '1.5800', '7.000', '1.5800'] VI_at__the_End : ['0', '0', '0', '0', '0', '0'] 09:48:03:ST3_Shared:INFO: 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