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FEB_1059 12.01.24 13:40:41
Info
13:40:39:febtest:INFO: FEB 8-2 selected
13:40:39:smx_tester:INFO: Setting Elink clock mode to 160 MHz
13:40:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:40:41:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
13:40:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:40:41:febtest:INFO: Testing FEB with SN 1059
13:40:42:smx_tester:INFO: Scanning setup
13:40:42:elinks:INFO: Disabling clock on downlink 0
13:40:42:elinks:INFO: Disabling clock on downlink 1
13:40:42:elinks:INFO: Disabling clock on downlink 2
13:40:42:elinks:INFO: Disabling clock on downlink 3
13:40:42:elinks:INFO: Disabling clock on downlink 4
13:40:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:40:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:40:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:40:43:elinks:INFO: Disabling clock on downlink 0
13:40:43:elinks:INFO: Disabling clock on downlink 1
13:40:43:elinks:INFO: Disabling clock on downlink 2
13:40:43:elinks:INFO: Disabling clock on downlink 3
13:40:43:elinks:INFO: Disabling clock on downlink 4
13:40:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:40:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:40:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
13:40:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
13:40:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
13:40:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
13:40:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
13:40:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
13:40:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
13:40:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
13:40:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:40:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:40:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:40:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:40:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:40:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:40:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:40:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:40:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:40:43:elinks:INFO: Disabling clock on downlink 0
13:40:43:elinks:INFO: Disabling clock on downlink 1
13:40:43:elinks:INFO: Disabling clock on downlink 2
13:40:43:elinks:INFO: Disabling clock on downlink 3
13:40:43:elinks:INFO: Disabling clock on downlink 4
13:40:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:40:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:40:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:40:43:elinks:INFO: Disabling clock on downlink 0
13:40:43:elinks:INFO: Disabling clock on downlink 1
13:40:43:elinks:INFO: Disabling clock on downlink 2
13:40:43:elinks:INFO: Disabling clock on downlink 3
13:40:43:elinks:INFO: Disabling clock on downlink 4
13:40:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:40:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:40:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:40:43:elinks:INFO: Disabling clock on downlink 0
13:40:43:elinks:INFO: Disabling clock on downlink 1
13:40:43:elinks:INFO: Disabling clock on downlink 2
13:40:43:elinks:INFO: Disabling clock on downlink 3
13:40:43:elinks:INFO: Disabling clock on downlink 4
13:40:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:40:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:40:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:40:43:setup_element:INFO: Scanning clock phase
13:40:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:40:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:40:44:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:40:44:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
13:40:44:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
13:40:44:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:40:44:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:40:44:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:40:44:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:40:44:setup_element:INFO: Eye window for uplink 6 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:40:44:setup_element:INFO: Eye window for uplink 7 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:40:44:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:40:44:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:40:44:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:40:44:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:40:44:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________________
Clock Delay: 40
13:40:44:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________________
Clock Delay: 40
13:40:44:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:40:44:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:40:44:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
13:40:44:setup_element:INFO: Scanning data phases
13:40:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:40:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:40:49:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:40:49:setup_element:INFO: Eye window for uplink 0 : ____________XXXXXX______________________
Data delay found: 34
13:40:49:setup_element:INFO: Eye window for uplink 1 : ________XXXXXX__________________________
Data delay found: 30
13:40:49:setup_element:INFO: Eye window for uplink 2 : __________XXXX__________________________
Data delay found: 31
13:40:49:setup_element:INFO: Eye window for uplink 3 : _______XXXX_____________________________
Data delay found: 28
13:40:49:setup_element:INFO: Eye window for uplink 4 : ______XXXXX_____________________________
Data delay found: 28
13:40:49:setup_element:INFO: Eye window for uplink 5 : __XXXXX_________________________________
Data delay found: 24
13:40:49:setup_element:INFO: Eye window for uplink 6 : _XXXX___________________________________
Data delay found: 22
13:40:49:setup_element:INFO: Eye window for uplink 7 : XX__________________________________XXXX
Data delay found: 18
13:40:49:setup_element:INFO: Eye window for uplink 8 : ______________________XXXXX_____________
Data delay found: 4
13:40:49:setup_element:INFO: Eye window for uplink 9 : ___________________________XXXXX________
Data delay found: 9
13:40:49:setup_element:INFO: Eye window for uplink 10: ________________________XXXXX___________
Data delay found: 6
13:40:49:setup_element:INFO: Eye window for uplink 11: ____________________________XXXXX_______
Data delay found: 10
13:40:49:setup_element:INFO: Eye window for uplink 12: __________________________XXXXX_________
Data delay found: 8
13:40:49:setup_element:INFO: Eye window for uplink 13: _____________________________XXXXX______
Data delay found: 11
13:40:49:setup_element:INFO: Eye window for uplink 14: ________________________XXXXX___________
Data delay found: 6
13:40:49:setup_element:INFO: Eye window for uplink 15: __________________________XXXXX_________
Data delay found: 8
13:40:49:setup_element:INFO: Setting the data phase to 34 for uplink 0
13:40:49:setup_element:INFO: Setting the data phase to 30 for uplink 1
13:40:49:setup_element:INFO: Setting the data phase to 31 for uplink 2
13:40:49:setup_element:INFO: Setting the data phase to 28 for uplink 3
13:40:49:setup_element:INFO: Setting the data phase to 28 for uplink 4
13:40:49:setup_element:INFO: Setting the data phase to 24 for uplink 5
13:40:49:setup_element:INFO: Setting the data phase to 22 for uplink 6
13:40:49:setup_element:INFO: Setting the data phase to 18 for uplink 7
13:40:49:setup_element:INFO: Setting the data phase to 4 for uplink 8
13:40:49:setup_element:INFO: Setting the data phase to 9 for uplink 9
13:40:49:setup_element:INFO: Setting the data phase to 6 for uplink 10
13:40:49:setup_element:INFO: Setting the data phase to 10 for uplink 11
13:40:49:setup_element:INFO: Setting the data phase to 8 for uplink 12
13:40:49:setup_element:INFO: Setting the data phase to 11 for uplink 13
13:40:49:setup_element:INFO: Setting the data phase to 6 for uplink 14
13:40:49:setup_element:INFO: Setting the data phase to 8 for uplink 15
13:40:49:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 69
Eye Windows:
Uplink 0: _________________________________________________________________________XXXXXXX
Uplink 1: _________________________________________________________________________XXXXXXX
Uplink 2: ________________________________________________________________________XXXXXXX_
Uplink 3: ________________________________________________________________________XXXXXXX_
Uplink 4: ________________________________________________________________________XXXXXXX_
Uplink 5: ________________________________________________________________________XXXXXXX_
Uplink 6: _________________________________________________________________________XXXXXX_
Uplink 7: _________________________________________________________________________XXXXXX_
Uplink 8: _____________________________________________________________________XXXXXXX____
Uplink 9: _____________________________________________________________________XXXXXXX____
Uplink 10: _____________________________________________________________________XXXXXXX____
Uplink 11: _____________________________________________________________________XXXXXXX____
Uplink 12: ________________________________________________________________________________
Uplink 13: ________________________________________________________________________________
Uplink 14: _____________________________________________________________________XXXXXXXX___
Uplink 15: _____________________________________________________________________XXXXXXXX___
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 1:
Optimal Phase: 30
Window Length: 34
Eye Window: ________XXXXXX__________________________
Uplink 2:
Optimal Phase: 31
Window Length: 36
Eye Window: __________XXXX__________________________
Uplink 3:
Optimal Phase: 28
Window Length: 36
Eye Window: _______XXXX_____________________________
Uplink 4:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 5:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 6:
Optimal Phase: 22
Window Length: 36
Eye Window: _XXXX___________________________________
Uplink 7:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 8:
Optimal Phase: 4
Window Length: 35
Eye Window: ______________________XXXXX_____________
Uplink 9:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 10:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 11:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 12:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 13:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 14:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 15:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
]
13:40:49:setup_element:INFO: Beginning SMX ASICs map scan
13:40:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:40:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:40:49:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:40:49:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:40:49:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:40:49:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:40:50:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:40:50:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:40:50:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:40:50:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:40:50:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:40:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:40:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:40:50:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:40:50:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:40:50:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:40:50:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:40:51:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:40:51:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:40:51:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:40:51:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:40:52:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 69
Eye Windows:
Uplink 0: _________________________________________________________________________XXXXXXX
Uplink 1: _________________________________________________________________________XXXXXXX
Uplink 2: ________________________________________________________________________XXXXXXX_
Uplink 3: ________________________________________________________________________XXXXXXX_
Uplink 4: ________________________________________________________________________XXXXXXX_
Uplink 5: ________________________________________________________________________XXXXXXX_
Uplink 6: _________________________________________________________________________XXXXXX_
Uplink 7: _________________________________________________________________________XXXXXX_
Uplink 8: _____________________________________________________________________XXXXXXX____
Uplink 9: _____________________________________________________________________XXXXXXX____
Uplink 10: _____________________________________________________________________XXXXXXX____
Uplink 11: _____________________________________________________________________XXXXXXX____
Uplink 12: ________________________________________________________________________________
Uplink 13: ________________________________________________________________________________
Uplink 14: _____________________________________________________________________XXXXXXXX___
Uplink 15: _____________________________________________________________________XXXXXXXX___
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 1:
Optimal Phase: 30
Window Length: 34
Eye Window: ________XXXXXX__________________________
Uplink 2:
Optimal Phase: 31
Window Length: 36
Eye Window: __________XXXX__________________________
Uplink 3:
Optimal Phase: 28
Window Length: 36
Eye Window: _______XXXX_____________________________
Uplink 4:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 5:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 6:
Optimal Phase: 22
Window Length: 36
Eye Window: _XXXX___________________________________
Uplink 7:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 8:
Optimal Phase: 4
Window Length: 35
Eye Window: ______________________XXXXX_____________
Uplink 9:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 10:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 11:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 12:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 13:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 14:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 15:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
13:40:52:setup_element:INFO: Performing Elink synchronization
13:40:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:40:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:40:52:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:40:52:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:40:52:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:40:52:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:40:52:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
13:40:53:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
13:40:53:febtest:INFO: 1-0 | XA-000-08-002-000-005-209-13 | 21.9 | 1236.2
13:40:54:febtest:INFO: 8-1 | XA-000-08-002-000-001-143-09 | 21.9 | 1236.2
13:40:54:febtest:INFO: 3-2 | XA-000-08-002-000-005-212-13 | 28.2 | 1224.5
13:40:54:febtest:INFO: 10-3 | XA-000-08-002-000-001-157-14 | 21.9 | 1236.2
13:40:54:febtest:INFO: 5-4 | XA-000-08-002-000-005-185-06 | 28.2 | 1218.6
13:40:54:febtest:INFO: 12-5 | XA-000-08-002-000-001-165-07 | 31.4 | 1206.9
13:40:55:febtest:INFO: 7-6 | XA-000-08-002-000-005-199-10 | 28.2 | 1212.7
13:40:55:febtest:INFO: 14-7 | XA-000-08-002-000-001-160-07 | 37.7 | 1183.3
13:40:55:ST3_smx:INFO: Configuring SMX FAST
13:40:57:ST3_smx:INFO: chip: 1-0 28.225000 C 1218.600960 mV
13:40:57:ST3_smx:INFO: Electrons
13:40:57:ST3_smx:INFO: # loops 0
13:40:59:ST3_smx:INFO: # loops 1
13:41:00:ST3_smx:INFO: # loops 2
13:41:02:ST3_smx:INFO: # loops 3
13:41:04:ST3_smx:INFO: # loops 4
13:41:05:ST3_smx:INFO: Total # of broken channels: 0
13:41:05:ST3_smx:INFO: List of broken channels: []
13:41:05:ST3_smx:INFO: Total # of broken channels: 0
13:41:05:ST3_smx:INFO: List of broken channels: []
13:41:06:ST3_smx:INFO: Configuring SMX FAST
13:41:08:ST3_smx:INFO: chip: 8-1 40.898880 C 1177.390875 mV
13:41:08:ST3_smx:INFO: Electrons
13:41:08:ST3_smx:INFO: # loops 0
13:41:10:ST3_smx:INFO: # loops 1
13:41:11:ST3_smx:INFO: # loops 2
13:41:13:ST3_smx:INFO: # loops 3
13:41:15:ST3_smx:INFO: # loops 4
13:41:16:ST3_smx:INFO: Total # of broken channels: 0
13:41:16:ST3_smx:INFO: List of broken channels: []
13:41:16:ST3_smx:INFO: Total # of broken channels: 0
13:41:16:ST3_smx:INFO: List of broken channels: []
13:41:17:ST3_smx:INFO: Configuring SMX FAST
13:41:19:ST3_smx:INFO: chip: 3-2 34.556970 C 1206.851500 mV
13:41:19:ST3_smx:INFO: Electrons
13:41:19:ST3_smx:INFO: # loops 0
13:41:21:ST3_smx:INFO: # loops 1
13:41:22:ST3_smx:INFO: # loops 2
13:41:24:ST3_smx:INFO: # loops 3
13:41:26:ST3_smx:INFO: # loops 4
13:41:28:ST3_smx:INFO: Total # of broken channels: 0
13:41:28:ST3_smx:INFO: List of broken channels: []
13:41:28:ST3_smx:INFO: Total # of broken channels: 0
13:41:28:ST3_smx:INFO: List of broken channels: []
13:41:28:ST3_smx:INFO: Configuring SMX FAST
13:41:30:ST3_smx:INFO: chip: 10-3 34.556970 C 1195.082160 mV
13:41:30:ST3_smx:INFO: Electrons
13:41:30:ST3_smx:INFO: # loops 0
13:41:32:ST3_smx:INFO: # loops 1
13:41:34:ST3_smx:INFO: # loops 2
13:41:35:ST3_smx:INFO: # loops 3
13:41:37:ST3_smx:INFO: # loops 4
13:41:39:ST3_smx:INFO: Total # of broken channels: 0
13:41:39:ST3_smx:INFO: List of broken channels: []
13:41:39:ST3_smx:INFO: Total # of broken channels: 0
13:41:39:ST3_smx:INFO: List of broken channels: []
13:41:39:ST3_smx:INFO: Configuring SMX FAST
13:41:41:ST3_smx:INFO: chip: 5-4 40.898880 C 1183.292940 mV
13:41:41:ST3_smx:INFO: Electrons
13:41:41:ST3_smx:INFO: # loops 0
13:41:43:ST3_smx:INFO: # loops 1
13:41:45:ST3_smx:INFO: # loops 2
13:41:47:ST3_smx:INFO: # loops 3
13:41:48:ST3_smx:INFO: # loops 4
13:41:50:ST3_smx:INFO: Total # of broken channels: 0
13:41:50:ST3_smx:INFO: List of broken channels: []
13:41:50:ST3_smx:INFO: Total # of broken channels: 0
13:41:50:ST3_smx:INFO: List of broken channels: []
13:41:51:ST3_smx:INFO: Configuring SMX FAST
13:41:53:ST3_smx:INFO: chip: 12-5 37.726682 C 1189.190035 mV
13:41:53:ST3_smx:INFO: Electrons
13:41:53:ST3_smx:INFO: # loops 0
13:41:54:ST3_smx:INFO: # loops 1
13:41:56:ST3_smx:INFO: # loops 2
13:41:58:ST3_smx:INFO: # loops 3
13:41:59:ST3_smx:INFO: # loops 4
13:42:01:ST3_smx:INFO: Total # of broken channels: 0
13:42:01:ST3_smx:INFO: List of broken channels: []
13:42:01:ST3_smx:INFO: Total # of broken channels: 0
13:42:01:ST3_smx:INFO: List of broken channels: []
13:42:02:ST3_smx:INFO: Configuring SMX FAST
13:42:04:ST3_smx:INFO: chip: 7-6 37.726682 C 1206.851500 mV
13:42:04:ST3_smx:INFO: Electrons
13:42:04:ST3_smx:INFO: # loops 0
13:42:05:ST3_smx:INFO: # loops 1
13:42:07:ST3_smx:INFO: # loops 2
13:42:09:ST3_smx:INFO: # loops 3
13:42:10:ST3_smx:INFO: # loops 4
13:42:12:ST3_smx:INFO: Total # of broken channels: 0
13:42:12:ST3_smx:INFO: List of broken channels: []
13:42:12:ST3_smx:INFO: Total # of broken channels: 0
13:42:12:ST3_smx:INFO: List of broken channels: []
13:42:12:ST3_smx:INFO: Configuring SMX FAST
13:42:15:ST3_smx:INFO: chip: 14-7 37.726682 C 1195.082160 mV
13:42:15:ST3_smx:INFO: Electrons
13:42:15:ST3_smx:INFO: # loops 0
13:42:16:ST3_smx:INFO: # loops 1
13:42:18:ST3_smx:INFO: # loops 2
13:42:19:ST3_smx:INFO: # loops 3
13:42:21:ST3_smx:INFO: # loops 4
13:42:23:ST3_smx:INFO: Total # of broken channels: 0
13:42:23:ST3_smx:INFO: List of broken channels: []
13:42:23:ST3_smx:INFO: Total # of broken channels: 0
13:42:23:ST3_smx:INFO: List of broken channels: []
13:42:23:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
13:42:24:febtest:INFO: 1-0 | XA-000-08-002-000-005-209-13 | 31.4 | 1212.7
13:42:24:febtest:INFO: 8-1 | XA-000-08-002-000-001-143-09 | 40.9 | 1183.3
13:42:24:febtest:INFO: 3-2 | XA-000-08-002-000-005-212-13 | 34.6 | 1206.9
13:42:24:febtest:INFO: 10-3 | XA-000-08-002-000-001-157-14 | 37.7 | 1195.1
13:42:24:febtest:INFO: 5-4 | XA-000-08-002-000-005-185-06 | 44.1 | 1183.3
13:42:25:febtest:INFO: 12-5 | XA-000-08-002-000-001-165-07 | 40.9 | 1189.2
13:42:25:febtest:INFO: 7-6 | XA-000-08-002-000-005-199-10 | 37.7 | 1206.9
13:42:25:febtest:INFO: 14-7 | XA-000-08-002-000-001-160-07 | 37.7 | 1195.1
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_12-13_40_41
OPERATOR : Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L6DL200120 M6DL2B2001202B2 124 A
FEB_SN : 1059
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.448', '1.8010', '1.846', '2.2700', '7.001', '1.5500', '7.001', '1.5500']
VI_after__Init : ['2.450', '1.9770', '1.850', '0.6014', '7.000', '1.5430', '7.000', '1.5430']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
13:42:27:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1059/TestDate_2024_01_12-13_40_41/