13:35:32:febtest:INFO:	FEB 8-2 selected
13:35:32:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
13:35:49:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:35:49:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
13:35:49:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:35:49:febtest:INFO:	Testing FEB with SN 1060
13:35:50:smx_tester:INFO:	Scanning setup
13:35:50:elinks:INFO:	Disabling clock on downlink 0
13:35:50:elinks:INFO:	Disabling clock on downlink 1
13:35:50:elinks:INFO:	Disabling clock on downlink 2
13:35:50:elinks:INFO:	Disabling clock on downlink 3
13:35:50:elinks:INFO:	Disabling clock on downlink 4
13:35:50:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:35:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:35:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:35:51:elinks:INFO:	Disabling clock on downlink 0
13:35:51:elinks:INFO:	Disabling clock on downlink 1
13:35:51:elinks:INFO:	Disabling clock on downlink 2
13:35:51:elinks:INFO:	Disabling clock on downlink 3
13:35:51:elinks:INFO:	Disabling clock on downlink 4
13:35:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:35:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:35:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
13:35:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
13:35:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
13:35:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
13:35:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
13:35:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
13:35:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
13:35:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
13:35:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
13:35:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
13:35:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
13:35:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
13:35:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
13:35:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
13:35:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
13:35:51:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
13:35:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:35:51:elinks:INFO:	Disabling clock on downlink 0
13:35:51:elinks:INFO:	Disabling clock on downlink 1
13:35:51:elinks:INFO:	Disabling clock on downlink 2
13:35:51:elinks:INFO:	Disabling clock on downlink 3
13:35:51:elinks:INFO:	Disabling clock on downlink 4
13:35:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:35:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:35:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:35:51:elinks:INFO:	Disabling clock on downlink 0
13:35:51:elinks:INFO:	Disabling clock on downlink 1
13:35:51:elinks:INFO:	Disabling clock on downlink 2
13:35:51:elinks:INFO:	Disabling clock on downlink 3
13:35:51:elinks:INFO:	Disabling clock on downlink 4
13:35:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:35:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:35:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:35:51:elinks:INFO:	Disabling clock on downlink 0
13:35:51:elinks:INFO:	Disabling clock on downlink 1
13:35:51:elinks:INFO:	Disabling clock on downlink 2
13:35:51:elinks:INFO:	Disabling clock on downlink 3
13:35:51:elinks:INFO:	Disabling clock on downlink 4
13:35:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:35:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:35:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:35:51:setup_element:INFO:	Scanning clock phase
13:35:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:35:51:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:35:52:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
13:35:52:setup_element:INFO:	Eye window for uplink 0 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:35:52:setup_element:INFO:	Eye window for uplink 1 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:35:52:setup_element:INFO:	Eye window for uplink 2 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:35:52:setup_element:INFO:	Eye window for uplink 3 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:35:52:setup_element:INFO:	Eye window for uplink 4 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:35:52:setup_element:INFO:	Eye window for uplink 5 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:35:52:setup_element:INFO:	Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:35:52:setup_element:INFO:	Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:35:52:setup_element:INFO:	Eye window for uplink 8 : ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
13:35:52:setup_element:INFO:	Eye window for uplink 9 : ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
13:35:52:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:35:52:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:35:52:setup_element:INFO:	Eye window for uplink 12: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:35:52:setup_element:INFO:	Eye window for uplink 13: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:35:52:setup_element:INFO:	Eye window for uplink 14: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:35:52:setup_element:INFO:	Eye window for uplink 15: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:35:52:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 1
13:35:52:setup_element:INFO:	Scanning data phases
13:35:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:35:52:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:35:57:setup_element:INFO:	Data phase scan results for group 0, downlink 1
13:35:57:setup_element:INFO:	Eye window for uplink 0 : ____________XXXXX_______________________
Data delay found: 34
13:35:57:setup_element:INFO:	Eye window for uplink 1 : ________XXXXX___________________________
Data delay found: 30
13:35:57:setup_element:INFO:	Eye window for uplink 2 : ______XXXXX_____________________________
Data delay found: 28
13:35:57:setup_element:INFO:	Eye window for uplink 3 : ___XXXXX________________________________
Data delay found: 25
13:35:57:setup_element:INFO:	Eye window for uplink 4 : ____XXXXX_______________________________
Data delay found: 26
13:35:57:setup_element:INFO:	Eye window for uplink 5 : _XXXX__________________________________X
Data delay found: 21
13:35:57:setup_element:INFO:	Eye window for uplink 6 : XXXX___________________________________X
Data delay found: 21
13:35:57:setup_element:INFO:	Eye window for uplink 7 : XX_________________________________XXXXX
Data delay found: 18
13:35:57:setup_element:INFO:	Eye window for uplink 8 : ______________________XXXXX_____________
Data delay found: 4
13:35:57:setup_element:INFO:	Eye window for uplink 9 : ___________________________XXXXX________
Data delay found: 9
13:35:57:setup_element:INFO:	Eye window for uplink 10: __________________________XXXXX_________
Data delay found: 8
13:35:57:setup_element:INFO:	Eye window for uplink 11: ______________________________XXXXX_____
Data delay found: 12
13:35:57:setup_element:INFO:	Eye window for uplink 12: __________________________XXXXX_________
Data delay found: 8
13:35:57:setup_element:INFO:	Eye window for uplink 13: ____________________________XXXXXX______
Data delay found: 10
13:35:57:setup_element:INFO:	Eye window for uplink 14: __________________________XXXXXX________
Data delay found: 8
13:35:57:setup_element:INFO:	Eye window for uplink 15: ____________________________XXXXX_______
Data delay found: 10
13:35:57:setup_element:INFO:	Setting the data phase to 34 for uplink 0
13:35:57:setup_element:INFO:	Setting the data phase to 30 for uplink 1
13:35:57:setup_element:INFO:	Setting the data phase to 28 for uplink 2
13:35:57:setup_element:INFO:	Setting the data phase to 25 for uplink 3
13:35:57:setup_element:INFO:	Setting the data phase to 26 for uplink 4
13:35:57:setup_element:INFO:	Setting the data phase to 21 for uplink 5
13:35:57:setup_element:INFO:	Setting the data phase to 21 for uplink 6
13:35:57:setup_element:INFO:	Setting the data phase to 18 for uplink 7
13:35:57:setup_element:INFO:	Setting the data phase to 4 for uplink 8
13:35:57:setup_element:INFO:	Setting the data phase to 9 for uplink 9
13:35:57:setup_element:INFO:	Setting the data phase to 8 for uplink 10
13:35:57:setup_element:INFO:	Setting the data phase to 12 for uplink 11
13:35:57:setup_element:INFO:	Setting the data phase to 8 for uplink 12
13:35:57:setup_element:INFO:	Setting the data phase to 10 for uplink 13
13:35:57:setup_element:INFO:	Setting the data phase to 8 for uplink 14
13:35:57:setup_element:INFO:	Setting the data phase to 10 for uplink 15
13:35:57:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 69
    Eye Windows:
      Uplink  0: _______________________________________________________________________XXXXXXX__
      Uplink  1: _______________________________________________________________________XXXXXXX__
      Uplink  2: _____________________________________________________________________XXXXXXX____
      Uplink  3: _____________________________________________________________________XXXXXXX____
      Uplink  4: ______________________________________________________________________XXXXXXX___
      Uplink  5: ______________________________________________________________________XXXXXXX___
      Uplink  6: _______________________________________________________________________XXXXXXX__
      Uplink  7: _______________________________________________________________________XXXXXXX__
      Uplink  8: ___________________________________________________________________XXXXXXXXX____
      Uplink  9: ___________________________________________________________________XXXXXXXXX____
      Uplink 10: _____________________________________________________________________XXXXXXXX___
      Uplink 11: _____________________________________________________________________XXXXXXXX___
      Uplink 12: _____________________________________________________________________XXXXXXXXX__
      Uplink 13: _____________________________________________________________________XXXXXXXXX__
      Uplink 14: _____________________________________________________________________XXXXXXXX___
      Uplink 15: _____________________________________________________________________XXXXXXXX___
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 1:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 2:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 3:
      Optimal Phase: 25
      Window Length: 35
      Eye Window: ___XXXXX________________________________
    Uplink 4:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 5:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: _XXXX__________________________________X
    Uplink 6:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 7:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 8:
      Optimal Phase: 4
      Window Length: 35
      Eye Window: ______________________XXXXX_____________
    Uplink 9:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 10:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 11:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 12:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 13:
      Optimal Phase: 10
      Window Length: 34
      Eye Window: ____________________________XXXXXX______
    Uplink 14:
      Optimal Phase: 8
      Window Length: 34
      Eye Window: __________________________XXXXXX________
    Uplink 15:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
]
13:35:57:setup_element:INFO:	Beginning SMX ASICs map scan
13:35:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:35:57:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:35:57:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:35:57:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
13:35:57:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:35:58:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:35:58:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:35:58:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:35:58:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:35:58:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:35:58:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:35:58:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:35:58:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:35:58:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:35:58:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:35:58:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:35:58:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:35:59:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:35:59:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:35:59:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:35:59:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:36:00:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 69
    Eye Windows:
      Uplink  0: _______________________________________________________________________XXXXXXX__
      Uplink  1: _______________________________________________________________________XXXXXXX__
      Uplink  2: _____________________________________________________________________XXXXXXX____
      Uplink  3: _____________________________________________________________________XXXXXXX____
      Uplink  4: ______________________________________________________________________XXXXXXX___
      Uplink  5: ______________________________________________________________________XXXXXXX___
      Uplink  6: _______________________________________________________________________XXXXXXX__
      Uplink  7: _______________________________________________________________________XXXXXXX__
      Uplink  8: ___________________________________________________________________XXXXXXXXX____
      Uplink  9: ___________________________________________________________________XXXXXXXXX____
      Uplink 10: _____________________________________________________________________XXXXXXXX___
      Uplink 11: _____________________________________________________________________XXXXXXXX___
      Uplink 12: _____________________________________________________________________XXXXXXXXX__
      Uplink 13: _____________________________________________________________________XXXXXXXXX__
      Uplink 14: _____________________________________________________________________XXXXXXXX___
      Uplink 15: _____________________________________________________________________XXXXXXXX___
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 1:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 2:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 3:
      Optimal Phase: 25
      Window Length: 35
      Eye Window: ___XXXXX________________________________
    Uplink 4:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 5:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: _XXXX__________________________________X
    Uplink 6:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 7:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 8:
      Optimal Phase: 4
      Window Length: 35
      Eye Window: ______________________XXXXX_____________
    Uplink 9:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 10:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 11:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 12:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 13:
      Optimal Phase: 10
      Window Length: 34
      Eye Window: ____________________________XXXXXX______
    Uplink 14:
      Optimal Phase: 8
      Window Length: 34
      Eye Window: __________________________XXXXXX________
    Uplink 15:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______

13:36:00:setup_element:INFO:	Performing Elink synchronization
13:36:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:36:00:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:36:00:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:36:00:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
13:36:00:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
13:36:00:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:36:01:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   2  |   [0]   |  1  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   6  |   [0]   |  1  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6_7 (Potential memory leak).
13:36:01:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
13:36:02:febtest:INFO:	1-0 | XA-000-08-002-000-001-177-00 |  37.7 | 1183.3
13:36:02:febtest:INFO:	8-1 | XA-000-08-002-000-001-169-07 |  25.1 | 1218.6
13:36:02:febtest:INFO:	3-2 | XA-000-08-002-000-001-173-07 |  37.7 | 1189.2
13:36:02:febtest:INFO:	10-3 | XA-000-08-002-000-001-156-14 |  37.7 | 1177.4
13:36:03:febtest:INFO:	5-4 | XA-000-08-002-000-001-176-00 |  47.3 | 1153.7
13:36:03:febtest:INFO:	12-5 | XA-000-08-002-000-001-171-07 |  44.1 | 1153.7
13:36:03:febtest:INFO:	7-6 | XA-000-08-002-000-001-172-07 |  34.6 | 1201.0
13:36:03:febtest:INFO:	14-7 | XA-000-08-002-000-001-170-07 |  34.6 | 1189.2
13:36:03:ST3_smx:INFO:	Configuring SMX FAST
13:36:05:ST3_smx:INFO:	chip: 1-0 	 40.898880 C 	 1171.483840 mV
13:36:05:ST3_smx:INFO:		Electrons
13:36:05:ST3_smx:INFO:	# loops 0
13:36:07:ST3_smx:INFO:	# loops 1
13:36:09:ST3_smx:INFO:	# loops 2
13:36:10:ST3_smx:INFO:	# loops 3
13:36:12:ST3_smx:INFO:	# loops 4
13:36:13:ST3_smx:INFO:	Total # of broken channels: 0
13:36:13:ST3_smx:INFO:	List of broken channels: []
13:36:13:ST3_smx:INFO:	Total # of broken channels: 0
13:36:13:ST3_smx:INFO:	List of broken channels: []
13:36:14:ST3_smx:INFO:	Configuring SMX FAST
13:36:16:ST3_smx:INFO:	chip: 8-1 	 28.225000 C 	 1212.728715 mV
13:36:16:ST3_smx:INFO:		Electrons
13:36:16:ST3_smx:INFO:	# loops 0
13:36:18:ST3_smx:INFO:	# loops 1
13:36:19:ST3_smx:INFO:	# loops 2
13:36:21:ST3_smx:INFO:	# loops 3
13:36:22:ST3_smx:INFO:	# loops 4
13:36:24:ST3_smx:INFO:	Total # of broken channels: 0
13:36:24:ST3_smx:INFO:	List of broken channels: []
13:36:24:ST3_smx:INFO:	Total # of broken channels: 0
13:36:24:ST3_smx:INFO:	List of broken channels: []
13:36:24:ST3_smx:INFO:	Configuring SMX FAST
13:36:26:ST3_smx:INFO:	chip: 3-2 	 40.898880 C 	 1171.483840 mV
13:36:26:ST3_smx:INFO:		Electrons
13:36:26:ST3_smx:INFO:	# loops 0
13:36:28:ST3_smx:INFO:	# loops 1
13:36:30:ST3_smx:INFO:	# loops 2
13:36:31:ST3_smx:INFO:	# loops 3
13:36:33:ST3_smx:INFO:	# loops 4
13:36:34:ST3_smx:INFO:	Total # of broken channels: 0
13:36:34:ST3_smx:INFO:	List of broken channels: []
13:36:34:ST3_smx:INFO:	Total # of broken channels: 0
13:36:34:ST3_smx:INFO:	List of broken channels: []
13:36:35:ST3_smx:INFO:	Configuring SMX FAST
13:36:37:ST3_smx:INFO:	chip: 10-3 	 47.250730 C 	 1153.732915 mV
13:36:37:ST3_smx:INFO:		Electrons
13:36:37:ST3_smx:INFO:	# loops 0
13:36:38:ST3_smx:INFO:	# loops 1
13:36:40:ST3_smx:INFO:	# loops 2
13:36:42:ST3_smx:INFO:	# loops 3
13:36:43:ST3_smx:INFO:	# loops 4
13:36:45:ST3_smx:INFO:	Total # of broken channels: 0
13:36:45:ST3_smx:INFO:	List of broken channels: []
13:36:45:ST3_smx:INFO:	Total # of broken channels: 0
13:36:45:ST3_smx:INFO:	List of broken channels: []
13:36:45:ST3_smx:INFO:	Configuring SMX FAST
13:36:47:ST3_smx:INFO:	chip: 5-4 	 47.250730 C 	 1165.571835 mV
13:36:47:ST3_smx:INFO:		Electrons
13:36:47:ST3_smx:INFO:	# loops 0
13:36:49:ST3_smx:INFO:	# loops 1
13:36:50:ST3_smx:INFO:	# loops 2
13:36:52:ST3_smx:INFO:	# loops 3
13:36:54:ST3_smx:INFO:	# loops 4
13:36:55:ST3_smx:INFO:	Total # of broken channels: 0
13:36:55:ST3_smx:INFO:	List of broken channels: []
13:36:55:ST3_smx:INFO:	Total # of broken channels: 0
13:36:55:ST3_smx:INFO:	List of broken channels: []
13:36:56:ST3_smx:INFO:	Configuring SMX FAST
13:36:58:ST3_smx:INFO:	chip: 12-5 	 50.430383 C 	 1135.937260 mV
13:36:58:ST3_smx:INFO:		Electrons
13:36:58:ST3_smx:INFO:	# loops 0
13:37:00:ST3_smx:INFO:	# loops 1
13:37:01:ST3_smx:INFO:	# loops 2
13:37:03:ST3_smx:INFO:	# loops 3
13:37:04:ST3_smx:INFO:	# loops 4
13:37:06:ST3_smx:INFO:	Total # of broken channels: 0
13:37:06:ST3_smx:INFO:	List of broken channels: []
13:37:06:ST3_smx:INFO:	Total # of broken channels: 0
13:37:06:ST3_smx:INFO:	List of broken channels: []
13:37:07:ST3_smx:INFO:	Configuring SMX FAST
13:37:09:ST3_smx:INFO:	chip: 7-6 	 44.073563 C 	 1165.571835 mV
13:37:09:ST3_smx:INFO:		Electrons
13:37:09:ST3_smx:INFO:	# loops 0
13:37:10:ST3_smx:INFO:	# loops 1
13:37:12:ST3_smx:INFO:	# loops 2
13:37:13:ST3_smx:INFO:	# loops 3
13:37:15:ST3_smx:INFO:	# loops 4
13:37:17:ST3_smx:INFO:	Total # of broken channels: 0
13:37:17:ST3_smx:INFO:	List of broken channels: []
13:37:17:ST3_smx:INFO:	Total # of broken channels: 0
13:37:17:ST3_smx:INFO:	List of broken channels: []
13:37:17:ST3_smx:INFO:	Configuring SMX FAST
13:37:19:ST3_smx:INFO:	chip: 14-7 	 40.898880 C 	 1183.292940 mV
13:37:19:ST3_smx:INFO:		Electrons
13:37:19:ST3_smx:INFO:	# loops 0
13:37:21:ST3_smx:INFO:	# loops 1
13:37:22:ST3_smx:INFO:	# loops 2
13:37:24:ST3_smx:INFO:	# loops 3
13:37:26:ST3_smx:INFO:	# loops 4
13:37:27:ST3_smx:INFO:	Total # of broken channels: 0
13:37:27:ST3_smx:INFO:	List of broken channels: []
13:37:27:ST3_smx:INFO:	Total # of broken channels: 0
13:37:27:ST3_smx:INFO:	List of broken channels: []
13:37:28:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
13:37:28:febtest:INFO:	1-0 | XA-000-08-002-000-001-177-00 |  44.1 | 1171.5
13:37:29:febtest:INFO:	8-1 | XA-000-08-002-000-001-169-07 |  28.2 | 1212.7
13:37:29:febtest:INFO:	3-2 | XA-000-08-002-000-001-173-07 |  44.1 | 1171.5
13:37:29:febtest:INFO:	10-3 | XA-000-08-002-000-001-156-14 |  47.3 | 1153.7
13:37:29:febtest:INFO:	5-4 | XA-000-08-002-000-001-176-00 |  47.3 | 1165.6
13:37:30:febtest:INFO:	12-5 | XA-000-08-002-000-001-171-07 |  50.4 | 1135.9
13:37:30:febtest:INFO:	7-6 | XA-000-08-002-000-001-172-07 |  47.3 | 1165.6
13:37:30:febtest:INFO:	14-7 | XA-000-08-002-000-001-170-07 |  40.9 | 1183.3
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_12-13_35_49
OPERATOR  : Oleksandr S.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L6DL200120 M6DL2B2001202B2 124 A

FEB_SN : 1060
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.448', '1.5350', '1.846', '2.0870', '6.999', '1.5440', '6.999', '1.5440']
VI_after__Init : ['2.450', '1.9770', '1.850', '0.6014', '7.000', '1.5430', '7.000', '1.5430']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
13:37:34:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_1060/TestDate_2024_01_12-13_35_49/