
FEB_1061 09.01.24 08:17:15
TextEdit.txt
08:15:45:ST3_hmp4040:ERROR: USB connection was lost 08:15:45:ST3_hmp4040:INFO: None 08:15:47:ST3_Shared:INFO: Listo of operators:Olga B.; 08:15:48:ST3_Shared:INFO: Listo of operators:Olga B.; Oleksandr S.; 08:16:03:febtest:INFO: FEB 8-2 selected 08:16:03:smx_tester:INFO: Setting Elink clock mode to 160 MHz 08:16:03:ST3_emu:ERROR: device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!! 08:16:05:febtest:INFO: FEB 8-2 selected 08:16:05:smx_tester:INFO: Setting Elink clock mode to 160 MHz 08:16:05:ST3_emu:ERROR: device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!! 08:16:06:febtest:INFO: FEB 8-2 selected 08:16:06:smx_tester:INFO: Setting Elink clock mode to 160 MHz 08:16:06:ST3_emu:ERROR: device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!! 08:16:07:febtest:INFO: FEB 8-2 selected 08:16:07:smx_tester:INFO: Setting Elink clock mode to 160 MHz 08:16:09:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:16:09:ST3_Shared:INFO: -------------------------FEB-Sensor------------------------- 08:16:09:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:16:28:ST3_ModuleSelector:INFO: L4UL201031 M4UL2B4010314A2 124 C 08:16:28:ST3_ModuleSelector:INFO: 09394 08:16:29:febtest:INFO: Testing FEB with SN 1061 08:16:30:smx_tester:INFO: Scanning setup 08:16:30:elinks:INFO: Disabling clock on downlink 0 08:16:30:elinks:INFO: Disabling clock on downlink 1 08:16:30:elinks:INFO: Disabling clock on downlink 2 08:16:30:elinks:INFO: Disabling clock on downlink 3 08:16:30:elinks:INFO: Disabling clock on downlink 4 08:16:30:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:16:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 08:16:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:16:30:elinks:INFO: Disabling clock on downlink 0 08:16:30:elinks:INFO: Disabling clock on downlink 1 08:16:30:elinks:INFO: Disabling clock on downlink 2 08:16:30:elinks:INFO: Disabling clock on downlink 3 08:16:30:elinks:INFO: Disabling clock on downlink 4 08:16:30:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:16:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:16:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 08:16:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 08:16:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 08:16:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 08:16:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 08:16:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 08:16:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 08:16:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 08:16:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 08:16:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 08:16:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 08:16:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 08:16:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 08:16:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 08:16:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 08:16:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 08:16:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:16:30:elinks:INFO: Disabling clock on downlink 0 08:16:30:elinks:INFO: Disabling clock on downlink 1 08:16:30:elinks:INFO: Disabling clock on downlink 2 08:16:30:elinks:INFO: Disabling clock on downlink 3 08:16:30:elinks:INFO: Disabling clock on downlink 4 08:16:30:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:16:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 08:16:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:16:30:elinks:INFO: Disabling clock on downlink 0 08:16:30:elinks:INFO: Disabling clock on downlink 1 08:16:30:elinks:INFO: Disabling clock on downlink 2 08:16:30:elinks:INFO: Disabling clock on downlink 3 08:16:30:elinks:INFO: Disabling clock on downlink 4 08:16:31:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:16:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 08:16:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:16:31:elinks:INFO: Disabling clock on downlink 0 08:16:31:elinks:INFO: Disabling clock on downlink 1 08:16:31:elinks:INFO: Disabling clock on downlink 2 08:16:31:elinks:INFO: Disabling clock on downlink 3 08:16:31:elinks:INFO: Disabling clock on downlink 4 08:16:31:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:16:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 08:16:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:16:31:setup_element:INFO: Scanning clock phase 08:16:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:16:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 08:16:31:setup_element:INFO: Clock phase scan results for group 0, downlink 1 08:16:31:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXX_ Clock Delay: 35 08:16:31:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXX_ Clock Delay: 35 08:16:31:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 08:16:31:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 08:16:31:setup_element:INFO: Eye window for uplink 4 : _____________________________________________________________________XXXXXXX____ Clock Delay: 32 08:16:31:setup_element:INFO: Eye window for uplink 5 : _____________________________________________________________________XXXXXXX____ Clock Delay: 32 08:16:31:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 08:16:31:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 08:16:31:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 08:16:31:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXXX___ Clock Delay: 32 08:16:31:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 08:16:31:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 08:16:31:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 08:16:31:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 08:16:31:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 08:16:31:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 08:16:31:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1 08:16:31:setup_element:INFO: Scanning data phases 08:16:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:16:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 08:16:37:setup_element:INFO: Data phase scan results for group 0, downlink 1 08:16:37:setup_element:INFO: Eye window for uplink 0 : ___________XXXXX________________________ Data delay found: 33 08:16:37:setup_element:INFO: Eye window for uplink 1 : _______XXXXX____________________________ Data delay found: 29 08:16:37:setup_element:INFO: Eye window for uplink 2 : ______XXXXX_____________________________ Data delay found: 28 08:16:37:setup_element:INFO: Eye window for uplink 3 : ___XXXXXX_______________________________ Data delay found: 25 08:16:37:setup_element:INFO: Eye window for uplink 4 : __XXXXX_________________________________ Data delay found: 24 08:16:37:setup_element:INFO: Eye window for uplink 5 : XXXX__________________________________XX Data delay found: 20 08:16:37:setup_element:INFO: Eye window for uplink 6 : _XXXX___________________________________ Data delay found: 22 08:16:37:setup_element:INFO: Eye window for uplink 7 : XX__________________________________XXXX Data delay found: 18 08:16:37:setup_element:INFO: Eye window for uplink 8 : ________________________XXXXX___________ Data delay found: 6 08:16:37:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXX_____ Data delay found: 12 08:16:37:setup_element:INFO: Eye window for uplink 10: __________________________XXXXX_________ Data delay found: 8 08:16:37:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXX_____ Data delay found: 12 08:16:37:setup_element:INFO: Eye window for uplink 12: __________________________XXXXX_________ Data delay found: 8 08:16:37:setup_element:INFO: Eye window for uplink 13: _____________________________XXXXX______ Data delay found: 11 08:16:37:setup_element:INFO: Eye window for uplink 14: ___________________________XXXXXX_______ Data delay found: 9 08:16:37:setup_element:INFO: Eye window for uplink 15: ______________________________XXXXX_____ Data delay found: 12 08:16:37:setup_element:INFO: Setting the data phase to 33 for uplink 0 08:16:37:setup_element:INFO: Setting the data phase to 29 for uplink 1 08:16:37:setup_element:INFO: Setting the data phase to 28 for uplink 2 08:16:37:setup_element:INFO: Setting the data phase to 25 for uplink 3 08:16:37:setup_element:INFO: Setting the data phase to 24 for uplink 4 08:16:37:setup_element:INFO: Setting the data phase to 20 for uplink 5 08:16:37:setup_element:INFO: Setting the data phase to 22 for uplink 6 08:16:37:setup_element:INFO: Setting the data phase to 18 for uplink 7 08:16:37:setup_element:INFO: Setting the data phase to 6 for uplink 8 08:16:37:setup_element:INFO: Setting the data phase to 12 for uplink 9 08:16:37:setup_element:INFO: Setting the data phase to 8 for uplink 10 08:16:37:setup_element:INFO: Setting the data phase to 12 for uplink 11 08:16:37:setup_element:INFO: Setting the data phase to 8 for uplink 12 08:16:37:setup_element:INFO: Setting the data phase to 11 for uplink 13 08:16:37:setup_element:INFO: Setting the data phase to 9 for uplink 14 08:16:37:setup_element:INFO: Setting the data phase to 12 for uplink 15 08:16:37:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 33 Window Length: 69 Eye Windows: Uplink 0: ________________________________________________________________________XXXXXXX_ Uplink 1: ________________________________________________________________________XXXXXXX_ Uplink 2: _______________________________________________________________________XXXXXXX__ Uplink 3: _______________________________________________________________________XXXXXXX__ Uplink 4: _____________________________________________________________________XXXXXXX____ Uplink 5: _____________________________________________________________________XXXXXXX____ Uplink 6: ________________________________________________________________________XXXXXX__ Uplink 7: ________________________________________________________________________XXXXXX__ Uplink 8: ____________________________________________________________________XXXXXXXXX___ Uplink 9: ____________________________________________________________________XXXXXXXXX___ Uplink 10: _____________________________________________________________________XXXXXXXX___ Uplink 11: _____________________________________________________________________XXXXXXXX___ Uplink 12: _____________________________________________________________________XXXXXXXX___ Uplink 13: _____________________________________________________________________XXXXXXXX___ Uplink 14: ______________________________________________________________________XXXXXXX___ Uplink 15: ______________________________________________________________________XXXXXXX___ Data phase characteristics: Uplink 0: Optimal Phase: 33 Window Length: 35 Eye Window: ___________XXXXX________________________ Uplink 1: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 2: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 3: Optimal Phase: 25 Window Length: 34 Eye Window: ___XXXXXX_______________________________ Uplink 4: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 5: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 6: Optimal Phase: 22 Window Length: 36 Eye Window: _XXXX___________________________________ Uplink 7: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 8: Optimal Phase: 6 Window Length: 35 Eye Window: ________________________XXXXX___________ Uplink 9: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 10: Optimal Phase: 8 Window Length: 35 Eye Window: __________________________XXXXX_________ Uplink 11: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 12: Optimal Phase: 8 Window Length: 35 Eye Window: __________________________XXXXX_________ Uplink 13: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 14: Optimal Phase: 9 Window Length: 34 Eye Window: ___________________________XXXXXX_______ Uplink 15: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ ] 08:16:37:setup_element:INFO: Beginning SMX ASICs map scan 08:16:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:16:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 08:16:37:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 08:16:37:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 08:16:37:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 08:16:37:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 08:16:37:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 08:16:37:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 08:16:37:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 08:16:37:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 08:16:37:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 08:16:38:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 08:16:38:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 08:16:38:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 08:16:38:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 08:16:38:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 08:16:38:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 08:16:38:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 08:16:38:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 08:16:38:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 08:16:40:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0) ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9) ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2) ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4) ASIC address 0x5: (ASIC uplink, uplink): (1, 13) ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6) ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15) Clock Phase Characteristic: Optimal Phase: 33 Window Length: 69 Eye Windows: Uplink 0: ________________________________________________________________________XXXXXXX_ Uplink 1: ________________________________________________________________________XXXXXXX_ Uplink 2: _______________________________________________________________________XXXXXXX__ Uplink 3: _______________________________________________________________________XXXXXXX__ Uplink 4: _____________________________________________________________________XXXXXXX____ Uplink 5: _____________________________________________________________________XXXXXXX____ Uplink 6: ________________________________________________________________________XXXXXX__ Uplink 7: ________________________________________________________________________XXXXXX__ Uplink 8: ____________________________________________________________________XXXXXXXXX___ Uplink 9: ____________________________________________________________________XXXXXXXXX___ Uplink 10: _____________________________________________________________________XXXXXXXX___ Uplink 11: _____________________________________________________________________XXXXXXXX___ Uplink 12: _____________________________________________________________________XXXXXXXX___ Uplink 13: _____________________________________________________________________XXXXXXXX___ Uplink 14: ______________________________________________________________________XXXXXXX___ Uplink 15: ______________________________________________________________________XXXXXXX___ Data phase characteristics: Uplink 0: Optimal Phase: 33 Window Length: 35 Eye Window: ___________XXXXX________________________ Uplink 1: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 2: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 3: Optimal Phase: 25 Window Length: 34 Eye Window: ___XXXXXX_______________________________ Uplink 4: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 5: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 6: Optimal Phase: 22 Window Length: 36 Eye Window: _XXXX___________________________________ Uplink 7: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 8: Optimal Phase: 6 Window Length: 35 Eye Window: ________________________XXXXX___________ Uplink 9: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 10: Optimal Phase: 8 Window Length: 35 Eye Window: __________________________XXXXX_________ Uplink 11: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 12: Optimal Phase: 8 Window Length: 35 Eye Window: __________________________XXXXX_________ Uplink 13: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 14: Optimal Phase: 9 Window Length: 34 Eye Window: ___________________________XXXXXX_______ Uplink 15: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ 08:16:40:setup_element:INFO: Performing Elink synchronization 08:16:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:16:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 08:16:40:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 08:16:40:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 08:16:40:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 08:16:40:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 08:16:40:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)] 5 | [1] | 1 | 0 | [13] | [(1, 13)] 6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)] Traceback (most recent call last): File "febtest.py", line 321, in DoFEB_SensorTest if self.DoScanFEB8(reporter.out_dict): File "febtest.py", line 178, in DoScanFEB8 if self.EMU.Scan_FEB8(reporter): File "/home/cbm/ST3_v2.29.07/lib/ST3_emu_feb.py", line 59, in Scan_FEB8 self.mysmx[nn] = ST3_smx.ST3_smx( smx, File "/home/cbm/ST3_v2.29.07/lib/ST3_smx.py", line 222, in __init__ Canvas_index = smx_index[upln] KeyError: 13 08:17:15:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:17:15:ST3_Shared:INFO: -------------------------FEB-Sensor------------------------- 08:17:15:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:17:16:ST3_ModuleSelector:INFO: L4UL201031 M4UL2B4010314A2 124 C 08:17:16:ST3_ModuleSelector:INFO: 09394 08:17:16:febtest:INFO: Testing FEB with SN 1061 08:17:17:smx_tester:INFO: Scanning setup 08:17:17:elinks:INFO: Disabling clock on downlink 0 08:17:17:elinks:INFO: Disabling clock on downlink 1 08:17:17:elinks:INFO: Disabling clock on downlink 2 08:17:17:elinks:INFO: Disabling clock on downlink 3 08:17:17:elinks:INFO: Disabling clock on downlink 4 08:17:17:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:17:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 08:17:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:17:17:elinks:INFO: Disabling clock on downlink 0 08:17:17:elinks:INFO: Disabling clock on downlink 1 08:17:17:elinks:INFO: Disabling clock on downlink 2 08:17:17:elinks:INFO: Disabling clock on downlink 3 08:17:17:elinks:INFO: Disabling clock on downlink 4 08:17:17:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:17:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:17:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 08:17:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 08:17:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 08:17:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 08:17:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 08:17:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 08:17:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 08:17:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 08:17:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 08:17:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 08:17:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 08:17:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 08:17:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 08:17:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 08:17:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 08:17:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 08:17:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:17:17:elinks:INFO: Disabling clock on downlink 0 08:17:17:elinks:INFO: Disabling clock on downlink 1 08:17:17:elinks:INFO: Disabling clock on downlink 2 08:17:17:elinks:INFO: Disabling clock on downlink 3 08:17:17:elinks:INFO: Disabling clock on downlink 4 08:17:17:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:17:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 08:17:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:17:18:elinks:INFO: Disabling clock on downlink 0 08:17:18:elinks:INFO: Disabling clock on downlink 1 08:17:18:elinks:INFO: Disabling clock on downlink 2 08:17:18:elinks:INFO: Disabling clock on downlink 3 08:17:18:elinks:INFO: Disabling clock on downlink 4 08:17:18:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:17:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 08:17:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:17:18:elinks:INFO: Disabling clock on downlink 0 08:17:18:elinks:INFO: Disabling clock on downlink 1 08:17:18:elinks:INFO: Disabling clock on downlink 2 08:17:18:elinks:INFO: Disabling clock on downlink 3 08:17:18:elinks:INFO: Disabling clock on downlink 4 08:17:18:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:17:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 08:17:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:17:18:setup_element:INFO: Scanning clock phase 08:17:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:17:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 08:17:18:setup_element:INFO: Clock phase scan results for group 0, downlink 1 08:17:18:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 08:17:18:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 08:17:18:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 08:17:18:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 08:17:18:setup_element:INFO: Eye window for uplink 4 : _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 08:17:19:setup_element:INFO: Eye window for uplink 5 : _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 08:17:19:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 08:17:19:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 08:17:19:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 08:17:19:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXX____ Clock Delay: 31 08:17:19:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 08:17:19:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 08:17:19:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 08:17:19:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 08:17:19:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 08:17:19:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 08:17:19:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1 08:17:19:setup_element:INFO: Scanning data phases 08:17:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:17:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 08:17:24:setup_element:INFO: Data phase scan results for group 0, downlink 1 08:17:24:setup_element:INFO: Eye window for uplink 0 : ___________XXXXXX_______________________ Data delay found: 33 08:17:24:setup_element:INFO: Eye window for uplink 1 : _______XXXXX____________________________ Data delay found: 29 08:17:24:setup_element:INFO: Eye window for uplink 2 : ______XXXXX_____________________________ Data delay found: 28 08:17:24:setup_element:INFO: Eye window for uplink 3 : ___XXXXXX_______________________________ Data delay found: 25 08:17:24:setup_element:INFO: Eye window for uplink 4 : __XXXXX_________________________________ Data delay found: 24 08:17:24:setup_element:INFO: Eye window for uplink 5 : XXXX_________________________________XXX Data delay found: 20 08:17:24:setup_element:INFO: Eye window for uplink 6 : XXXXX___________________________________ Data delay found: 22 08:17:24:setup_element:INFO: Eye window for uplink 7 : XX_________________________________XXXXX Data delay found: 18 08:17:24:setup_element:INFO: Eye window for uplink 8 : ________________________XXXX____________ Data delay found: 5 08:17:24:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXXX______ Data delay found: 11 08:17:24:setup_element:INFO: Eye window for uplink 10: __________________________XXXXX_________ Data delay found: 8 08:17:24:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXX_____ Data delay found: 12 08:17:24:setup_element:INFO: Eye window for uplink 12: _________________________XXXXX__________ Data delay found: 7 08:17:24:setup_element:INFO: Eye window for uplink 13: ____________________________XXXXX_______ Data delay found: 10 08:17:24:setup_element:INFO: Eye window for uplink 14: ____________________________XXXXX_______ Data delay found: 10 08:17:24:setup_element:INFO: Eye window for uplink 15: ______________________________XXXXX_____ Data delay found: 12 08:17:24:setup_element:INFO: Setting the data phase to 33 for uplink 0 08:17:24:setup_element:INFO: Setting the data phase to 29 for uplink 1 08:17:24:setup_element:INFO: Setting the data phase to 28 for uplink 2 08:17:24:setup_element:INFO: Setting the data phase to 25 for uplink 3 08:17:24:setup_element:INFO: Setting the data phase to 24 for uplink 4 08:17:24:setup_element:INFO: Setting the data phase to 20 for uplink 5 08:17:24:setup_element:INFO: Setting the data phase to 22 for uplink 6 08:17:24:setup_element:INFO: Setting the data phase to 18 for uplink 7 08:17:24:setup_element:INFO: Setting the data phase to 5 for uplink 8 08:17:24:setup_element:INFO: Setting the data phase to 11 for uplink 9 08:17:24:setup_element:INFO: Setting the data phase to 8 for uplink 10 08:17:24:setup_element:INFO: Setting the data phase to 12 for uplink 11 08:17:24:setup_element:INFO: Setting the data phase to 7 for uplink 12 08:17:24:setup_element:INFO: Setting the data phase to 10 for uplink 13 08:17:24:setup_element:INFO: Setting the data phase to 10 for uplink 14 08:17:24:setup_element:INFO: Setting the data phase to 12 for uplink 15 08:17:24:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 33 Window Length: 69 Eye Windows: Uplink 0: _______________________________________________________________________XXXXXXXX_ Uplink 1: _______________________________________________________________________XXXXXXXX_ Uplink 2: _______________________________________________________________________XXXXXXX__ Uplink 3: _______________________________________________________________________XXXXXXX__ Uplink 4: _____________________________________________________________________XXXXXXXX___ Uplink 5: _____________________________________________________________________XXXXXXXX___ Uplink 6: ________________________________________________________________________XXXXXX__ Uplink 7: ________________________________________________________________________XXXXXX__ Uplink 8: ____________________________________________________________________XXXXXXXX____ Uplink 9: ____________________________________________________________________XXXXXXXX____ Uplink 10: _____________________________________________________________________XXXXXXXXX__ Uplink 11: _____________________________________________________________________XXXXXXXXX__ Uplink 12: _____________________________________________________________________XXXXXXXX___ Uplink 13: _____________________________________________________________________XXXXXXXX___ Uplink 14: ______________________________________________________________________XXXXXXX___ Uplink 15: ______________________________________________________________________XXXXXXX___ Data phase characteristics: Uplink 0: Optimal Phase: 33 Window Length: 34 Eye Window: ___________XXXXXX_______________________ Uplink 1: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 2: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 3: Optimal Phase: 25 Window Length: 34 Eye Window: ___XXXXXX_______________________________ Uplink 4: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 5: Optimal Phase: 20 Window Length: 33 Eye Window: XXXX_________________________________XXX Uplink 6: Optimal Phase: 22 Window Length: 35 Eye Window: XXXXX___________________________________ Uplink 7: Optimal Phase: 18 Window Length: 33 Eye Window: XX_________________________________XXXXX Uplink 8: Optimal Phase: 5 Window Length: 36 Eye Window: ________________________XXXX____________ Uplink 9: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 10: Optimal Phase: 8 Window Length: 35 Eye Window: __________________________XXXXX_________ Uplink 11: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 12: Optimal Phase: 7 Window Length: 35 Eye Window: _________________________XXXXX__________ Uplink 13: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ Uplink 14: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ Uplink 15: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ ] 08:17:24:setup_element:INFO: Beginning SMX ASICs map scan 08:17:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:17:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 08:17:24:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 08:17:24:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 08:17:24:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 08:17:24:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 08:17:25:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 08:17:25:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 08:17:25:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 08:17:25:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 08:17:25:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 08:17:25:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 08:17:25:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 08:17:25:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 08:17:25:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 08:17:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 08:17:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 08:17:26:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 08:17:26:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 08:17:26:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 08:17:26:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 08:17:27:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0) ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9) ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2) ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4) ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13) ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6) ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15) Clock Phase Characteristic: Optimal Phase: 33 Window Length: 69 Eye Windows: Uplink 0: _______________________________________________________________________XXXXXXXX_ Uplink 1: _______________________________________________________________________XXXXXXXX_ Uplink 2: _______________________________________________________________________XXXXXXX__ Uplink 3: _______________________________________________________________________XXXXXXX__ Uplink 4: _____________________________________________________________________XXXXXXXX___ Uplink 5: _____________________________________________________________________XXXXXXXX___ Uplink 6: ________________________________________________________________________XXXXXX__ Uplink 7: ________________________________________________________________________XXXXXX__ Uplink 8: ____________________________________________________________________XXXXXXXX____ Uplink 9: ____________________________________________________________________XXXXXXXX____ Uplink 10: _____________________________________________________________________XXXXXXXXX__ Uplink 11: _____________________________________________________________________XXXXXXXXX__ Uplink 12: _____________________________________________________________________XXXXXXXX___ Uplink 13: _____________________________________________________________________XXXXXXXX___ Uplink 14: ______________________________________________________________________XXXXXXX___ Uplink 15: ______________________________________________________________________XXXXXXX___ Data phase characteristics: Uplink 0: Optimal Phase: 33 Window Length: 34 Eye Window: ___________XXXXXX_______________________ Uplink 1: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 2: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 3: Optimal Phase: 25 Window Length: 34 Eye Window: ___XXXXXX_______________________________ Uplink 4: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 5: Optimal Phase: 20 Window Length: 33 Eye Window: XXXX_________________________________XXX Uplink 6: Optimal Phase: 22 Window Length: 35 Eye Window: XXXXX___________________________________ Uplink 7: Optimal Phase: 18 Window Length: 33 Eye Window: XX_________________________________XXXXX Uplink 8: Optimal Phase: 5 Window Length: 36 Eye Window: ________________________XXXX____________ Uplink 9: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 10: Optimal Phase: 8 Window Length: 35 Eye Window: __________________________XXXXX_________ Uplink 11: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 12: Optimal Phase: 7 Window Length: 35 Eye Window: _________________________XXXXX__________ Uplink 13: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ Uplink 14: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ Uplink 15: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ 08:17:27:setup_element:INFO: Performing Elink synchronization 08:17:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:17:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 08:17:27:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 08:17:27:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 08:17:27:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 08:17:27:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 08:17:28:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)] TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_1 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_0__upli_1 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_8 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_1__upli_8 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2_3 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_2__upli_3 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_10 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_3__upli_10 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4_5 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_4__upli_5 08:17:28:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 08:17:29:febtest:INFO: 1-0 | XA-000-08-002-000-001-121-15 | 40.9 | 1171.5 08:17:29:febtest:INFO: 8-1 | XA-000-08-002-000-001-129-09 | 31.4 | 1206.9 08:17:29:febtest:INFO: 3-2 | XA-000-08-002-000-001-117-15 | 50.4 | 1153.7 08:17:29:febtest:INFO: 10-3 | XA-000-08-002-000-001-130-09 | 47.3 | 1147.8 08:17:30:febtest:INFO: 5-4 | XA-000-08-002-000-001-137-09 | 25.1 | 1236.2 08:17:30:febtest:INFO: 12-5 | XA-000-08-002-000-001-122-15 | 56.8 | 1112.1 08:17:30:febtest:INFO: 7-6 | XA-000-08-002-000-001-132-09 | 25.1 | 1230.3 08:17:30:febtest:INFO: 14-7 | XA-000-08-002-000-001-119-15 | 34.6 | 1189.2 08:17:31:ST3_smx:INFO: Configuring SMX FAST 08:17:33:ST3_smx:INFO: chip: 1-0 44.073563 C 1165.571835 mV 08:17:33:ST3_smx:INFO: Electrons 08:17:33:ST3_smx:INFO: # loops 0 08:17:34:ST3_smx:INFO: # loops 1 08:17:36:ST3_smx:INFO: # loops 2 08:17:38:ST3_smx:INFO: # loops 3 08:17:40:ST3_smx:INFO: # loops 4 08:17:41:ST3_smx:INFO: Total # of broken channels: 0 08:17:41:ST3_smx:INFO: List of broken channels: [] 08:17:41:ST3_smx:INFO: Total # of broken channels: 0 08:17:41:ST3_smx:INFO: List of broken channels: [] 08:17:42:ST3_smx:INFO: Configuring SMX FAST 08:17:44:ST3_smx:INFO: chip: 8-1 37.726682 C 1183.292940 mV 08:17:44:ST3_smx:INFO: Electrons 08:17:44:ST3_smx:INFO: # loops 0 08:17:46:ST3_smx:INFO: # loops 1 08:17:47:ST3_smx:INFO: # loops 2 08:17:49:ST3_smx:INFO: # loops 3 08:17:51:ST3_smx:INFO: # loops 4 08:17:52:ST3_smx:INFO: Total # of broken channels: 0 08:17:52:ST3_smx:INFO: List of broken channels: [] 08:17:52:ST3_smx:INFO: Total # of broken channels: 0 08:17:52:ST3_smx:INFO: List of broken channels: [] 08:17:53:ST3_smx:INFO: Configuring SMX FAST 08:17:55:ST3_smx:INFO: chip: 3-2 56.797143 C 1129.995435 mV 08:17:55:ST3_smx:INFO: Electrons 08:17:55:ST3_smx:INFO: # loops 0 08:17:57:ST3_smx:INFO: # loops 1 08:17:58:ST3_smx:INFO: # loops 2 08:18:00:ST3_smx:INFO: # loops 3 08:18:01:ST3_smx:INFO: # loops 4 08:18:03:ST3_smx:INFO: Total # of broken channels: 0 08:18:03:ST3_smx:INFO: List of broken channels: [] 08:18:03:ST3_smx:INFO: Total # of broken channels: 0 08:18:03:ST3_smx:INFO: List of broken channels: [] 08:18:03:ST3_smx:INFO: Configuring SMX FAST 08:18:05:ST3_smx:INFO: chip: 10-3 53.612520 C 1135.937260 mV 08:18:05:ST3_smx:INFO: Electrons 08:18:05:ST3_smx:INFO: # loops 0 08:18:07:ST3_smx:INFO: # loops 1 08:18:08:ST3_smx:INFO: # loops 2 08:18:10:ST3_smx:INFO: # loops 3 08:18:12:ST3_smx:INFO: # loops 4 08:18:13:ST3_smx:INFO: Total # of broken channels: 0 08:18:13:ST3_smx:INFO: List of broken channels: [] 08:18:13:ST3_smx:INFO: Total # of broken channels: 1 08:18:13:ST3_smx:INFO: List of broken channels: [31] 08:18:13:ST3_smx:INFO: Configuring SMX FAST 08:18:15:ST3_smx:INFO: chip: 5-4 28.225000 C 1224.468235 mV 08:18:15:ST3_smx:INFO: Electrons 08:18:15:ST3_smx:INFO: # loops 0 08:18:17:ST3_smx:INFO: # loops 1 08:18:19:ST3_smx:INFO: # loops 2 08:18:20:ST3_smx:INFO: # loops 3 08:18:22:ST3_smx:INFO: # loops 4 08:18:24:ST3_smx:INFO: Total # of broken channels: 0 08:18:24:ST3_smx:INFO: List of broken channels: [] 08:18:24:ST3_smx:INFO: Total # of broken channels: 0 08:18:24:ST3_smx:INFO: List of broken channels: [] 08:18:24:ST3_smx:INFO: Configuring SMX FAST 08:18:26:ST3_smx:INFO: chip: 12-5 53.612520 C 1135.937260 mV 08:18:26:ST3_smx:INFO: Electrons 08:18:26:ST3_smx:INFO: # loops 0 08:18:28:ST3_smx:INFO: # loops 1 08:18:29:ST3_smx:INFO: # loops 2 08:18:31:ST3_smx:INFO: # loops 3 08:18:33:ST3_smx:INFO: # loops 4 08:18:34:ST3_smx:INFO: Total # of broken channels: 0 08:18:34:ST3_smx:INFO: List of broken channels: [] 08:18:34:ST3_smx:INFO: Total # of broken channels: 0 08:18:34:ST3_smx:INFO: List of broken channels: [] 08:18:35:ST3_smx:INFO: Configuring SMX FAST 08:18:37:ST3_smx:INFO: chip: 7-6 40.898880 C 1189.190035 mV 08:18:37:ST3_smx:INFO: Electrons 08:18:37:ST3_smx:INFO: # loops 0 08:18:38:ST3_smx:INFO: # loops 1 08:18:40:ST3_smx:INFO: # loops 2 08:18:41:ST3_smx:INFO: # loops 3 08:18:43:ST3_smx:INFO: # loops 4 08:18:45:ST3_smx:INFO: Total # of broken channels: 0 08:18:45:ST3_smx:INFO: List of broken channels: [] 08:18:45:ST3_smx:INFO: Total # of broken channels: 0 08:18:45:ST3_smx:INFO: List of broken channels: [] 08:18:45:ST3_smx:INFO: Configuring SMX FAST 08:18:47:ST3_smx:INFO: chip: 14-7 44.073563 C 1159.654860 mV 08:18:47:ST3_smx:INFO: Electrons 08:18:47:ST3_smx:INFO: # loops 0 08:18:49:ST3_smx:INFO: # loops 1 08:18:50:ST3_smx:INFO: # loops 2 08:18:52:ST3_smx:INFO: # loops 3 08:18:54:ST3_smx:INFO: # loops 4 08:18:55:ST3_smx:INFO: Total # of broken channels: 0 08:18:55:ST3_smx:INFO: List of broken channels: [] 08:18:55:ST3_smx:INFO: Total # of broken channels: 0 08:18:55:ST3_smx:INFO: List of broken channels: [] 08:18:56:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 08:18:56:febtest:INFO: 1-0 | XA-000-08-002-000-001-121-15 | 47.3 | 1165.6 08:18:56:febtest:INFO: 8-1 | XA-000-08-002-000-001-129-09 | 40.9 | 1183.3 08:18:57:febtest:INFO: 3-2 | XA-000-08-002-000-001-117-15 | 56.8 | 1130.0 08:18:57:febtest:INFO: 10-3 | XA-000-08-002-000-001-130-09 | 53.6 | 1135.9 08:18:57:febtest:INFO: 5-4 | XA-000-08-002-000-001-137-09 | 31.4 | 1224.5 08:18:57:febtest:INFO: 12-5 | XA-000-08-002-000-001-122-15 | 53.6 | 1135.9 08:18:58:febtest:INFO: 7-6 | XA-000-08-002-000-001-132-09 | 40.9 | 1183.3 08:18:58:febtest:INFO: 14-7 | XA-000-08-002-000-001-119-15 | 44.1 | 1159.7 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 2024_01_09-08_17_15 OPERATOR : Olga B.; Oleksandr S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : L4UL201031 M4UL2B4010314A2 124 C FEB_SN : 1061 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- SENSOR_ID: 09394 MODULE_NAME: L4UL201031 M4UL2B4010314A2 124 C MODULE_TYPE: MODULE_LADDER: MODULE_MODULE: MODULE_SIZE: 0 MODULE_GRADE: --------------------------------------- VI_before_Init : ['2.450', '1.8070', '1.851', '0.5212', '7.000', '1.5430', '7.000', '1.5430'] VI_after__Init : ['2.450', '2.0390', '1.850', '0.6187', '7.000', '1.5440', '7.000', '1.5440'] VI_at__the_End : ['0', '0', '0', '0', '0', '0'] 08:19:03:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1061/TestDate_2024_01_09-08_17_15/