FEB_1061 19.10.23 13:54:12
Info
13:54:06:febtest:INFO: FEB 8-2 A @ GSI
13:54:10:smx_tester:INFO: Setting Elink clock mode to 160 MHz
13:54:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:54:12:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
13:54:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:54:12:febtest:INFO: Tsting FEB with SN 1061
13:54:14:smx_tester:INFO: Scanning setup
13:54:14:elinks:INFO: Disabling clock on downlink 0
13:54:14:elinks:INFO: Disabling clock on downlink 1
13:54:14:elinks:INFO: Disabling clock on downlink 2
13:54:14:elinks:INFO: Disabling clock on downlink 3
13:54:14:elinks:INFO: Disabling clock on downlink 4
13:54:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:54:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:54:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:54:14:elinks:INFO: Disabling clock on downlink 0
13:54:14:elinks:INFO: Disabling clock on downlink 1
13:54:14:elinks:INFO: Disabling clock on downlink 2
13:54:14:elinks:INFO: Disabling clock on downlink 3
13:54:14:elinks:INFO: Disabling clock on downlink 4
13:54:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:54:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:54:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:54:14:elinks:INFO: Disabling clock on downlink 0
13:54:14:elinks:INFO: Disabling clock on downlink 1
13:54:14:elinks:INFO: Disabling clock on downlink 2
13:54:14:elinks:INFO: Disabling clock on downlink 3
13:54:14:elinks:INFO: Disabling clock on downlink 4
13:54:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:54:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:54:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:54:14:elinks:INFO: Disabling clock on downlink 0
13:54:14:elinks:INFO: Disabling clock on downlink 1
13:54:14:elinks:INFO: Disabling clock on downlink 2
13:54:14:elinks:INFO: Disabling clock on downlink 3
13:54:14:elinks:INFO: Disabling clock on downlink 4
13:54:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:54:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:54:14:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 24
13:54:14:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 25
13:54:14:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 26
13:54:14:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 27
13:54:14:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 28
13:54:14:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 29
13:54:14:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 30
13:54:14:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 31
13:54:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:54:14:elinks:INFO: Disabling clock on downlink 0
13:54:14:elinks:INFO: Disabling clock on downlink 1
13:54:14:elinks:INFO: Disabling clock on downlink 2
13:54:14:elinks:INFO: Disabling clock on downlink 3
13:54:14:elinks:INFO: Disabling clock on downlink 4
13:54:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:54:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:54:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:54:14:setup_element:INFO: Scanning clock phase
13:54:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:54:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
13:54:15:setup_element:INFO: Clock phase scan results for group 0, downlink 3
13:54:15:setup_element:INFO: Eye window for uplink 24: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
13:54:15:setup_element:INFO: Eye window for uplink 25: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
13:54:15:setup_element:INFO: Eye window for uplink 26: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
13:54:15:setup_element:INFO: Eye window for uplink 27: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
13:54:15:setup_element:INFO: Eye window for uplink 28: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
13:54:15:setup_element:INFO: Eye window for uplink 29: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
13:54:15:setup_element:INFO: Eye window for uplink 30: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
13:54:15:setup_element:INFO: Eye window for uplink 31: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
13:54:15:setup_element:INFO: Setting the clock phase to 29 for group 0, downlink 3
13:54:15:setup_element:INFO: Scanning data phases
13:54:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:54:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
13:54:20:setup_element:INFO: Data phase scan results for group 0, downlink 3
13:54:20:setup_element:INFO: Eye window for uplink 24: XXX__________________________________XXX
Data delay found: 19
13:54:20:setup_element:INFO: Eye window for uplink 25: _XXXXX__________________________________
Data delay found: 23
13:54:20:setup_element:INFO: Eye window for uplink 26: XX__________________________________XXXX
Data delay found: 18
13:54:20:setup_element:INFO: Eye window for uplink 27: _XXXXX__________________________________
Data delay found: 23
13:54:20:setup_element:INFO: Eye window for uplink 28: XX___________________________________XXX
Data delay found: 19
13:54:20:setup_element:INFO: Eye window for uplink 29: XXXX___________________________________X
Data delay found: 21
13:54:20:setup_element:INFO: Eye window for uplink 30: XXXXX_________________________________XX
Data delay found: 21
13:54:20:setup_element:INFO: Eye window for uplink 31: XXX_________________________________XXXX
Data delay found: 19
13:54:20:setup_element:INFO: Setting the data phase to 19 for uplink 24
13:54:20:setup_element:INFO: Setting the data phase to 23 for uplink 25
13:54:20:setup_element:INFO: Setting the data phase to 18 for uplink 26
13:54:20:setup_element:INFO: Setting the data phase to 23 for uplink 27
13:54:20:setup_element:INFO: Setting the data phase to 19 for uplink 28
13:54:20:setup_element:INFO: Setting the data phase to 21 for uplink 29
13:54:20:setup_element:INFO: Setting the data phase to 21 for uplink 30
13:54:20:setup_element:INFO: Setting the data phase to 19 for uplink 31
13:54:20:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 3
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 29
Window Length: 71
Eye Windows:
Uplink 24: _________________________________________________________________XXXXXXXX_______
Uplink 25: _________________________________________________________________XXXXXXXX_______
Uplink 26: __________________________________________________________________XXXXXXXX______
Uplink 27: __________________________________________________________________XXXXXXXX______
Uplink 28: __________________________________________________________________XXXXXXXX______
Uplink 29: __________________________________________________________________XXXXXXXX______
Uplink 30: ___________________________________________________________________XXXXXXX______
Uplink 31: ___________________________________________________________________XXXXXXX______
Data phase characteristics:
Uplink 24:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 25:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 26:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 27:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 28:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 29:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 30:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 31:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
]
13:54:20:setup_element:INFO: Beginning SMX ASICs map scan
13:54:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:54:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
13:54:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [3]
13:54:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [3]
13:54:20:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:54:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 24
13:54:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 25
13:54:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 26
13:54:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 27
13:54:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 28
13:54:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 29
13:54:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 30
13:54:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 31
13:54:23:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 3
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 24), (1, 25)
ASIC address 0x3: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x5: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x7: (ASIC uplink, uplink): (0, 30), (1, 31)
Clock Phase Characteristic:
Optimal Phase: 29
Window Length: 71
Eye Windows:
Uplink 24: _________________________________________________________________XXXXXXXX_______
Uplink 25: _________________________________________________________________XXXXXXXX_______
Uplink 26: __________________________________________________________________XXXXXXXX______
Uplink 27: __________________________________________________________________XXXXXXXX______
Uplink 28: __________________________________________________________________XXXXXXXX______
Uplink 29: __________________________________________________________________XXXXXXXX______
Uplink 30: ___________________________________________________________________XXXXXXX______
Uplink 31: ___________________________________________________________________XXXXXXX______
Data phase characteristics:
Uplink 24:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 25:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 26:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 27:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 28:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 29:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 30:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 31:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
13:54:23:setup_element:INFO: Performing Elink synchronization
13:54:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:54:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3]
13:54:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [3]
13:54:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [3]
13:54:23:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 3
13:54:23:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
13:54:23:ST3_emu:INFO: Number of chips: 4
13:54:23:ST3_emu:INFO: Chip address: 0x1
13:54:23:ST3_emu:INFO: Chip address: 0x3
13:54:23:ST3_emu:INFO: Chip address: 0x5
13:54:23:ST3_emu:INFO: Chip address: 0x7
13:54:23:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
13:54:23:febtest:INFO: 0-1 | XA-000-08-002-000-001-129-09 | 31.4 | 1201.0
13:54:24:febtest:INFO: 0-3 | XA-000-08-002-000-001-130-09 | 60.0 | 1106.2
13:54:24:febtest:INFO: 0-5 | XA-000-08-002-000-001-122-15 | 53.6 | 1135.9
13:54:24:febtest:INFO: 0-7 | XA-000-08-002-000-001-119-15 | 34.6 | 1189.2
13:54:24:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
13:54:28:ST3_smx:INFO: chip: 0-1 37.726682 C 1165.571835 mV
13:54:28:ST3_smx:INFO: # loops 0
13:54:30:ST3_smx:INFO: # loops 1
13:54:31:ST3_smx:INFO: # loops 2
13:54:33:ST3_smx:INFO: # loops 3
13:54:35:ST3_smx:INFO: # loops 4
13:54:37:ST3_smx:INFO: Total # of broken channels: 0
13:54:37:ST3_smx:INFO: List of broken channels: []
13:54:37:ST3_smx:INFO: Total # of broken channels: 0
13:54:37:ST3_smx:INFO: List of broken channels: []
13:54:37:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
13:54:41:ST3_smx:INFO: chip: 0-3 56.797143 C 1106.178435 mV
13:54:41:ST3_smx:INFO: # loops 0
13:54:43:ST3_smx:INFO: # loops 1
13:54:44:ST3_smx:INFO: # loops 2
13:54:46:ST3_smx:INFO: # loops 3
13:54:48:ST3_smx:INFO: # loops 4
13:54:50:ST3_smx:INFO: Total # of broken channels: 0
13:54:50:ST3_smx:INFO: List of broken channels: []
13:54:50:ST3_smx:INFO: Total # of broken channels: 0
13:54:50:ST3_smx:INFO: List of broken channels: []
13:54:50:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
13:54:54:ST3_smx:INFO: chip: 0-5 53.612520 C 1118.096875 mV
13:54:54:ST3_smx:INFO: # loops 0
13:54:56:ST3_smx:INFO: # loops 1
13:54:57:ST3_smx:INFO: # loops 2
13:54:59:ST3_smx:INFO: # loops 3
13:55:01:ST3_smx:INFO: # loops 4
13:55:03:ST3_smx:INFO: Total # of broken channels: 0
13:55:03:ST3_smx:INFO: List of broken channels: []
13:55:03:ST3_smx:INFO: Total # of broken channels: 0
13:55:03:ST3_smx:INFO: List of broken channels: []
13:55:03:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
13:55:07:ST3_smx:INFO: chip: 0-7 44.073563 C 1147.806000 mV
13:55:07:ST3_smx:INFO: # loops 0
13:55:09:ST3_smx:INFO: # loops 1
13:55:10:ST3_smx:INFO: # loops 2
13:55:12:ST3_smx:INFO: # loops 3
13:55:14:ST3_smx:INFO: # loops 4
13:55:15:ST3_smx:INFO: Total # of broken channels: 0
13:55:15:ST3_smx:INFO: List of broken channels: []
13:55:15:ST3_smx:INFO: Total # of broken channels: 0
13:55:15:ST3_smx:INFO: List of broken channels: []
13:55:16:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
13:55:16:febtest:INFO: 0-1 | XA-000-08-002-000-001-129-09 | 37.7 | 1159.7
13:55:16:febtest:INFO: 0-3 | XA-000-08-002-000-001-130-09 | 56.8 | 1100.2
13:55:17:febtest:INFO: 0-5 | XA-000-08-002-000-001-122-15 | 53.6 | 1112.1
13:55:17:febtest:INFO: 0-7 | XA-000-08-002-000-001-119-15 | 44.1 | 1141.9
13:55:22:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1061/TestDate_2023_10_19-13_54_12/