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FEB_1062 18.01.24 10:37:30
Info
10:37:03:febtest:INFO: FEB 8-2 selected
10:37:03:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:37:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:37:30:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
10:37:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:38:02:ST3_ModuleSelector:INFO: L4UL401032 M4UL4B3010323A2 124 C
10:38:02:ST3_ModuleSelector:INFO:
10:38:03:febtest:INFO: Testing FEB with SN 1062
10:38:04:smx_tester:INFO: Scanning setup
10:38:04:elinks:INFO: Disabling clock on downlink 0
10:38:04:elinks:INFO: Disabling clock on downlink 1
10:38:04:elinks:INFO: Disabling clock on downlink 2
10:38:04:elinks:INFO: Disabling clock on downlink 3
10:38:04:elinks:INFO: Disabling clock on downlink 4
10:38:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:38:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:38:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:38:04:elinks:INFO: Disabling clock on downlink 0
10:38:04:elinks:INFO: Disabling clock on downlink 1
10:38:04:elinks:INFO: Disabling clock on downlink 2
10:38:04:elinks:INFO: Disabling clock on downlink 3
10:38:04:elinks:INFO: Disabling clock on downlink 4
10:38:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:38:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:38:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
10:38:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
10:38:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
10:38:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
10:38:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
10:38:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
10:38:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
10:38:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
10:38:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:38:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:38:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:38:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:38:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:38:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:38:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:38:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:38:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:38:04:elinks:INFO: Disabling clock on downlink 0
10:38:04:elinks:INFO: Disabling clock on downlink 1
10:38:04:elinks:INFO: Disabling clock on downlink 2
10:38:04:elinks:INFO: Disabling clock on downlink 3
10:38:04:elinks:INFO: Disabling clock on downlink 4
10:38:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:38:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:38:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:38:04:elinks:INFO: Disabling clock on downlink 0
10:38:04:elinks:INFO: Disabling clock on downlink 1
10:38:04:elinks:INFO: Disabling clock on downlink 2
10:38:04:elinks:INFO: Disabling clock on downlink 3
10:38:04:elinks:INFO: Disabling clock on downlink 4
10:38:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:38:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:38:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:38:05:elinks:INFO: Disabling clock on downlink 0
10:38:05:elinks:INFO: Disabling clock on downlink 1
10:38:05:elinks:INFO: Disabling clock on downlink 2
10:38:05:elinks:INFO: Disabling clock on downlink 3
10:38:05:elinks:INFO: Disabling clock on downlink 4
10:38:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:38:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:38:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:38:05:setup_element:INFO: Scanning clock phase
10:38:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:38:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:38:05:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:38:05:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:38:05:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:38:05:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________________
Clock Delay: 40
10:38:05:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________________
Clock Delay: 40
10:38:05:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:38:05:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:38:05:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:38:05:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:38:05:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:38:05:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:38:05:setup_element:INFO: Eye window for uplink 10: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:38:05:setup_element:INFO: Eye window for uplink 11: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:38:05:setup_element:INFO: Eye window for uplink 12: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:38:05:setup_element:INFO: Eye window for uplink 13: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:38:05:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:38:05:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:38:05:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
10:38:05:setup_element:INFO: Scanning data phases
10:38:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:38:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:38:11:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:38:11:setup_element:INFO: Eye window for uplink 0 : ___________XXXXXX_______________________
Data delay found: 33
10:38:11:setup_element:INFO: Eye window for uplink 1 : _______XXXXX____________________________
Data delay found: 29
10:38:11:setup_element:INFO: Eye window for uplink 2 : _________XXXX___________________________
Data delay found: 30
10:38:11:setup_element:INFO: Eye window for uplink 3 : ______XXXXX_____________________________
Data delay found: 28
10:38:11:setup_element:INFO: Eye window for uplink 4 : ______XXXXXX____________________________
Data delay found: 28
10:38:11:setup_element:INFO: Eye window for uplink 5 : __XXXXX_________________________________
Data delay found: 24
10:38:11:setup_element:INFO: Eye window for uplink 6 : XXXX___________________________________X
Data delay found: 21
10:38:11:setup_element:INFO: Eye window for uplink 7 : X__________________________________XXXXX
Data delay found: 17
10:38:11:setup_element:INFO: Eye window for uplink 8 : ______________________XXXX______________
Data delay found: 3
10:38:11:setup_element:INFO: Eye window for uplink 9 : ___________________________XXXXX________
Data delay found: 9
10:38:11:setup_element:INFO: Eye window for uplink 10: ________________________XXXXX___________
Data delay found: 6
10:38:11:setup_element:INFO: Eye window for uplink 11: ___________________________XXXXXX_______
Data delay found: 9
10:38:11:setup_element:INFO: Eye window for uplink 12: ________________________XXXX____________
Data delay found: 5
10:38:11:setup_element:INFO: Eye window for uplink 13: __________________________XXXX__________
Data delay found: 7
10:38:11:setup_element:INFO: Eye window for uplink 14: ________________________XXXXX___________
Data delay found: 6
10:38:11:setup_element:INFO: Eye window for uplink 15: _________________________XXXXXX_________
Data delay found: 7
10:38:11:setup_element:INFO: Setting the data phase to 33 for uplink 0
10:38:11:setup_element:INFO: Setting the data phase to 29 for uplink 1
10:38:11:setup_element:INFO: Setting the data phase to 30 for uplink 2
10:38:11:setup_element:INFO: Setting the data phase to 28 for uplink 3
10:38:11:setup_element:INFO: Setting the data phase to 28 for uplink 4
10:38:11:setup_element:INFO: Setting the data phase to 24 for uplink 5
10:38:11:setup_element:INFO: Setting the data phase to 21 for uplink 6
10:38:11:setup_element:INFO: Setting the data phase to 17 for uplink 7
10:38:11:setup_element:INFO: Setting the data phase to 3 for uplink 8
10:38:11:setup_element:INFO: Setting the data phase to 9 for uplink 9
10:38:11:setup_element:INFO: Setting the data phase to 6 for uplink 10
10:38:11:setup_element:INFO: Setting the data phase to 9 for uplink 11
10:38:11:setup_element:INFO: Setting the data phase to 5 for uplink 12
10:38:11:setup_element:INFO: Setting the data phase to 7 for uplink 13
10:38:11:setup_element:INFO: Setting the data phase to 6 for uplink 14
10:38:11:setup_element:INFO: Setting the data phase to 7 for uplink 15
10:38:11:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXX_
Uplink 1: _______________________________________________________________________XXXXXXXX_
Uplink 2: ________________________________________________________________________________
Uplink 3: ________________________________________________________________________________
Uplink 4: _______________________________________________________________________XXXXXXXX_
Uplink 5: _______________________________________________________________________XXXXXXXX_
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: ____________________________________________________________________XXXXXXXX____
Uplink 9: ____________________________________________________________________XXXXXXXX____
Uplink 10: ____________________________________________________________________XXXXXXXXX___
Uplink 11: ____________________________________________________________________XXXXXXXXX___
Uplink 12: ____________________________________________________________________XXXXXXXX____
Uplink 13: ____________________________________________________________________XXXXXXXX____
Uplink 14: _____________________________________________________________________XXXXXXX____
Uplink 15: _____________________________________________________________________XXXXXXX____
Data phase characteristics:
Uplink 0:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 1:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 2:
Optimal Phase: 30
Window Length: 36
Eye Window: _________XXXX___________________________
Uplink 3:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 4:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 5:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 8:
Optimal Phase: 3
Window Length: 36
Eye Window: ______________________XXXX______________
Uplink 9:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 10:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 11:
Optimal Phase: 9
Window Length: 34
Eye Window: ___________________________XXXXXX_______
Uplink 12:
Optimal Phase: 5
Window Length: 36
Eye Window: ________________________XXXX____________
Uplink 13:
Optimal Phase: 7
Window Length: 36
Eye Window: __________________________XXXX__________
Uplink 14:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 15:
Optimal Phase: 7
Window Length: 34
Eye Window: _________________________XXXXXX_________
]
10:38:11:setup_element:INFO: Beginning SMX ASICs map scan
10:38:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:38:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:38:11:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:38:11:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:38:11:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:38:11:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:38:11:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:38:11:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:38:11:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:38:12:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:38:12:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:38:12:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:38:12:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:38:12:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:38:12:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:38:12:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:38:12:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:38:12:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:38:12:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:38:13:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:38:13:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:38:14:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXX_
Uplink 1: _______________________________________________________________________XXXXXXXX_
Uplink 2: ________________________________________________________________________________
Uplink 3: ________________________________________________________________________________
Uplink 4: _______________________________________________________________________XXXXXXXX_
Uplink 5: _______________________________________________________________________XXXXXXXX_
Uplink 6: _______________________________________________________________________XXXXXXX__
Uplink 7: _______________________________________________________________________XXXXXXX__
Uplink 8: ____________________________________________________________________XXXXXXXX____
Uplink 9: ____________________________________________________________________XXXXXXXX____
Uplink 10: ____________________________________________________________________XXXXXXXXX___
Uplink 11: ____________________________________________________________________XXXXXXXXX___
Uplink 12: ____________________________________________________________________XXXXXXXX____
Uplink 13: ____________________________________________________________________XXXXXXXX____
Uplink 14: _____________________________________________________________________XXXXXXX____
Uplink 15: _____________________________________________________________________XXXXXXX____
Data phase characteristics:
Uplink 0:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 1:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 2:
Optimal Phase: 30
Window Length: 36
Eye Window: _________XXXX___________________________
Uplink 3:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 4:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 5:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 8:
Optimal Phase: 3
Window Length: 36
Eye Window: ______________________XXXX______________
Uplink 9:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 10:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 11:
Optimal Phase: 9
Window Length: 34
Eye Window: ___________________________XXXXXX_______
Uplink 12:
Optimal Phase: 5
Window Length: 36
Eye Window: ________________________XXXX____________
Uplink 13:
Optimal Phase: 7
Window Length: 36
Eye Window: __________________________XXXX__________
Uplink 14:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 15:
Optimal Phase: 7
Window Length: 34
Eye Window: _________________________XXXXXX_________
10:38:14:setup_element:INFO: Performing Elink synchronization
10:38:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:38:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:38:14:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:38:14:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:38:14:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:38:14:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:38:14:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
10:38:15:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:38:15:febtest:INFO: 1-0 | XA-000-08-002-000-005-247-03 | 31.4 | 1212.7
10:38:15:febtest:INFO: 8-1 | XA-000-08-002-000-001-151-14 | 34.6 | 1201.0
10:38:16:febtest:INFO: 3-2 | XA-000-08-002-000-005-181-06 | 25.1 | 1242.0
10:38:16:febtest:INFO: 10-3 | XA-000-08-002-000-001-148-14 | 34.6 | 1206.9
10:38:16:febtest:INFO: 5-4 | XA-000-08-002-000-005-208-13 | 28.2 | 1230.3
10:38:16:febtest:INFO: 12-5 | XA-000-08-002-000-001-150-14 | 31.4 | 1212.7
10:38:17:febtest:INFO: 7-6 | XA-000-08-002-000-005-216-13 | 21.9 | 1253.7
10:38:17:febtest:INFO: 14-7 | XA-000-08-002-000-001-149-14 | 31.4 | 1201.0
10:38:17:ST3_smx:INFO: Configuring SMX FAST
10:38:19:ST3_smx:INFO: chip: 1-0 31.389742 C 1218.600960 mV
10:38:19:ST3_smx:INFO: Electrons
10:38:19:ST3_smx:INFO: # loops 0
10:38:21:ST3_smx:INFO: # loops 1
10:38:22:ST3_smx:INFO: # loops 2
10:38:24:ST3_smx:INFO: # loops 3
10:38:25:ST3_smx:INFO: # loops 4
10:38:27:ST3_smx:INFO: Total # of broken channels: 0
10:38:27:ST3_smx:INFO: List of broken channels: []
10:38:27:ST3_smx:INFO: Total # of broken channels: 0
10:38:27:ST3_smx:INFO: List of broken channels: []
10:38:27:ST3_smx:INFO: Configuring SMX FAST
10:38:29:ST3_smx:INFO: chip: 8-1 34.556970 C 1195.082160 mV
10:38:29:ST3_smx:INFO: Electrons
10:38:29:ST3_smx:INFO: # loops 0
10:38:31:ST3_smx:INFO: # loops 1
10:38:32:ST3_smx:INFO: # loops 2
10:38:34:ST3_smx:INFO: # loops 3
10:38:35:ST3_smx:INFO: # loops 4
10:38:37:ST3_smx:INFO: Total # of broken channels: 0
10:38:37:ST3_smx:INFO: List of broken channels: []
10:38:37:ST3_smx:INFO: Total # of broken channels: 0
10:38:37:ST3_smx:INFO: List of broken channels: []
10:38:37:ST3_smx:INFO: Configuring SMX FAST
10:38:39:ST3_smx:INFO: chip: 3-2 34.556970 C 1206.851500 mV
10:38:39:ST3_smx:INFO: Electrons
10:38:39:ST3_smx:INFO: # loops 0
10:38:41:ST3_smx:INFO: # loops 1
10:38:42:ST3_smx:INFO: # loops 2
10:38:44:ST3_smx:INFO: # loops 3
10:38:46:ST3_smx:INFO: # loops 4
10:38:47:ST3_smx:INFO: Total # of broken channels: 0
10:38:47:ST3_smx:INFO: List of broken channels: []
10:38:47:ST3_smx:INFO: Total # of broken channels: 0
10:38:47:ST3_smx:INFO: List of broken channels: []
10:38:47:ST3_smx:INFO: Configuring SMX FAST
10:38:49:ST3_smx:INFO: chip: 10-3 28.225000 C 1224.468235 mV
10:38:49:ST3_smx:INFO: Electrons
10:38:49:ST3_smx:INFO: # loops 0
10:38:51:ST3_smx:INFO: # loops 1
10:38:53:ST3_smx:INFO: # loops 2
10:38:54:ST3_smx:INFO: # loops 3
10:38:56:ST3_smx:INFO: # loops 4
10:38:57:ST3_smx:INFO: Total # of broken channels: 0
10:38:57:ST3_smx:INFO: List of broken channels: []
10:38:57:ST3_smx:INFO: Total # of broken channels: 0
10:38:57:ST3_smx:INFO: List of broken channels: []
10:38:58:ST3_smx:INFO: Configuring SMX FAST
10:39:00:ST3_smx:INFO: chip: 5-4 34.556970 C 1212.728715 mV
10:39:00:ST3_smx:INFO: Electrons
10:39:00:ST3_smx:INFO: # loops 0
10:39:01:ST3_smx:INFO: # loops 1
10:39:03:ST3_smx:INFO: # loops 2
10:39:04:ST3_smx:INFO: # loops 3
10:39:06:ST3_smx:INFO: # loops 4
10:39:08:ST3_smx:INFO: Total # of broken channels: 0
10:39:08:ST3_smx:INFO: List of broken channels: []
10:39:08:ST3_smx:INFO: Total # of broken channels: 0
10:39:08:ST3_smx:INFO: List of broken channels: []
10:39:08:ST3_smx:INFO: Configuring SMX FAST
10:39:10:ST3_smx:INFO: chip: 12-5 34.556970 C 1206.851500 mV
10:39:10:ST3_smx:INFO: Electrons
10:39:10:ST3_smx:INFO: # loops 0
10:39:11:ST3_smx:INFO: # loops 1
10:39:13:ST3_smx:INFO: # loops 2
10:39:15:ST3_smx:INFO: # loops 3
10:39:16:ST3_smx:INFO: # loops 4
10:39:18:ST3_smx:INFO: Total # of broken channels: 0
10:39:18:ST3_smx:INFO: List of broken channels: []
10:39:18:ST3_smx:INFO: Total # of broken channels: 0
10:39:18:ST3_smx:INFO: List of broken channels: []
10:39:18:ST3_smx:INFO: Configuring SMX FAST
10:39:20:ST3_smx:INFO: chip: 7-6 25.062742 C 1247.887635 mV
10:39:20:ST3_smx:INFO: Electrons
10:39:20:ST3_smx:INFO: # loops 0
10:39:22:ST3_smx:INFO: # loops 1
10:39:23:ST3_smx:INFO: # loops 2
10:39:25:ST3_smx:INFO: # loops 3
10:39:26:ST3_smx:INFO: # loops 4
10:39:28:ST3_smx:INFO: Total # of broken channels: 0
10:39:28:ST3_smx:INFO: List of broken channels: []
10:39:28:ST3_smx:INFO: Total # of broken channels: 0
10:39:28:ST3_smx:INFO: List of broken channels: []
10:39:28:ST3_smx:INFO: Configuring SMX FAST
10:39:30:ST3_smx:INFO: chip: 14-7 34.556970 C 1206.851500 mV
10:39:30:ST3_smx:INFO: Electrons
10:39:30:ST3_smx:INFO: # loops 0
10:39:32:ST3_smx:INFO: # loops 1
10:39:33:ST3_smx:INFO: # loops 2
10:39:35:ST3_smx:INFO: # loops 3
10:39:37:ST3_smx:INFO: # loops 4
10:39:38:ST3_smx:INFO: Total # of broken channels: 0
10:39:38:ST3_smx:INFO: List of broken channels: []
10:39:38:ST3_smx:INFO: Total # of broken channels: 1
10:39:38:ST3_smx:INFO: List of broken channels: [11]
10:39:39:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:39:39:febtest:INFO: 1-0 | XA-000-08-002-000-005-247-03 | 34.6 | 1212.7
10:39:39:febtest:INFO: 8-1 | XA-000-08-002-000-001-151-14 | 37.7 | 1201.0
10:39:40:febtest:INFO: 3-2 | XA-000-08-002-000-005-181-06 | 34.6 | 1206.9
10:39:40:febtest:INFO: 10-3 | XA-000-08-002-000-001-148-14 | 28.2 | 1230.3
10:39:40:febtest:INFO: 5-4 | XA-000-08-002-000-005-208-13 | 34.6 | 1218.6
10:39:40:febtest:INFO: 12-5 | XA-000-08-002-000-001-150-14 | 34.6 | 1212.7
10:39:41:febtest:INFO: 7-6 | XA-000-08-002-000-005-216-13 | 25.1 | 1247.9
10:39:41:febtest:INFO: 14-7 | XA-000-08-002-000-001-149-14 | 34.6 | 1206.9
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_01_18-10_37_30
OPERATOR : Kerstin S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4UL401032 M4UL4B3010323A2 124 C
FEB_SN : 1062
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:
MODULE_NAME: L4UL401032 M4UL4B3010323A2 124 C
MODULE_TYPE:
MODULE_LADDER: L4UL401032
MODULE_MODULE: M4UL4T0010320B2
MODULE_SIZE: 42
MODULE_GRADE: C
---------------------------------------
VI_before_Init : ['2.450', '1.8380', '1.851', '0.5012', '7.000', '1.5800', '7.000', '1.5800']
VI_after__Init : ['2.450', '1.9610', '1.850', '0.4950', '7.000', '1.5810', '7.000', '1.5810']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
10:39:46:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1062/TestDate_2024_01_18-10_37_30/