Go Back
FEB_1062 11.01.24 10:22:06
TextEdit.txt
10:22:06:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:22:06:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
10:22:06:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:22:06:febtest:INFO: Testing FEB with SN 1062
10:22:07:smx_tester:INFO: Scanning setup
10:22:07:elinks:INFO: Disabling clock on downlink 0
10:22:07:elinks:INFO: Disabling clock on downlink 1
10:22:07:elinks:INFO: Disabling clock on downlink 2
10:22:07:elinks:INFO: Disabling clock on downlink 3
10:22:07:elinks:INFO: Disabling clock on downlink 4
10:22:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:22:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:22:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:22:07:elinks:INFO: Disabling clock on downlink 0
10:22:07:elinks:INFO: Disabling clock on downlink 1
10:22:07:elinks:INFO: Disabling clock on downlink 2
10:22:07:elinks:INFO: Disabling clock on downlink 3
10:22:07:elinks:INFO: Disabling clock on downlink 4
10:22:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:22:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
10:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
10:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
10:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
10:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
10:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
10:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
10:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
10:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:22:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:22:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:22:07:elinks:INFO: Disabling clock on downlink 0
10:22:07:elinks:INFO: Disabling clock on downlink 1
10:22:07:elinks:INFO: Disabling clock on downlink 2
10:22:07:elinks:INFO: Disabling clock on downlink 3
10:22:07:elinks:INFO: Disabling clock on downlink 4
10:22:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:22:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:22:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:22:08:elinks:INFO: Disabling clock on downlink 0
10:22:08:elinks:INFO: Disabling clock on downlink 1
10:22:08:elinks:INFO: Disabling clock on downlink 2
10:22:08:elinks:INFO: Disabling clock on downlink 3
10:22:08:elinks:INFO: Disabling clock on downlink 4
10:22:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:22:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:22:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:22:08:elinks:INFO: Disabling clock on downlink 0
10:22:08:elinks:INFO: Disabling clock on downlink 1
10:22:08:elinks:INFO: Disabling clock on downlink 2
10:22:08:elinks:INFO: Disabling clock on downlink 3
10:22:08:elinks:INFO: Disabling clock on downlink 4
10:22:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:22:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:22:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:22:08:setup_element:INFO: Scanning clock phase
10:22:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:22:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:22:08:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:22:08:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:22:08:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:22:08:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:22:08:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:22:08:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:22:08:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:22:08:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:22:08:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:22:08:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:22:08:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:22:08:setup_element:INFO: Eye window for uplink 10: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:22:08:setup_element:INFO: Eye window for uplink 11: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:22:08:setup_element:INFO: Eye window for uplink 12: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:22:08:setup_element:INFO: Eye window for uplink 13: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:22:08:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:22:08:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:22:08:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
10:22:08:setup_element:INFO: Scanning data phases
10:22:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:22:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:22:14:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:22:14:setup_element:INFO: Eye window for uplink 0 : _____________XXXXX______________________
Data delay found: 35
10:22:14:setup_element:INFO: Eye window for uplink 1 : ________XXXXX___________________________
Data delay found: 30
10:22:14:setup_element:INFO: Eye window for uplink 2 : _________XXXXXX_________________________
Data delay found: 31
10:22:14:setup_element:INFO: Eye window for uplink 3 : ______XXXXXX____________________________
Data delay found: 28
10:22:14:setup_element:INFO: Eye window for uplink 4 : _______XXXXX____________________________
Data delay found: 29
10:22:14:setup_element:INFO: Eye window for uplink 5 : ___XXXXX________________________________
Data delay found: 25
10:22:14:setup_element:INFO: Eye window for uplink 6 : XXXXX___________________________________
Data delay found: 22
10:22:14:setup_element:INFO: Eye window for uplink 7 : XX_________________________________XXXXX
Data delay found: 18
10:22:14:setup_element:INFO: Eye window for uplink 8 : _______________________XXXX_____________
Data delay found: 4
10:22:14:setup_element:INFO: Eye window for uplink 9 : ___________________________XXXXXX_______
Data delay found: 9
10:22:14:setup_element:INFO: Eye window for uplink 10: _________________________XXXXX__________
Data delay found: 7
10:22:14:setup_element:INFO: Eye window for uplink 11: ____________________________XXXXXX______
Data delay found: 10
10:22:14:setup_element:INFO: Eye window for uplink 12: ________________________XXXXX___________
Data delay found: 6
10:22:14:setup_element:INFO: Eye window for uplink 13: ___________________________XXXXX________
Data delay found: 9
10:22:14:setup_element:INFO: Eye window for uplink 14: ________________________XXXXX___________
Data delay found: 6
10:22:14:setup_element:INFO: Eye window for uplink 15: __________________________XXXXX_________
Data delay found: 8
10:22:14:setup_element:INFO: Setting the data phase to 35 for uplink 0
10:22:14:setup_element:INFO: Setting the data phase to 30 for uplink 1
10:22:14:setup_element:INFO: Setting the data phase to 31 for uplink 2
10:22:14:setup_element:INFO: Setting the data phase to 28 for uplink 3
10:22:14:setup_element:INFO: Setting the data phase to 29 for uplink 4
10:22:14:setup_element:INFO: Setting the data phase to 25 for uplink 5
10:22:14:setup_element:INFO: Setting the data phase to 22 for uplink 6
10:22:14:setup_element:INFO: Setting the data phase to 18 for uplink 7
10:22:14:setup_element:INFO: Setting the data phase to 4 for uplink 8
10:22:14:setup_element:INFO: Setting the data phase to 9 for uplink 9
10:22:14:setup_element:INFO: Setting the data phase to 7 for uplink 10
10:22:14:setup_element:INFO: Setting the data phase to 10 for uplink 11
10:22:14:setup_element:INFO: Setting the data phase to 6 for uplink 12
10:22:14:setup_element:INFO: Setting the data phase to 9 for uplink 13
10:22:14:setup_element:INFO: Setting the data phase to 6 for uplink 14
10:22:14:setup_element:INFO: Setting the data phase to 8 for uplink 15
10:22:14:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXX_
Uplink 1: ________________________________________________________________________XXXXXXX_
Uplink 2: _______________________________________________________________________XXXXXXXX_
Uplink 3: _______________________________________________________________________XXXXXXXX_
Uplink 4: ________________________________________________________________________XXXXXXX_
Uplink 5: ________________________________________________________________________XXXXXXX_
Uplink 6: _______________________________________________________________________XXXXXXXX_
Uplink 7: _______________________________________________________________________XXXXXXXX_
Uplink 8: ____________________________________________________________________XXXXXXXXX___
Uplink 9: ____________________________________________________________________XXXXXXXXX___
Uplink 10: ____________________________________________________________________XXXXXXXXX___
Uplink 11: ____________________________________________________________________XXXXXXXXX___
Uplink 12: ____________________________________________________________________XXXXXXXX____
Uplink 13: ____________________________________________________________________XXXXXXXX____
Uplink 14: _____________________________________________________________________XXXXXXX____
Uplink 15: _____________________________________________________________________XXXXXXX____
Data phase characteristics:
Uplink 0:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 1:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 2:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 3:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 4:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 5:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 6:
Optimal Phase: 22
Window Length: 35
Eye Window: XXXXX___________________________________
Uplink 7:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 8:
Optimal Phase: 4
Window Length: 36
Eye Window: _______________________XXXX_____________
Uplink 9:
Optimal Phase: 9
Window Length: 34
Eye Window: ___________________________XXXXXX_______
Uplink 10:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 11:
Optimal Phase: 10
Window Length: 34
Eye Window: ____________________________XXXXXX______
Uplink 12:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 13:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 14:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 15:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
]
10:22:14:setup_element:INFO: Beginning SMX ASICs map scan
10:22:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:22:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:22:14:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:22:14:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:22:14:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:22:14:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:22:14:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:22:14:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:22:14:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:22:14:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:22:15:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:22:15:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:22:15:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:22:15:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:22:15:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:22:15:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:22:15:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:22:15:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:22:15:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:22:15:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:22:15:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:22:17:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXX_
Uplink 1: ________________________________________________________________________XXXXXXX_
Uplink 2: _______________________________________________________________________XXXXXXXX_
Uplink 3: _______________________________________________________________________XXXXXXXX_
Uplink 4: ________________________________________________________________________XXXXXXX_
Uplink 5: ________________________________________________________________________XXXXXXX_
Uplink 6: _______________________________________________________________________XXXXXXXX_
Uplink 7: _______________________________________________________________________XXXXXXXX_
Uplink 8: ____________________________________________________________________XXXXXXXXX___
Uplink 9: ____________________________________________________________________XXXXXXXXX___
Uplink 10: ____________________________________________________________________XXXXXXXXX___
Uplink 11: ____________________________________________________________________XXXXXXXXX___
Uplink 12: ____________________________________________________________________XXXXXXXX____
Uplink 13: ____________________________________________________________________XXXXXXXX____
Uplink 14: _____________________________________________________________________XXXXXXX____
Uplink 15: _____________________________________________________________________XXXXXXX____
Data phase characteristics:
Uplink 0:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 1:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 2:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 3:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 4:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 5:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 6:
Optimal Phase: 22
Window Length: 35
Eye Window: XXXXX___________________________________
Uplink 7:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 8:
Optimal Phase: 4
Window Length: 36
Eye Window: _______________________XXXX_____________
Uplink 9:
Optimal Phase: 9
Window Length: 34
Eye Window: ___________________________XXXXXX_______
Uplink 10:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 11:
Optimal Phase: 10
Window Length: 34
Eye Window: ____________________________XXXXXX______
Uplink 12:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 13:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 14:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 15:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
10:22:17:setup_element:INFO: Performing Elink synchronization
10:22:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:22:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:22:17:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:22:17:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:22:17:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:22:17:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:22:17:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
10:22:18:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:22:18:febtest:INFO: 1-0 | XA-000-08-002-000-005-247-03 | 18.7 | 1236.2
10:22:18:febtest:INFO: 8-1 | XA-000-08-002-000-001-151-14 | 25.1 | 1189.2
10:22:18:febtest:INFO: 3-2 | XA-000-08-002-000-005-181-06 | 15.6 | 1230.3
10:22:19:febtest:INFO: 10-3 | XA-000-08-002-000-001-148-14 | 21.9 | 1206.9
10:22:19:febtest:INFO: 5-4 | XA-000-08-002-000-005-208-13 | 15.6 | 1236.2
10:22:19:febtest:INFO: 12-5 | XA-000-08-002-000-001-150-14 | 21.9 | 1212.7
10:22:19:febtest:INFO: 7-6 | XA-000-08-002-000-005-216-13 | 15.6 | 1236.2
10:22:19:febtest:INFO: 14-7 | XA-000-08-002-000-001-149-14 | 25.1 | 1195.1
10:22:19:ST3_smx:INFO: Configuring SMX FAST
10:22:21:ST3_smx:INFO: chip: 1-0 21.902970 C 1212.728715 mV
10:22:21:ST3_smx:INFO: Electrons
10:22:21:ST3_smx:INFO: # loops 0
10:22:23:ST3_smx:INFO: # loops 1
10:22:25:ST3_smx:INFO: # loops 2
10:22:26:ST3_smx:INFO: # loops 3
10:22:28:ST3_smx:INFO: # loops 4
10:22:30:ST3_smx:INFO: Total # of broken channels: 0
10:22:30:ST3_smx:INFO: List of broken channels: []
10:22:30:ST3_smx:INFO: Total # of broken channels: 0
10:22:30:ST3_smx:INFO: List of broken channels: []
10:22:30:ST3_smx:INFO: Configuring SMX FAST
10:22:32:ST3_smx:INFO: chip: 8-1 25.062742 C 1200.969315 mV
10:22:32:ST3_smx:INFO: Electrons
10:22:32:ST3_smx:INFO: # loops 0
10:22:34:ST3_smx:INFO: # loops 1
10:22:36:ST3_smx:INFO: # loops 2
10:22:37:ST3_smx:INFO: # loops 3
10:22:39:ST3_smx:INFO: # loops 4
10:22:41:ST3_smx:INFO: Total # of broken channels: 0
10:22:41:ST3_smx:INFO: List of broken channels: []
10:22:41:ST3_smx:INFO: Total # of broken channels: 0
10:22:41:ST3_smx:INFO: List of broken channels: []
10:22:41:ST3_smx:INFO: Configuring SMX FAST
10:22:43:ST3_smx:INFO: chip: 3-2 28.225000 C 1200.969315 mV
10:22:43:ST3_smx:INFO: Electrons
10:22:43:ST3_smx:INFO: # loops 0
10:22:45:ST3_smx:INFO: # loops 1
10:22:47:ST3_smx:INFO: # loops 2
10:22:48:ST3_smx:INFO: # loops 3
10:22:50:ST3_smx:INFO: # loops 4
10:22:52:ST3_smx:INFO: Total # of broken channels: 0
10:22:52:ST3_smx:INFO: List of broken channels: []
10:22:52:ST3_smx:INFO: Total # of broken channels: 0
10:22:52:ST3_smx:INFO: List of broken channels: []
10:22:52:ST3_smx:INFO: Configuring SMX FAST
10:22:54:ST3_smx:INFO: chip: 10-3 18.745682 C 1230.330540 mV
10:22:54:ST3_smx:INFO: Electrons
10:22:54:ST3_smx:INFO: # loops 0
10:22:56:ST3_smx:INFO: # loops 1
10:22:58:ST3_smx:INFO: # loops 2
10:22:59:ST3_smx:INFO: # loops 3
10:23:01:ST3_smx:INFO: # loops 4
10:23:03:ST3_smx:INFO: Total # of broken channels: 0
10:23:03:ST3_smx:INFO: List of broken channels: []
10:23:03:ST3_smx:INFO: Total # of broken channels: 0
10:23:03:ST3_smx:INFO: List of broken channels: []
10:23:03:ST3_smx:INFO: Configuring SMX FAST
10:23:05:ST3_smx:INFO: chip: 5-4 25.062742 C 1206.851500 mV
10:23:05:ST3_smx:INFO: Electrons
10:23:05:ST3_smx:INFO: # loops 0
10:23:07:ST3_smx:INFO: # loops 1
10:23:08:ST3_smx:INFO: # loops 2
10:23:10:ST3_smx:INFO: # loops 3
10:23:12:ST3_smx:INFO: # loops 4
10:23:13:ST3_smx:INFO: Total # of broken channels: 0
10:23:13:ST3_smx:INFO: List of broken channels: []
10:23:13:ST3_smx:INFO: Total # of broken channels: 0
10:23:13:ST3_smx:INFO: List of broken channels: []
10:23:14:ST3_smx:INFO: Configuring SMX FAST
10:23:16:ST3_smx:INFO: chip: 12-5 25.062742 C 1212.728715 mV
10:23:16:ST3_smx:INFO: Electrons
10:23:16:ST3_smx:INFO: # loops 0
10:23:18:ST3_smx:INFO: # loops 1
10:23:19:ST3_smx:INFO: # loops 2
10:23:21:ST3_smx:INFO: # loops 3
10:23:22:ST3_smx:INFO: # loops 4
10:23:24:ST3_smx:INFO: Total # of broken channels: 0
10:23:24:ST3_smx:INFO: List of broken channels: []
10:23:24:ST3_smx:INFO: Total # of broken channels: 0
10:23:24:ST3_smx:INFO: List of broken channels: []
10:23:25:ST3_smx:INFO: Configuring SMX FAST
10:23:27:ST3_smx:INFO: chip: 7-6 15.590880 C 1247.887635 mV
10:23:27:ST3_smx:INFO: Electrons
10:23:27:ST3_smx:INFO: # loops 0
10:23:28:ST3_smx:INFO: # loops 1
10:23:30:ST3_smx:INFO: # loops 2
10:23:32:ST3_smx:INFO: # loops 3
10:23:33:ST3_smx:INFO: # loops 4
10:23:35:ST3_smx:INFO: Total # of broken channels: 0
10:23:35:ST3_smx:INFO: List of broken channels: []
10:23:35:ST3_smx:INFO: Total # of broken channels: 0
10:23:35:ST3_smx:INFO: List of broken channels: []
10:23:35:ST3_smx:INFO: Configuring SMX FAST
10:23:37:ST3_smx:INFO: chip: 14-7 25.062742 C 1200.969315 mV
10:23:37:ST3_smx:INFO: Electrons
10:23:37:ST3_smx:INFO: # loops 0
10:23:39:ST3_smx:INFO: # loops 1
10:23:41:ST3_smx:INFO: # loops 2
10:23:42:ST3_smx:INFO: # loops 3
10:23:44:ST3_smx:INFO: # loops 4
10:23:45:ST3_smx:INFO: Total # of broken channels: 0
10:23:45:ST3_smx:INFO: List of broken channels: []
10:23:45:ST3_smx:INFO: Total # of broken channels: 0
10:23:45:ST3_smx:INFO: List of broken channels: []
10:23:46:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:23:46:febtest:INFO: 1-0 | XA-000-08-002-000-005-247-03 | 25.1 | 1212.7
10:23:46:febtest:INFO: 8-1 | XA-000-08-002-000-001-151-14 | 28.2 | 1201.0
10:23:47:febtest:INFO: 3-2 | XA-000-08-002-000-005-181-06 | 28.2 | 1201.0
10:23:47:febtest:INFO: 10-3 | XA-000-08-002-000-001-148-14 | 18.7 | 1230.3
10:23:47:febtest:INFO: 5-4 | XA-000-08-002-000-005-208-13 | 25.1 | 1206.9
10:23:47:febtest:INFO: 12-5 | XA-000-08-002-000-001-150-14 | 25.1 | 1212.7
10:23:47:febtest:INFO: 7-6 | XA-000-08-002-000-005-216-13 | 15.6 | 1247.9
10:23:48:febtest:INFO: 14-7 | XA-000-08-002-000-001-149-14 | 25.1 | 1201.0
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_11-10_22_06
OPERATOR : Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L6DL200120 M6DL2B4001204B2 124 C
FEB_SN : 1062
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.447', '1.8730', '1.845', '2.6260', '7.001', '1.5510', '7.001', '1.5510']
VI_after__Init : ['2.450', '1.9830', '1.850', '0.5867', '7.000', '1.5480', '7.000', '1.5480']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
10:23:57:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1062/TestDate_2024_01_11-10_22_06/