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FEB_1065 11.01.24 10:40:16
TextEdit.txt
10:40:13:febtest:INFO: FEB 8-2 selected
10:40:13:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:40:16:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:40:16:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
10:40:16:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:41:09:ST3_ModuleSelector:INFO: L4UL201031 M4UL2T4010314B2 124 C
10:41:09:ST3_ModuleSelector:INFO: 11074
10:41:10:febtest:INFO: Testing FEB with SN 1065
10:41:11:smx_tester:INFO: Scanning setup
10:41:11:elinks:INFO: Disabling clock on downlink 0
10:41:11:elinks:INFO: Disabling clock on downlink 1
10:41:11:elinks:INFO: Disabling clock on downlink 2
10:41:11:elinks:INFO: Disabling clock on downlink 3
10:41:11:elinks:INFO: Disabling clock on downlink 4
10:41:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:41:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:41:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:41:11:elinks:INFO: Disabling clock on downlink 0
10:41:11:elinks:INFO: Disabling clock on downlink 1
10:41:11:elinks:INFO: Disabling clock on downlink 2
10:41:11:elinks:INFO: Disabling clock on downlink 3
10:41:11:elinks:INFO: Disabling clock on downlink 4
10:41:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:41:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:41:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
10:41:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
10:41:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
10:41:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
10:41:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
10:41:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
10:41:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
10:41:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
10:41:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:41:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:41:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:41:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:41:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:41:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:41:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:41:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:41:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:41:11:elinks:INFO: Disabling clock on downlink 0
10:41:11:elinks:INFO: Disabling clock on downlink 1
10:41:11:elinks:INFO: Disabling clock on downlink 2
10:41:11:elinks:INFO: Disabling clock on downlink 3
10:41:11:elinks:INFO: Disabling clock on downlink 4
10:41:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:41:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:41:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:41:11:elinks:INFO: Disabling clock on downlink 0
10:41:11:elinks:INFO: Disabling clock on downlink 1
10:41:11:elinks:INFO: Disabling clock on downlink 2
10:41:11:elinks:INFO: Disabling clock on downlink 3
10:41:11:elinks:INFO: Disabling clock on downlink 4
10:41:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:41:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:41:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:41:11:elinks:INFO: Disabling clock on downlink 0
10:41:11:elinks:INFO: Disabling clock on downlink 1
10:41:11:elinks:INFO: Disabling clock on downlink 2
10:41:11:elinks:INFO: Disabling clock on downlink 3
10:41:11:elinks:INFO: Disabling clock on downlink 4
10:41:12:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:41:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:41:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:41:12:setup_element:INFO: Scanning clock phase
10:41:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:41:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:41:12:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:41:12:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
10:41:12:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
10:41:12:setup_element:INFO: Eye window for uplink 2 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:41:12:setup_element:INFO: Eye window for uplink 3 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:41:12:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:41:12:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:41:12:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:41:12:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:41:12:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:41:12:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:41:12:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:41:12:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:41:12:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
10:41:12:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
10:41:12:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:41:12:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:41:12:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
10:41:12:setup_element:INFO: Scanning data phases
10:41:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:41:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:41:18:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:41:18:setup_element:INFO: Eye window for uplink 0 : _____________XXXXXX_____________________
Data delay found: 35
10:41:18:setup_element:INFO: Eye window for uplink 1 : _________XXXXX__________________________
Data delay found: 31
10:41:18:setup_element:INFO: Eye window for uplink 2 : ____XXXXXXX_____________________________
Data delay found: 27
10:41:18:setup_element:INFO: Eye window for uplink 3 : _XXXXXXX_______________________________X
Data delay found: 23
10:41:18:setup_element:INFO: Eye window for uplink 4 : _____XXXXXX_____________________________
Data delay found: 27
10:41:18:setup_element:INFO: Eye window for uplink 5 : _XXXXX__________________________________
Data delay found: 23
10:41:18:setup_element:INFO: Eye window for uplink 6 : XXXX___________________________________X
Data delay found: 21
10:41:18:setup_element:INFO: Eye window for uplink 7 : X__________________________________XXXXX
Data delay found: 17
10:41:18:setup_element:INFO: Eye window for uplink 8 : ________________________XXXX____________
Data delay found: 5
10:41:18:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXXX______
Data delay found: 11
10:41:18:setup_element:INFO: Eye window for uplink 10: __________________________XXXXXX________
Data delay found: 8
10:41:18:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXXX____
Data delay found: 12
10:41:18:setup_element:INFO: Eye window for uplink 12: ______________________________XXXX______
Data delay found: 11
10:41:18:setup_element:INFO: Eye window for uplink 13: ________________________________XXXXX___
Data delay found: 14
10:41:18:setup_element:INFO: Eye window for uplink 14: __________________________XXXXXXXXXXXXXX
Data delay found: 12
10:41:18:setup_element:INFO: Eye window for uplink 15: __________________________XXXXXXXXXXXXXX
Data delay found: 12
10:41:18:setup_element:INFO: Setting the data phase to 35 for uplink 0
10:41:18:setup_element:INFO: Setting the data phase to 31 for uplink 1
10:41:18:setup_element:INFO: Setting the data phase to 27 for uplink 2
10:41:18:setup_element:INFO: Setting the data phase to 23 for uplink 3
10:41:18:setup_element:INFO: Setting the data phase to 27 for uplink 4
10:41:18:setup_element:INFO: Setting the data phase to 23 for uplink 5
10:41:18:setup_element:INFO: Setting the data phase to 21 for uplink 6
10:41:18:setup_element:INFO: Setting the data phase to 17 for uplink 7
10:41:18:setup_element:INFO: Setting the data phase to 5 for uplink 8
10:41:18:setup_element:INFO: Setting the data phase to 11 for uplink 9
10:41:18:setup_element:INFO: Setting the data phase to 8 for uplink 10
10:41:18:setup_element:INFO: Setting the data phase to 12 for uplink 11
10:41:18:setup_element:INFO: Setting the data phase to 11 for uplink 12
10:41:18:setup_element:INFO: Setting the data phase to 14 for uplink 13
10:41:18:setup_element:INFO: Setting the data phase to 12 for uplink 14
10:41:18:setup_element:INFO: Setting the data phase to 12 for uplink 15
10:41:18:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 68
Eye Windows:
Uplink 0: _________________________________________________________________________XXXXXXX
Uplink 1: _________________________________________________________________________XXXXXXX
Uplink 2: ____________________________________________________________________XXXXXXXX____
Uplink 3: ____________________________________________________________________XXXXXXXX____
Uplink 4: _______________________________________________________________________XXXXXXX__
Uplink 5: _______________________________________________________________________XXXXXXX__
Uplink 6: _______________________________________________________________________XXXXXXXX_
Uplink 7: _______________________________________________________________________XXXXXXXX_
Uplink 8: _____________________________________________________________________XXXXXXXX___
Uplink 9: _____________________________________________________________________XXXXXXXX___
Uplink 10: ______________________________________________________________________XXXXXXX___
Uplink 11: ______________________________________________________________________XXXXXXX___
Uplink 12: _______________________________________________________________________XXXXXXXXX
Uplink 13: _______________________________________________________________________XXXXXXXXX
Uplink 14: _______________________________________________________________________XXXXXXX__
Uplink 15: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 1:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 2:
Optimal Phase: 27
Window Length: 33
Eye Window: ____XXXXXXX_____________________________
Uplink 3:
Optimal Phase: 23
Window Length: 31
Eye Window: _XXXXXXX_______________________________X
Uplink 4:
Optimal Phase: 27
Window Length: 34
Eye Window: _____XXXXXX_____________________________
Uplink 5:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 8:
Optimal Phase: 5
Window Length: 36
Eye Window: ________________________XXXX____________
Uplink 9:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 10:
Optimal Phase: 8
Window Length: 34
Eye Window: __________________________XXXXXX________
Uplink 11:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 12:
Optimal Phase: 11
Window Length: 36
Eye Window: ______________________________XXXX______
Uplink 13:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 14:
Optimal Phase: 12
Window Length: 26
Eye Window: __________________________XXXXXXXXXXXXXX
Uplink 15:
Optimal Phase: 12
Window Length: 26
Eye Window: __________________________XXXXXXXXXXXXXX
]
10:41:18:setup_element:INFO: Beginning SMX ASICs map scan
10:41:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:41:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:41:18:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:41:18:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:41:18:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:41:18:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:41:18:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:41:18:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:41:18:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:41:18:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:41:18:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:41:18:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:41:18:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:41:19:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:41:19:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:41:19:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:41:19:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:41:19:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:41:19:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:41:19:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:41:19:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:41:20:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 68
Eye Windows:
Uplink 0: _________________________________________________________________________XXXXXXX
Uplink 1: _________________________________________________________________________XXXXXXX
Uplink 2: ____________________________________________________________________XXXXXXXX____
Uplink 3: ____________________________________________________________________XXXXXXXX____
Uplink 4: _______________________________________________________________________XXXXXXX__
Uplink 5: _______________________________________________________________________XXXXXXX__
Uplink 6: _______________________________________________________________________XXXXXXXX_
Uplink 7: _______________________________________________________________________XXXXXXXX_
Uplink 8: _____________________________________________________________________XXXXXXXX___
Uplink 9: _____________________________________________________________________XXXXXXXX___
Uplink 10: ______________________________________________________________________XXXXXXX___
Uplink 11: ______________________________________________________________________XXXXXXX___
Uplink 12: _______________________________________________________________________XXXXXXXXX
Uplink 13: _______________________________________________________________________XXXXXXXXX
Uplink 14: _______________________________________________________________________XXXXXXX__
Uplink 15: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 1:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 2:
Optimal Phase: 27
Window Length: 33
Eye Window: ____XXXXXXX_____________________________
Uplink 3:
Optimal Phase: 23
Window Length: 31
Eye Window: _XXXXXXX_______________________________X
Uplink 4:
Optimal Phase: 27
Window Length: 34
Eye Window: _____XXXXXX_____________________________
Uplink 5:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 8:
Optimal Phase: 5
Window Length: 36
Eye Window: ________________________XXXX____________
Uplink 9:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 10:
Optimal Phase: 8
Window Length: 34
Eye Window: __________________________XXXXXX________
Uplink 11:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 12:
Optimal Phase: 11
Window Length: 36
Eye Window: ______________________________XXXX______
Uplink 13:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 14:
Optimal Phase: 12
Window Length: 26
Eye Window: __________________________XXXXXXXXXXXXXX
Uplink 15:
Optimal Phase: 12
Window Length: 26
Eye Window: __________________________XXXXXXXXXXXXXX
10:41:20:setup_element:INFO: Performing Elink synchronization
10:41:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:41:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:41:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:41:21:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:41:21:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:41:21:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:41:21:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
10:41:21:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:41:22:febtest:INFO: 1-0 | XA-000-08-002-000-001-209-11 | 25.1 | 1236.2
10:41:22:febtest:INFO: 8-1 | XA-000-08-002-000-001-111-08 | 40.9 | 1159.7
10:41:22:febtest:INFO: 3-2 | XA-000-08-002-000-005-047-11 | 37.7 | 1177.4
10:41:22:febtest:INFO: 10-3 | XA-000-08-002-000-001-102-08 | 37.7 | 1183.3
10:41:23:febtest:INFO: 5-4 | XA-000-08-002-000-001-212-11 | 40.9 | 1177.4
10:41:23:febtest:INFO: 12-5 | XA-000-08-002-000-001-101-08 | 40.9 | 1165.6
10:41:23:febtest:INFO: 7-6 | XA-000-08-002-000-001-205-12 | 28.2 | 1224.5
10:41:23:febtest:INFO: 14-7 | XA-000-08-002-000-001-105-08 | 50.4 | 1147.8
10:41:23:ST3_smx:INFO: Configuring SMX FAST
10:41:25:ST3_smx:INFO: chip: 1-0 31.389742 C 1218.600960 mV
10:41:25:ST3_smx:INFO: Electrons
10:41:25:ST3_smx:INFO: # loops 0
10:41:27:ST3_smx:INFO: # loops 1
10:41:29:ST3_smx:INFO: # loops 2
10:41:30:ST3_smx:INFO: # loops 3
10:41:32:ST3_smx:INFO: # loops 4
10:41:34:ST3_smx:INFO: Total # of broken channels: 0
10:41:34:ST3_smx:INFO: List of broken channels: []
10:41:34:ST3_smx:INFO: Total # of broken channels: 0
10:41:34:ST3_smx:INFO: List of broken channels: []
10:41:34:ST3_smx:INFO: Configuring SMX FAST
10:41:36:ST3_smx:INFO: chip: 8-1 50.430383 C 1135.937260 mV
10:41:36:ST3_smx:INFO: Electrons
10:41:36:ST3_smx:INFO: # loops 0
10:41:38:ST3_smx:INFO: # loops 1
10:41:39:ST3_smx:INFO: # loops 2
10:41:41:ST3_smx:INFO: # loops 3
10:41:43:ST3_smx:INFO: # loops 4
10:41:44:ST3_smx:INFO: Total # of broken channels: 1
10:41:44:ST3_smx:INFO: List of broken channels: [47]
10:41:44:ST3_smx:INFO: Total # of broken channels: 1
10:41:44:ST3_smx:INFO: List of broken channels: [47]
10:41:45:ST3_smx:INFO: Configuring SMX FAST
10:41:47:ST3_smx:INFO: chip: 3-2 31.389742 C 1212.728715 mV
10:41:47:ST3_smx:INFO: Electrons
10:41:47:ST3_smx:INFO: # loops 0
10:41:48:ST3_smx:INFO: # loops 1
10:41:50:ST3_smx:INFO: # loops 2
10:41:52:ST3_smx:INFO: # loops 3
10:41:53:ST3_smx:INFO: # loops 4
10:41:55:ST3_smx:INFO: Total # of broken channels: 0
10:41:55:ST3_smx:INFO: List of broken channels: []
10:41:55:ST3_smx:INFO: Total # of broken channels: 0
10:41:55:ST3_smx:INFO: List of broken channels: []
10:41:55:ST3_smx:INFO: Configuring SMX FAST
10:41:57:ST3_smx:INFO: chip: 10-3 47.250730 C 1147.806000 mV
10:41:57:ST3_smx:INFO: Electrons
10:41:57:ST3_smx:INFO: # loops 0
10:41:59:ST3_smx:INFO: # loops 1
10:42:01:ST3_smx:INFO: # loops 2
10:42:02:ST3_smx:INFO: # loops 3
10:42:04:ST3_smx:INFO: # loops 4
10:42:05:ST3_smx:INFO: Total # of broken channels: 0
10:42:05:ST3_smx:INFO: List of broken channels: []
10:42:05:ST3_smx:INFO: Total # of broken channels: 2
10:42:05:ST3_smx:INFO: List of broken channels: [67, 127]
10:42:06:ST3_smx:INFO: Configuring SMX FAST
10:42:08:ST3_smx:INFO: chip: 5-4 47.250730 C 1165.571835 mV
10:42:08:ST3_smx:INFO: Electrons
10:42:08:ST3_smx:INFO: # loops 0
10:42:09:ST3_smx:INFO: # loops 1
10:42:11:ST3_smx:INFO: # loops 2
10:42:13:ST3_smx:INFO: # loops 3
10:42:14:ST3_smx:INFO: # loops 4
10:42:16:ST3_smx:INFO: Total # of broken channels: 0
10:42:16:ST3_smx:INFO: List of broken channels: []
10:42:16:ST3_smx:INFO: Total # of broken channels: 0
10:42:16:ST3_smx:INFO: List of broken channels: []
10:42:16:ST3_smx:INFO: Configuring SMX FAST
10:42:18:ST3_smx:INFO: chip: 12-5 44.073563 C 1159.654860 mV
10:42:18:ST3_smx:INFO: Electrons
10:42:18:ST3_smx:INFO: # loops 0
10:42:20:ST3_smx:INFO: # loops 1
10:42:22:ST3_smx:INFO: # loops 2
10:42:23:ST3_smx:INFO: # loops 3
10:42:25:ST3_smx:INFO: # loops 4
10:42:27:ST3_smx:INFO: Total # of broken channels: 1
10:42:27:ST3_smx:INFO: List of broken channels: [82]
10:42:27:ST3_smx:INFO: Total # of broken channels: 2
10:42:27:ST3_smx:INFO: List of broken channels: [78, 82]
10:42:27:ST3_smx:INFO: Configuring SMX FAST
10:42:29:ST3_smx:INFO: chip: 7-6 37.726682 C 1212.728715 mV
10:42:29:ST3_smx:INFO: Electrons
10:42:29:ST3_smx:INFO: # loops 0
10:42:31:ST3_smx:INFO: # loops 1
10:42:32:ST3_smx:INFO: # loops 2
10:42:34:ST3_smx:INFO: # loops 3
10:42:36:ST3_smx:INFO: # loops 4
10:42:37:ST3_smx:INFO: Total # of broken channels: 1
10:42:37:ST3_smx:INFO: List of broken channels: [28]
10:42:37:ST3_smx:INFO: Total # of broken channels: 1
10:42:37:ST3_smx:INFO: List of broken channels: [28]
10:42:38:ST3_smx:INFO: Configuring SMX FAST
10:42:40:ST3_smx:INFO: chip: 14-7 56.797143 C 1124.048640 mV
10:42:40:ST3_smx:INFO: Electrons
10:42:40:ST3_smx:INFO: # loops 0
10:42:41:ST3_smx:INFO: # loops 1
10:42:43:ST3_smx:INFO: # loops 2
10:42:45:ST3_smx:INFO: # loops 3
10:42:46:ST3_smx:INFO: # loops 4
10:42:48:ST3_smx:INFO: Total # of broken channels: 0
10:42:48:ST3_smx:INFO: List of broken channels: []
10:42:48:ST3_smx:INFO: Total # of broken channels: 0
10:42:48:ST3_smx:INFO: List of broken channels: []
10:42:48:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:42:49:febtest:INFO: 1-0 | XA-000-08-002-000-001-209-11 | 34.6 | 1218.6
10:42:49:febtest:INFO: 8-1 | XA-000-08-002-000-001-111-08 | 50.4 | 1135.9
10:42:49:febtest:INFO: 3-2 | XA-000-08-002-000-005-047-11 | 31.4 | 1212.7
10:42:49:febtest:INFO: 10-3 | XA-000-08-002-000-001-102-08 | 50.4 | 1147.8
10:42:49:febtest:INFO: 5-4 | XA-000-08-002-000-001-212-11 | 50.4 | 1165.6
10:42:50:febtest:INFO: 12-5 | XA-000-08-002-000-001-101-08 | 44.1 | 1159.7
10:42:50:febtest:INFO: 7-6 | XA-000-08-002-000-001-205-12 | 37.7 | 1212.7
10:42:50:febtest:INFO: 14-7 | XA-000-08-002-000-001-105-08 | 60.0 | 1124.0
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_01_11-10_40_16
OPERATOR : Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4UL201031 M4UL2T4010314B2 124 C
FEB_SN : 1065
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID: 11074
MODULE_NAME: L4UL201031 M4UL2T4010314B2 124 C
MODULE_TYPE:
MODULE_LADDER: L4UL201031
MODULE_MODULE: M4UL2T2010312B2
MODULE_SIZE: 42
MODULE_GRADE: A
---------------------------------------
VI_before_Init : ['2.450', '1.8720', '1.851', '0.3794', '7.000', '1.5490', '7.000', '1.5490']
VI_after__Init : ['2.450', '2.0140', '1.850', '0.6170', '7.000', '1.5490', '7.000', '1.5490']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
10:42:59:ST3_Shared:INFO: Listo of operators:Olga B.; Oleksandr S.;
10:43:00:ST3_Shared:INFO: Listo of operators:Olga B.;
10:43:04:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1065/TestDate_2024_01_11-10_40_16/