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FEB_1066 03.01.24 07:36:58
Info
07:36:42:ST3_hmp4040:INFO: HAMEG,HMP2030,017836163,HW50010002/SW2.30
07:36:44:ST3_Shared:INFO: Listo of operators:Oleksandr S.;
07:36:57:febtest:INFO: FEB 8-2 selected
07:36:57:smx_tester:INFO: Setting Elink clock mode to 160 MHz
07:36:58:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:36:58:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
07:36:58:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:37:14:ST3_ModuleSelector:INFO: L4UL201031 M4UL2B2010312A2 42 A
07:37:14:ST3_ModuleSelector:INFO: 25302
07:37:14:febtest:INFO: Testing FEB with SN 1066
07:37:15:smx_tester:INFO: Scanning setup
07:37:15:elinks:INFO: Disabling clock on downlink 0
07:37:15:elinks:INFO: Disabling clock on downlink 1
07:37:15:elinks:INFO: Disabling clock on downlink 2
07:37:15:elinks:INFO: Disabling clock on downlink 3
07:37:15:elinks:INFO: Disabling clock on downlink 4
07:37:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:37:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:37:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:37:16:elinks:INFO: Disabling clock on downlink 0
07:37:16:elinks:INFO: Disabling clock on downlink 1
07:37:16:elinks:INFO: Disabling clock on downlink 2
07:37:16:elinks:INFO: Disabling clock on downlink 3
07:37:16:elinks:INFO: Disabling clock on downlink 4
07:37:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:37:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:37:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
07:37:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
07:37:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
07:37:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
07:37:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
07:37:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
07:37:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
07:37:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
07:37:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
07:37:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
07:37:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
07:37:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
07:37:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
07:37:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
07:37:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
07:37:16:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
07:37:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:37:16:elinks:INFO: Disabling clock on downlink 0
07:37:16:elinks:INFO: Disabling clock on downlink 1
07:37:16:elinks:INFO: Disabling clock on downlink 2
07:37:16:elinks:INFO: Disabling clock on downlink 3
07:37:16:elinks:INFO: Disabling clock on downlink 4
07:37:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:37:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:37:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:37:16:elinks:INFO: Disabling clock on downlink 0
07:37:16:elinks:INFO: Disabling clock on downlink 1
07:37:16:elinks:INFO: Disabling clock on downlink 2
07:37:16:elinks:INFO: Disabling clock on downlink 3
07:37:16:elinks:INFO: Disabling clock on downlink 4
07:37:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:37:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:37:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:37:16:elinks:INFO: Disabling clock on downlink 0
07:37:16:elinks:INFO: Disabling clock on downlink 1
07:37:16:elinks:INFO: Disabling clock on downlink 2
07:37:16:elinks:INFO: Disabling clock on downlink 3
07:37:16:elinks:INFO: Disabling clock on downlink 4
07:37:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:37:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:37:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:37:16:setup_element:INFO: Scanning clock phase
07:37:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:37:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:37:17:setup_element:INFO: Clock phase scan results for group 0, downlink 1
07:37:17:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
07:37:17:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
07:37:17:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
07:37:17:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
07:37:17:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
07:37:17:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
07:37:17:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:37:17:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:37:17:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:37:17:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:37:17:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
07:37:17:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
07:37:17:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
07:37:17:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
07:37:17:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
07:37:17:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
07:37:17:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
07:37:17:setup_element:INFO: Scanning data phases
07:37:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:37:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:37:22:setup_element:INFO: Data phase scan results for group 0, downlink 1
07:37:22:setup_element:INFO: Eye window for uplink 0 : __________XXXXXX________________________
Data delay found: 32
07:37:22:setup_element:INFO: Eye window for uplink 1 : _______XXXXX____________________________
Data delay found: 29
07:37:22:setup_element:INFO: Eye window for uplink 2 : ______XXXXX_____________________________
Data delay found: 28
07:37:22:setup_element:INFO: Eye window for uplink 3 : ___XXXXXX_______________________________
Data delay found: 25
07:37:22:setup_element:INFO: Eye window for uplink 4 : ____XXXXX_______________________________
Data delay found: 26
07:37:22:setup_element:INFO: Eye window for uplink 5 : XXXXX__________________________________X
Data delay found: 21
07:37:22:setup_element:INFO: Eye window for uplink 6 : ____________________________________XXXX
Data delay found: 17
07:37:22:setup_element:INFO: Eye window for uplink 7 : ______________________________XXXXXX____
Data delay found: 12
07:37:23:setup_element:INFO: Eye window for uplink 8 : _______________________XXXXX_____XXXXXXX
Data delay found: 11
07:37:23:setup_element:INFO: Eye window for uplink 9 : ___________________________XXXXX_XXXXXXX
Data delay found: 13
07:37:23:setup_element:INFO: Eye window for uplink 10: __________________________XXXXXX________
Data delay found: 8
07:37:23:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXX_____
Data delay found: 12
07:37:23:setup_element:INFO: Eye window for uplink 12: ____________________________XXXX________
Data delay found: 9
07:37:23:setup_element:INFO: Eye window for uplink 13: _______________________________XXXX_____
Data delay found: 12
07:37:23:setup_element:INFO: Eye window for uplink 14: ____________________________XXXX________
Data delay found: 9
07:37:23:setup_element:INFO: Eye window for uplink 15: ______________________________XXXXX_____
Data delay found: 12
07:37:23:setup_element:INFO: Setting the data phase to 32 for uplink 0
07:37:23:setup_element:INFO: Setting the data phase to 29 for uplink 1
07:37:23:setup_element:INFO: Setting the data phase to 28 for uplink 2
07:37:23:setup_element:INFO: Setting the data phase to 25 for uplink 3
07:37:23:setup_element:INFO: Setting the data phase to 26 for uplink 4
07:37:23:setup_element:INFO: Setting the data phase to 21 for uplink 5
07:37:23:setup_element:INFO: Setting the data phase to 17 for uplink 6
07:37:23:setup_element:INFO: Setting the data phase to 12 for uplink 7
07:37:23:setup_element:INFO: Setting the data phase to 11 for uplink 8
07:37:23:setup_element:INFO: Setting the data phase to 13 for uplink 9
07:37:23:setup_element:INFO: Setting the data phase to 8 for uplink 10
07:37:23:setup_element:INFO: Setting the data phase to 12 for uplink 11
07:37:23:setup_element:INFO: Setting the data phase to 9 for uplink 12
07:37:23:setup_element:INFO: Setting the data phase to 12 for uplink 13
07:37:23:setup_element:INFO: Setting the data phase to 9 for uplink 14
07:37:23:setup_element:INFO: Setting the data phase to 12 for uplink 15
07:37:23:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 69
Eye Windows:
Uplink 0: _________________________________________________________________________XXXXXXX
Uplink 1: _________________________________________________________________________XXXXXXX
Uplink 2: ________________________________________________________________________XXXXXXXX
Uplink 3: ________________________________________________________________________XXXXXXXX
Uplink 4: ________________________________________________________________________XXXXXXX_
Uplink 5: ________________________________________________________________________XXXXXXX_
Uplink 6: ________________________________________________________________________XXXXXX__
Uplink 7: ________________________________________________________________________XXXXXX__
Uplink 8: _____________________________________________________________________XXXXXXXX___
Uplink 9: _____________________________________________________________________XXXXXXXX___
Uplink 10: ______________________________________________________________________XXXXXXXXX_
Uplink 11: ______________________________________________________________________XXXXXXXXX_
Uplink 12: _______________________________________________________________________XXXXXXX__
Uplink 13: _______________________________________________________________________XXXXXXX__
Uplink 14: _______________________________________________________________________XXXXXXXX_
Uplink 15: _______________________________________________________________________XXXXXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 1:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 2:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 3:
Optimal Phase: 25
Window Length: 34
Eye Window: ___XXXXXX_______________________________
Uplink 4:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 5:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 6:
Optimal Phase: 17
Window Length: 36
Eye Window: ____________________________________XXXX
Uplink 7:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 8:
Optimal Phase: 11
Window Length: 23
Eye Window: _______________________XXXXX_____XXXXXXX
Uplink 9:
Optimal Phase: 13
Window Length: 27
Eye Window: ___________________________XXXXX_XXXXXXX
Uplink 10:
Optimal Phase: 8
Window Length: 34
Eye Window: __________________________XXXXXX________
Uplink 11:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 12:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 13:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 14:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 15:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
]
07:37:23:setup_element:INFO: Beginning SMX ASICs map scan
07:37:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:37:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:37:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:37:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:37:23:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:37:23:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
07:37:23:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
07:37:23:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
07:37:23:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
07:37:23:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
07:37:23:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
07:37:23:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
07:37:23:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
07:37:23:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
07:37:23:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
07:37:24:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
07:37:24:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
07:37:24:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
07:37:24:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
07:37:24:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
07:37:24:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
07:37:25:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 69
Eye Windows:
Uplink 0: _________________________________________________________________________XXXXXXX
Uplink 1: _________________________________________________________________________XXXXXXX
Uplink 2: ________________________________________________________________________XXXXXXXX
Uplink 3: ________________________________________________________________________XXXXXXXX
Uplink 4: ________________________________________________________________________XXXXXXX_
Uplink 5: ________________________________________________________________________XXXXXXX_
Uplink 6: ________________________________________________________________________XXXXXX__
Uplink 7: ________________________________________________________________________XXXXXX__
Uplink 8: _____________________________________________________________________XXXXXXXX___
Uplink 9: _____________________________________________________________________XXXXXXXX___
Uplink 10: ______________________________________________________________________XXXXXXXXX_
Uplink 11: ______________________________________________________________________XXXXXXXXX_
Uplink 12: _______________________________________________________________________XXXXXXX__
Uplink 13: _______________________________________________________________________XXXXXXX__
Uplink 14: _______________________________________________________________________XXXXXXXX_
Uplink 15: _______________________________________________________________________XXXXXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 1:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 2:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 3:
Optimal Phase: 25
Window Length: 34
Eye Window: ___XXXXXX_______________________________
Uplink 4:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 5:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 6:
Optimal Phase: 17
Window Length: 36
Eye Window: ____________________________________XXXX
Uplink 7:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 8:
Optimal Phase: 11
Window Length: 23
Eye Window: _______________________XXXXX_____XXXXXXX
Uplink 9:
Optimal Phase: 13
Window Length: 27
Eye Window: ___________________________XXXXX_XXXXXXX
Uplink 10:
Optimal Phase: 8
Window Length: 34
Eye Window: __________________________XXXXXX________
Uplink 11:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 12:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 13:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 14:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 15:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
07:37:25:setup_element:INFO: Performing Elink synchronization
07:37:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:37:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:37:25:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:37:25:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:37:25:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
07:37:25:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:37:26:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
07:37:27:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
07:37:27:febtest:INFO: 1-0 | XA-000-08-002-000-001-139-09 | 47.3 | 1147.8
07:37:27:febtest:INFO: 8-1 | XA-000-08-002-000-001-064-06 | 28.2 | 1212.7
07:37:27:febtest:INFO: 3-2 | XA-000-08-002-000-001-115-15 | 37.7 | 1171.5
07:37:28:febtest:INFO: 10-3 | XA-000-08-002-000-001-049-10 | 50.4 | 1141.9
07:37:28:febtest:INFO: 5-4 | XA-000-08-002-000-001-078-06 | 44.1 | 1165.6
07:37:28:febtest:INFO: 12-5 | XA-000-08-002-000-001-054-10 | 28.2 | 1218.6
07:37:28:febtest:INFO: 7-6 | XA-000-08-002-000-001-065-06 | 47.3 | 1153.7
07:37:29:febtest:INFO: 14-7 | XA-000-08-002-000-001-048-10 | 34.6 | 1201.0
07:37:29:ST3_smx:INFO: Configuring SMX FAST
07:37:31:ST3_smx:INFO: chip: 1-0 40.898880 C 1159.654860 mV
07:37:31:ST3_smx:INFO: Electrons
07:37:31:ST3_smx:INFO: # loops 0
07:37:33:ST3_smx:INFO: # loops 1
07:37:34:ST3_smx:INFO: # loops 2
07:37:36:ST3_smx:INFO: # loops 3
07:37:37:ST3_smx:INFO: # loops 4
07:37:39:ST3_smx:INFO: Total # of broken channels: 0
07:37:39:ST3_smx:INFO: List of broken channels: []
07:37:39:ST3_smx:INFO: Total # of broken channels: 1
07:37:39:ST3_smx:INFO: List of broken channels: [127]
07:37:40:ST3_smx:INFO: Configuring SMX FAST
07:37:41:ST3_smx:INFO: chip: 8-1 28.225000 C 1212.728715 mV
07:37:41:ST3_smx:INFO: Electrons
07:37:41:ST3_smx:INFO: # loops 0
07:37:43:ST3_smx:INFO: # loops 1
07:37:45:ST3_smx:INFO: # loops 2
07:37:46:ST3_smx:INFO: # loops 3
07:37:48:ST3_smx:INFO: # loops 4
07:37:50:ST3_smx:INFO: Total # of broken channels: 0
07:37:50:ST3_smx:INFO: List of broken channels: []
07:37:50:ST3_smx:INFO: Total # of broken channels: 0
07:37:50:ST3_smx:INFO: List of broken channels: []
07:37:50:ST3_smx:INFO: Configuring SMX FAST
07:37:52:ST3_smx:INFO: chip: 3-2 34.556970 C 1189.190035 mV
07:37:52:ST3_smx:INFO: Electrons
07:37:52:ST3_smx:INFO: # loops 0
07:37:53:ST3_smx:INFO: # loops 1
07:37:55:ST3_smx:INFO: # loops 2
07:37:56:ST3_smx:INFO: # loops 3
07:37:58:ST3_smx:INFO: # loops 4
07:37:59:ST3_smx:INFO: Total # of broken channels: 0
07:37:59:ST3_smx:INFO: List of broken channels: []
07:38:00:ST3_smx:INFO: Total # of broken channels: 0
07:38:00:ST3_smx:INFO: List of broken channels: []
07:38:00:ST3_smx:INFO: Configuring SMX FAST
07:38:02:ST3_smx:INFO: chip: 10-3 50.430383 C 1147.806000 mV
07:38:02:ST3_smx:INFO: Electrons
07:38:02:ST3_smx:INFO: # loops 0
07:38:04:ST3_smx:INFO: # loops 1
07:38:05:ST3_smx:INFO: # loops 2
07:38:07:ST3_smx:INFO: # loops 3
07:38:08:ST3_smx:INFO: # loops 4
07:38:10:ST3_smx:INFO: Total # of broken channels: 0
07:38:10:ST3_smx:INFO: List of broken channels: []
07:38:10:ST3_smx:INFO: Total # of broken channels: 0
07:38:10:ST3_smx:INFO: List of broken channels: []
07:38:10:ST3_smx:INFO: Configuring SMX FAST
07:38:12:ST3_smx:INFO: chip: 5-4 47.250730 C 1159.654860 mV
07:38:12:ST3_smx:INFO: Electrons
07:38:12:ST3_smx:INFO: # loops 0
07:38:13:ST3_smx:INFO: # loops 1
07:38:15:ST3_smx:INFO: # loops 2
07:38:16:ST3_smx:INFO: # loops 3
07:38:18:ST3_smx:INFO: # loops 4
07:38:19:ST3_smx:INFO: Total # of broken channels: 0
07:38:19:ST3_smx:INFO: List of broken channels: []
07:38:19:ST3_smx:INFO: Total # of broken channels: 1
07:38:19:ST3_smx:INFO: List of broken channels: [38]
07:38:20:ST3_smx:INFO: Configuring SMX FAST
07:38:22:ST3_smx:INFO: chip: 12-5 37.726682 C 1189.190035 mV
07:38:22:ST3_smx:INFO: Electrons
07:38:22:ST3_smx:INFO: # loops 0
07:38:23:ST3_smx:INFO: # loops 1
07:38:25:ST3_smx:INFO: # loops 2
07:38:26:ST3_smx:INFO: # loops 3
07:38:28:ST3_smx:INFO: # loops 4
07:38:29:ST3_smx:INFO: Total # of broken channels: 0
07:38:29:ST3_smx:INFO: List of broken channels: []
07:38:29:ST3_smx:INFO: Total # of broken channels: 0
07:38:29:ST3_smx:INFO: List of broken channels: []
07:38:30:ST3_smx:INFO: Configuring SMX FAST
07:38:32:ST3_smx:INFO: chip: 7-6 56.797143 C 1135.937260 mV
07:38:32:ST3_smx:INFO: Electrons
07:38:32:ST3_smx:INFO: # loops 0
07:38:33:ST3_smx:INFO: # loops 1
07:38:35:ST3_smx:INFO: # loops 2
07:38:36:ST3_smx:INFO: # loops 3
07:38:38:ST3_smx:INFO: # loops 4
07:38:39:ST3_smx:INFO: Total # of broken channels: 0
07:38:39:ST3_smx:INFO: List of broken channels: []
07:38:39:ST3_smx:INFO: Total # of broken channels: 0
07:38:39:ST3_smx:INFO: List of broken channels: []
07:38:39:ST3_smx:INFO: Configuring SMX FAST
07:38:41:ST3_smx:INFO: chip: 14-7 40.898880 C 1200.969315 mV
07:38:41:ST3_smx:INFO: Electrons
07:38:41:ST3_smx:INFO: # loops 0
07:38:43:ST3_smx:INFO: # loops 1
07:38:45:ST3_smx:INFO: # loops 2
07:38:46:ST3_smx:INFO: # loops 3
07:38:48:ST3_smx:INFO: # loops 4
07:38:49:ST3_smx:INFO: Total # of broken channels: 0
07:38:49:ST3_smx:INFO: List of broken channels: []
07:38:49:ST3_smx:INFO: Total # of broken channels: 0
07:38:49:ST3_smx:INFO: List of broken channels: []
07:38:50:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
07:38:50:febtest:INFO: 1-0 | XA-000-08-002-000-001-139-09 | 44.1 | 1159.7
07:38:50:febtest:INFO: 8-1 | XA-000-08-002-000-001-064-06 | 28.2 | 1212.7
07:38:50:febtest:INFO: 3-2 | XA-000-08-002-000-001-115-15 | 37.7 | 1189.2
07:38:51:febtest:INFO: 10-3 | XA-000-08-002-000-001-049-10 | 50.4 | 1147.8
07:38:51:febtest:INFO: 5-4 | XA-000-08-002-000-001-078-06 | 47.3 | 1165.6
07:38:51:febtest:INFO: 12-5 | XA-000-08-002-000-001-054-10 | 40.9 | 1189.2
07:38:51:febtest:INFO: 7-6 | XA-000-08-002-000-001-065-06 | 56.8 | 1135.9
07:38:52:febtest:INFO: 14-7 | XA-000-08-002-000-001-048-10 | 40.9 | 1201.0
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_01_03-07_36_58
OPERATOR : Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4UL201031 M4UL2B2010312A2 42 A
FEB_SN : 1066
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID: 25302
MODULE_NAME: L4UL201031 M4UL2B2010312A2 42 A
MODULE_TYPE:
MODULE_LADDER: L4UL201031
MODULE_MODULE: M4UL2B2010312A2
MODULE_SIZE: 42
MODULE_GRADE: A
---------------------------------------
VI_before_Init : ['2.450', '1.9400', '1.850', '0.4384', '7.000', '1.5310', '7.000', '1.5310']
VI_after__Init : ['2.450', '2.0190', '1.850', '0.6086', '7.000', '1.5350', '7.000', '1.5350']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
07:39:01:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1066/TestDate_2024_01_03-07_36_58/