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FEB_1070 01.02.24 11:06:43
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11:06:04:ST3_hmp4040:INFO: ROHDE&SCHWARZ,HMP4040,123796,HW50020003/SW2.71
11:06:09:febtest:INFO: FEB 8-2 selected
11:06:09:smx_tester:INFO: Setting Elink clock mode to 160 MHz
11:06:20:ST3_Shared:INFO: Listo of operators:Robert V.;
11:06:20:ST3_Shared:INFO: Listo of operators:Oleksandr S.; Robert V.;
11:06:21:ST3_Shared:INFO: Listo of operators:Oleksandr S.; Robert V.; Irakli K.;
11:06:24:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:06:24:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
11:06:24:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:06:25:febtest:INFO: Testing FEB with SN 1070
11:06:43:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:06:43:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
11:06:43:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:06:44:febtest:INFO: Testing FEB with SN 1070
11:06:46:smx_tester:INFO: Scanning setup
11:06:46:elinks:INFO: Disabling clock on downlink 0
11:06:46:elinks:INFO: Disabling clock on downlink 1
11:06:46:elinks:INFO: Disabling clock on downlink 2
11:06:46:elinks:INFO: Disabling clock on downlink 3
11:06:46:elinks:INFO: Disabling clock on downlink 4
11:06:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:06:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:06:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:06:46:elinks:INFO: Disabling clock on downlink 0
11:06:46:elinks:INFO: Disabling clock on downlink 1
11:06:46:elinks:INFO: Disabling clock on downlink 2
11:06:46:elinks:INFO: Disabling clock on downlink 3
11:06:46:elinks:INFO: Disabling clock on downlink 4
11:06:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:06:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:06:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
11:06:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
11:06:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
11:06:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
11:06:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
11:06:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
11:06:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
11:06:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
11:06:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:06:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:06:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:06:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:06:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:06:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:06:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:06:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:06:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:06:46:elinks:INFO: Disabling clock on downlink 0
11:06:46:elinks:INFO: Disabling clock on downlink 1
11:06:46:elinks:INFO: Disabling clock on downlink 2
11:06:46:elinks:INFO: Disabling clock on downlink 3
11:06:46:elinks:INFO: Disabling clock on downlink 4
11:06:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:06:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:06:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:06:46:elinks:INFO: Disabling clock on downlink 0
11:06:46:elinks:INFO: Disabling clock on downlink 1
11:06:46:elinks:INFO: Disabling clock on downlink 2
11:06:46:elinks:INFO: Disabling clock on downlink 3
11:06:46:elinks:INFO: Disabling clock on downlink 4
11:06:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:06:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:06:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:06:46:elinks:INFO: Disabling clock on downlink 0
11:06:46:elinks:INFO: Disabling clock on downlink 1
11:06:46:elinks:INFO: Disabling clock on downlink 2
11:06:46:elinks:INFO: Disabling clock on downlink 3
11:06:46:elinks:INFO: Disabling clock on downlink 4
11:06:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:06:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:06:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:06:46:setup_element:INFO: Scanning clock phase
11:06:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:06:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:06:47:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:06:47:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:06:47:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:06:47:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:06:47:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:06:47:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:06:47:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:06:47:setup_element:INFO: Eye window for uplink 6 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:06:47:setup_element:INFO: Eye window for uplink 7 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:06:47:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:06:47:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:06:47:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:06:47:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:06:47:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:06:47:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:06:47:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:06:47:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:06:47:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
11:06:47:setup_element:INFO: Scanning data phases
11:06:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:06:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:06:53:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:06:53:setup_element:INFO: Eye window for uplink 0 : ____________XXXXX_______________________
Data delay found: 34
11:06:53:setup_element:INFO: Eye window for uplink 1 : ________XXXXX___________________________
Data delay found: 30
11:06:53:setup_element:INFO: Eye window for uplink 2 : ________XXXXX___________________________
Data delay found: 30
11:06:53:setup_element:INFO: Eye window for uplink 3 : _____XXXXX______________________________
Data delay found: 27
11:06:53:setup_element:INFO: Eye window for uplink 4 : _____XXXXX______________________________
Data delay found: 27
11:06:53:setup_element:INFO: Eye window for uplink 5 : __XXXX__________________________________
Data delay found: 23
11:06:53:setup_element:INFO: Eye window for uplink 6 : XXXXX__________________________________X
Data delay found: 21
11:06:53:setup_element:INFO: Eye window for uplink 7 : X__________________________________XXXXX
Data delay found: 17
11:06:53:setup_element:INFO: Eye window for uplink 8 : __________________________XXXX__________
Data delay found: 7
11:06:53:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXXX____
Data delay found: 12
11:06:53:setup_element:INFO: Eye window for uplink 10: __________________________XXXXX_________
Data delay found: 8
11:06:53:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXX_____
Data delay found: 12
11:06:53:setup_element:INFO: Eye window for uplink 12: ____________________________XXXX________
Data delay found: 9
11:06:53:setup_element:INFO: Eye window for uplink 13: ______________________________XXXXX_____
Data delay found: 12
11:06:53:setup_element:INFO: Eye window for uplink 14: ____________________________XXXXX_______
Data delay found: 10
11:06:53:setup_element:INFO: Eye window for uplink 15: _____________________________XXXXXX_____
Data delay found: 11
11:06:53:setup_element:INFO: Setting the data phase to 34 for uplink 0
11:06:53:setup_element:INFO: Setting the data phase to 30 for uplink 1
11:06:53:setup_element:INFO: Setting the data phase to 30 for uplink 2
11:06:53:setup_element:INFO: Setting the data phase to 27 for uplink 3
11:06:53:setup_element:INFO: Setting the data phase to 27 for uplink 4
11:06:53:setup_element:INFO: Setting the data phase to 23 for uplink 5
11:06:53:setup_element:INFO: Setting the data phase to 21 for uplink 6
11:06:53:setup_element:INFO: Setting the data phase to 17 for uplink 7
11:06:53:setup_element:INFO: Setting the data phase to 7 for uplink 8
11:06:53:setup_element:INFO: Setting the data phase to 12 for uplink 9
11:06:53:setup_element:INFO: Setting the data phase to 8 for uplink 10
11:06:53:setup_element:INFO: Setting the data phase to 12 for uplink 11
11:06:53:setup_element:INFO: Setting the data phase to 9 for uplink 12
11:06:53:setup_element:INFO: Setting the data phase to 12 for uplink 13
11:06:53:setup_element:INFO: Setting the data phase to 10 for uplink 14
11:06:53:setup_element:INFO: Setting the data phase to 11 for uplink 15
11:06:53:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 71
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXX__
Uplink 1: ________________________________________________________________________XXXXXX__
Uplink 2: _______________________________________________________________________XXXXXXXX_
Uplink 3: _______________________________________________________________________XXXXXXXX_
Uplink 4: _______________________________________________________________________XXXXXXXX_
Uplink 5: _______________________________________________________________________XXXXXXXX_
Uplink 6: _________________________________________________________________________XXXXXX_
Uplink 7: _________________________________________________________________________XXXXXX_
Uplink 8: ______________________________________________________________________XXXXXXX___
Uplink 9: ______________________________________________________________________XXXXXXX___
Uplink 10: ______________________________________________________________________XXXXXXXX__
Uplink 11: ______________________________________________________________________XXXXXXXX__
Uplink 12: ______________________________________________________________________XXXXXXXX__
Uplink 13: ______________________________________________________________________XXXXXXXX__
Uplink 14: _______________________________________________________________________XXXXXXX__
Uplink 15: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 1:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 2:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 3:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 4:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 5:
Optimal Phase: 23
Window Length: 36
Eye Window: __XXXX__________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 8:
Optimal Phase: 7
Window Length: 36
Eye Window: __________________________XXXX__________
Uplink 9:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 10:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 11:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 12:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 13:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 14:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 15:
Optimal Phase: 11
Window Length: 34
Eye Window: _____________________________XXXXXX_____
]
11:06:53:setup_element:INFO: Beginning SMX ASICs map scan
11:06:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:06:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:06:53:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:06:53:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:06:53:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:06:53:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:06:53:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:06:53:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:06:53:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:06:53:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:06:53:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:06:53:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:06:53:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:06:54:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:06:54:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:06:54:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:06:54:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:06:54:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:06:54:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:06:54:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:06:54:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:06:56:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 71
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXX__
Uplink 1: ________________________________________________________________________XXXXXX__
Uplink 2: _______________________________________________________________________XXXXXXXX_
Uplink 3: _______________________________________________________________________XXXXXXXX_
Uplink 4: _______________________________________________________________________XXXXXXXX_
Uplink 5: _______________________________________________________________________XXXXXXXX_
Uplink 6: _________________________________________________________________________XXXXXX_
Uplink 7: _________________________________________________________________________XXXXXX_
Uplink 8: ______________________________________________________________________XXXXXXX___
Uplink 9: ______________________________________________________________________XXXXXXX___
Uplink 10: ______________________________________________________________________XXXXXXXX__
Uplink 11: ______________________________________________________________________XXXXXXXX__
Uplink 12: ______________________________________________________________________XXXXXXXX__
Uplink 13: ______________________________________________________________________XXXXXXXX__
Uplink 14: _______________________________________________________________________XXXXXXX__
Uplink 15: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 0:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 1:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 2:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 3:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 4:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 5:
Optimal Phase: 23
Window Length: 36
Eye Window: __XXXX__________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 7:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 8:
Optimal Phase: 7
Window Length: 36
Eye Window: __________________________XXXX__________
Uplink 9:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 10:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 11:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 12:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 13:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 14:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 15:
Optimal Phase: 11
Window Length: 34
Eye Window: _____________________________XXXXXX_____
11:06:56:setup_element:INFO: Performing Elink synchronization
11:06:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:06:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:06:56:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:06:56:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:06:56:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:06:56:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:06:56:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
11:06:57:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
11:06:58:febtest:INFO: 1-0 | XA-000-08-002-000-002-161-09 | 25.1 | 1230.3
11:06:58:febtest:INFO: 8-1 | XA-000-08-002-000-002-165-09 | 25.1 | 1224.5
11:06:58:febtest:INFO: 3-2 | XA-000-08-002-000-002-156-00 | 34.6 | 1201.0
11:06:58:febtest:INFO: 10-3 | XA-000-08-002-000-002-159-00 | 34.6 | 1206.9
11:06:58:febtest:INFO: 5-4 | XA-000-08-002-000-002-160-09 | 31.4 | 1212.7
11:06:59:febtest:INFO: 12-5 | XA-000-08-002-000-003-038-14 | 34.6 | 1201.0
11:06:59:febtest:INFO: 7-6 | XA-000-08-002-000-006-249-13 | 37.7 | 1183.3
11:06:59:febtest:INFO: 14-7 | XA-000-08-002-000-003-036-14 | 40.9 | 1171.5
11:06:59:ST3_smx:INFO: Configuring SMX FAST
11:07:01:ST3_smx:INFO: chip: 1-0 34.556970 C 1200.969315 mV
11:07:01:ST3_smx:INFO: Electrons
11:07:01:ST3_smx:INFO: # loops 0
11:07:03:ST3_smx:INFO: # loops 1
11:07:05:ST3_smx:INFO: # loops 2
11:07:06:ST3_smx:INFO: # loops 3
11:07:08:ST3_smx:INFO: # loops 4
11:07:10:ST3_smx:INFO: Total # of broken channels: 0
11:07:10:ST3_smx:INFO: List of broken channels: []
11:07:10:ST3_smx:INFO: Total # of broken channels: 0
11:07:10:ST3_smx:INFO: List of broken channels: []
11:07:11:ST3_smx:INFO: Configuring SMX FAST
11:07:13:ST3_smx:INFO: chip: 8-1 25.062742 C 1230.330540 mV
11:07:13:ST3_smx:INFO: Electrons
11:07:13:ST3_smx:INFO: # loops 0
11:07:15:ST3_smx:INFO: # loops 1
11:07:16:ST3_smx:INFO: # loops 2
11:07:18:ST3_smx:INFO: # loops 3
11:07:20:ST3_smx:INFO: # loops 4
11:07:21:ST3_smx:INFO: Total # of broken channels: 0
11:07:21:ST3_smx:INFO: List of broken channels: []
11:07:21:ST3_smx:INFO: Total # of broken channels: 0
11:07:21:ST3_smx:INFO: List of broken channels: []
11:07:22:ST3_smx:INFO: Configuring SMX FAST
11:07:24:ST3_smx:INFO: chip: 3-2 28.225000 C 1224.468235 mV
11:07:24:ST3_smx:INFO: Electrons
11:07:24:ST3_smx:INFO: # loops 0
11:07:26:ST3_smx:INFO: # loops 1
11:07:28:ST3_smx:INFO: # loops 2
11:07:30:ST3_smx:INFO: # loops 3
11:07:32:ST3_smx:INFO: # loops 4
11:07:33:ST3_smx:INFO: Total # of broken channels: 0
11:07:33:ST3_smx:INFO: List of broken channels: []
11:07:33:ST3_smx:INFO: Total # of broken channels: 0
11:07:33:ST3_smx:INFO: List of broken channels: []
11:07:34:ST3_smx:INFO: Configuring SMX FAST
11:07:37:ST3_smx:INFO: chip: 10-3 31.389742 C 1218.600960 mV
11:07:37:ST3_smx:INFO: Electrons
11:07:37:ST3_smx:INFO: # loops 0
11:07:38:ST3_smx:INFO: # loops 1
11:07:40:ST3_smx:INFO: # loops 2
11:07:42:ST3_smx:INFO: # loops 3
11:07:44:ST3_smx:INFO: # loops 4
11:07:46:ST3_smx:INFO: Total # of broken channels: 2
11:07:46:ST3_smx:INFO: List of broken channels: [113, 119]
11:07:46:ST3_smx:INFO: Total # of broken channels: 2
11:07:46:ST3_smx:INFO: List of broken channels: [113, 119]
11:07:47:ST3_smx:INFO: Configuring SMX FAST
11:07:49:ST3_smx:INFO: chip: 5-4 34.556970 C 1206.851500 mV
11:07:49:ST3_smx:INFO: Electrons
11:07:49:ST3_smx:INFO: # loops 0
11:07:51:ST3_smx:INFO: # loops 1
11:07:53:ST3_smx:INFO: # loops 2
11:07:55:ST3_smx:INFO: # loops 3
11:07:56:ST3_smx:INFO: # loops 4
11:07:58:ST3_smx:INFO: Total # of broken channels: 0
11:07:58:ST3_smx:INFO: List of broken channels: []
11:07:58:ST3_smx:INFO: Total # of broken channels: 0
11:07:58:ST3_smx:INFO: List of broken channels: []
11:07:59:ST3_smx:INFO: Configuring SMX FAST
11:08:01:ST3_smx:INFO: chip: 12-5 34.556970 C 1200.969315 mV
11:08:01:ST3_smx:INFO: Electrons
11:08:01:ST3_smx:INFO: # loops 0
11:08:03:ST3_smx:INFO: # loops 1
11:08:04:ST3_smx:INFO: # loops 2
11:08:06:ST3_smx:INFO: # loops 3
11:08:08:ST3_smx:INFO: # loops 4
11:08:09:ST3_smx:INFO: Total # of broken channels: 0
11:08:09:ST3_smx:INFO: List of broken channels: []
11:08:09:ST3_smx:INFO: Total # of broken channels: 0
11:08:09:ST3_smx:INFO: List of broken channels: []
11:08:10:ST3_smx:INFO: Configuring SMX FAST
11:08:12:ST3_smx:INFO: chip: 7-6 47.250730 C 1165.571835 mV
11:08:12:ST3_smx:INFO: Electrons
11:08:12:ST3_smx:INFO: # loops 0
11:08:14:ST3_smx:INFO: # loops 1
11:08:16:ST3_smx:INFO: # loops 2
11:08:17:ST3_smx:INFO: # loops 3
11:08:19:ST3_smx:INFO: # loops 4
11:08:20:ST3_smx:INFO: Total # of broken channels: 0
11:08:20:ST3_smx:INFO: List of broken channels: []
11:08:20:ST3_smx:INFO: Total # of broken channels: 0
11:08:20:ST3_smx:INFO: List of broken channels: []
11:08:21:ST3_smx:INFO: Configuring SMX FAST
11:08:23:ST3_smx:INFO: chip: 14-7 40.898880 C 1177.390875 mV
11:08:23:ST3_smx:INFO: Electrons
11:08:23:ST3_smx:INFO: # loops 0
11:08:25:ST3_smx:INFO: # loops 1
11:08:27:ST3_smx:INFO: # loops 2
11:08:28:ST3_smx:INFO: # loops 3
11:08:30:ST3_smx:INFO: # loops 4
11:08:32:ST3_smx:INFO: Total # of broken channels: 0
11:08:32:ST3_smx:INFO: List of broken channels: []
11:08:32:ST3_smx:INFO: Total # of broken channels: 0
11:08:32:ST3_smx:INFO: List of broken channels: []
11:08:33:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
11:08:33:febtest:INFO: 1-0 | XA-000-08-002-000-002-161-09 | 34.6 | 1201.0
11:08:33:febtest:INFO: 8-1 | XA-000-08-002-000-002-165-09 | 25.1 | 1230.3
11:08:33:febtest:INFO: 3-2 | XA-000-08-002-000-002-156-00 | 31.4 | 1224.5
11:08:34:febtest:INFO: 10-3 | XA-000-08-002-000-002-159-00 | 31.4 | 1212.7
11:08:34:febtest:INFO: 5-4 | XA-000-08-002-000-002-160-09 | 34.6 | 1206.9
11:08:34:febtest:INFO: 12-5 | XA-000-08-002-000-003-038-14 | 34.6 | 1201.0
11:08:34:febtest:INFO: 7-6 | XA-000-08-002-000-006-249-13 | 44.1 | 1159.7
11:08:35:febtest:INFO: 14-7 | XA-000-08-002-000-003-036-14 | 40.9 | 1177.4
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_02_01-11_06_43
OPERATOR : Oleksandr S.; Robert V.; Irakli K.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 1070
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.450', '1.9340', '1.850', '2.9490', '2.450', '0.0001', '1.850', '0.0001']
VI_after__Init : ['0', '0', '0', '0', '0', '0']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
11:08:42:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1070/TestDate_2024_02_01-11_06_43/