
FEB_1072 14.12.23 09:15:25
TextEdit.txt
09:13:00:ST3_hmp4040:INFO: HAMEG,HMP2030,017836163,HW50010002/SW2.30 09:14:59:febtest:INFO: FEB 8-2 selected 09:14:59:smx_tester:INFO: Setting Elink clock mode to 160 MHz 09:15:06:ST3_Shared:INFO: Listo of operators:Kerstin S.; 09:15:25:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:15:25:ST3_Shared:INFO: -------------------------FEB-Sensor------------------------- 09:15:25:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:17:09:ST3_ModuleSelector:INFO: L6DL200120 M6DL2T4001204A2 124 C 09:17:09:ST3_ModuleSelector:INFO: 09:17:09:febtest:INFO: Testing FEB with SN 1072 09:17:11:smx_tester:INFO: Scanning setup 09:17:11:elinks:INFO: Disabling clock on downlink 0 09:17:11:elinks:INFO: Disabling clock on downlink 1 09:17:11:elinks:INFO: Disabling clock on downlink 2 09:17:11:elinks:INFO: Disabling clock on downlink 3 09:17:11:elinks:INFO: Disabling clock on downlink 4 09:17:11:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:17:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:17:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:17:11:elinks:INFO: Disabling clock on downlink 0 09:17:11:elinks:INFO: Disabling clock on downlink 1 09:17:11:elinks:INFO: Disabling clock on downlink 2 09:17:11:elinks:INFO: Disabling clock on downlink 3 09:17:11:elinks:INFO: Disabling clock on downlink 4 09:17:11:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:17:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:17:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 09:17:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 09:17:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 09:17:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 09:17:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 09:17:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 09:17:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 09:17:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 09:17:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 09:17:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 09:17:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 09:17:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 09:17:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 09:17:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 09:17:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 09:17:11:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 09:17:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:17:11:elinks:INFO: Disabling clock on downlink 0 09:17:11:elinks:INFO: Disabling clock on downlink 1 09:17:11:elinks:INFO: Disabling clock on downlink 2 09:17:11:elinks:INFO: Disabling clock on downlink 3 09:17:11:elinks:INFO: Disabling clock on downlink 4 09:17:11:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:17:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:17:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:17:11:elinks:INFO: Disabling clock on downlink 0 09:17:11:elinks:INFO: Disabling clock on downlink 1 09:17:11:elinks:INFO: Disabling clock on downlink 2 09:17:11:elinks:INFO: Disabling clock on downlink 3 09:17:11:elinks:INFO: Disabling clock on downlink 4 09:17:11:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:17:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:17:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:17:11:elinks:INFO: Disabling clock on downlink 0 09:17:11:elinks:INFO: Disabling clock on downlink 1 09:17:11:elinks:INFO: Disabling clock on downlink 2 09:17:11:elinks:INFO: Disabling clock on downlink 3 09:17:11:elinks:INFO: Disabling clock on downlink 4 09:17:11:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:17:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:17:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:17:11:setup_element:INFO: Scanning clock phase 09:17:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:17:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:17:12:setup_element:INFO: Clock phase scan results for group 0, downlink 1 09:17:12:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________________XXXXXXX Clock Delay: 36 09:17:12:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________________XXXXXXX Clock Delay: 36 09:17:12:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXX_ Clock Delay: 35 09:17:12:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXX_ Clock Delay: 35 09:17:12:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXXXXX Clock Delay: 35 09:17:12:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXXXXX Clock Delay: 35 09:17:12:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXXX_ Clock Delay: 35 09:17:12:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXXX_ Clock Delay: 35 09:17:12:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 09:17:12:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 09:17:12:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 09:17:12:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 09:17:12:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXXXXX Clock Delay: 35 09:17:12:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXXXXX Clock Delay: 35 09:17:12:setup_element:INFO: Eye window for uplink 14: X_______________________________________________________________________XXXXXXXX Clock Delay: 36 09:17:12:setup_element:INFO: Eye window for uplink 15: X_______________________________________________________________________XXXXXXXX Clock Delay: 36 09:17:12:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1 09:17:12:setup_element:INFO: Scanning data phases 09:17:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:17:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:17:17:setup_element:INFO: Data phase scan results for group 0, downlink 1 09:17:17:setup_element:INFO: Eye window for uplink 0 : _________XXXXXX_________________________ Data delay found: 31 09:17:17:setup_element:INFO: Eye window for uplink 1 : _______XXXX_____________________________ Data delay found: 28 09:17:17:setup_element:INFO: Eye window for uplink 2 : ______XXXX______________________________ Data delay found: 27 09:17:17:setup_element:INFO: Eye window for uplink 3 : ___XXXXX________________________________ Data delay found: 25 09:17:17:setup_element:INFO: Eye window for uplink 4 : ___XXXXX________________________________ Data delay found: 25 09:17:17:setup_element:INFO: Eye window for uplink 5 : XXXX__________________________________XX Data delay found: 20 09:17:17:setup_element:INFO: Eye window for uplink 6 : X___________________________________XXXX Data delay found: 18 09:17:17:setup_element:INFO: Eye window for uplink 7 : _______________________________XXXXXX___ Data delay found: 13 09:17:17:setup_element:INFO: Eye window for uplink 8 : _________________________XXXXX__________ Data delay found: 7 09:17:17:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXXXX_____ Data delay found: 11 09:17:17:setup_element:INFO: Eye window for uplink 10: __________________________XXXXX_________ Data delay found: 8 09:17:17:setup_element:INFO: Eye window for uplink 11: ______________________________XXXX______ Data delay found: 11 09:17:17:setup_element:INFO: Eye window for uplink 12: ____________________________XXXXX_______ Data delay found: 10 09:17:17:setup_element:INFO: Eye window for uplink 13: _______________________________XXXXX____ Data delay found: 13 09:17:17:setup_element:INFO: Eye window for uplink 14: _____________________________XXXX_______ Data delay found: 10 09:17:17:setup_element:INFO: Eye window for uplink 15: _______________________________XXXXX____ Data delay found: 13 09:17:17:setup_element:INFO: Setting the data phase to 31 for uplink 0 09:17:17:setup_element:INFO: Setting the data phase to 28 for uplink 1 09:17:17:setup_element:INFO: Setting the data phase to 27 for uplink 2 09:17:17:setup_element:INFO: Setting the data phase to 25 for uplink 3 09:17:17:setup_element:INFO: Setting the data phase to 25 for uplink 4 09:17:17:setup_element:INFO: Setting the data phase to 20 for uplink 5 09:17:17:setup_element:INFO: Setting the data phase to 18 for uplink 6 09:17:17:setup_element:INFO: Setting the data phase to 13 for uplink 7 09:17:17:setup_element:INFO: Setting the data phase to 7 for uplink 8 09:17:17:setup_element:INFO: Setting the data phase to 11 for uplink 9 09:17:17:setup_element:INFO: Setting the data phase to 8 for uplink 10 09:17:17:setup_element:INFO: Setting the data phase to 11 for uplink 11 09:17:17:setup_element:INFO: Setting the data phase to 10 for uplink 12 09:17:17:setup_element:INFO: Setting the data phase to 13 for uplink 13 09:17:17:setup_element:INFO: Setting the data phase to 10 for uplink 14 09:17:18:setup_element:INFO: Setting the data phase to 13 for uplink 15 09:17:18:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 35 Window Length: 69 Eye Windows: Uplink 0: _________________________________________________________________________XXXXXXX Uplink 1: _________________________________________________________________________XXXXXXX Uplink 2: ________________________________________________________________________XXXXXXX_ Uplink 3: ________________________________________________________________________XXXXXXX_ Uplink 4: _______________________________________________________________________XXXXXXXXX Uplink 5: _______________________________________________________________________XXXXXXXXX Uplink 6: ________________________________________________________________________XXXXXXX_ Uplink 7: ________________________________________________________________________XXXXXXX_ Uplink 8: _______________________________________________________________________XXXXXXXX_ Uplink 9: _______________________________________________________________________XXXXXXXX_ Uplink 10: ______________________________________________________________________XXXXXXXX__ Uplink 11: ______________________________________________________________________XXXXXXXX__ Uplink 12: ________________________________________________________________________XXXXXXXX Uplink 13: ________________________________________________________________________XXXXXXXX Uplink 14: X_______________________________________________________________________XXXXXXXX Uplink 15: X_______________________________________________________________________XXXXXXXX Data phase characteristics: Uplink 0: Optimal Phase: 31 Window Length: 34 Eye Window: _________XXXXXX_________________________ Uplink 1: Optimal Phase: 28 Window Length: 36 Eye Window: _______XXXX_____________________________ Uplink 2: Optimal Phase: 27 Window Length: 36 Eye Window: ______XXXX______________________________ Uplink 3: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 4: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 5: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 6: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 7: Optimal Phase: 13 Window Length: 34 Eye Window: _______________________________XXXXXX___ Uplink 8: Optimal Phase: 7 Window Length: 35 Eye Window: _________________________XXXXX__________ Uplink 9: Optimal Phase: 11 Window Length: 34 Eye Window: _____________________________XXXXXX_____ Uplink 10: Optimal Phase: 8 Window Length: 35 Eye Window: __________________________XXXXX_________ Uplink 11: Optimal Phase: 11 Window Length: 36 Eye Window: ______________________________XXXX______ Uplink 12: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ Uplink 13: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 14: Optimal Phase: 10 Window Length: 36 Eye Window: _____________________________XXXX_______ Uplink 15: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ ] 09:17:18:setup_element:INFO: Beginning SMX ASICs map scan 09:17:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:17:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:17:18:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 09:17:18:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 09:17:18:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 09:17:18:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 09:17:18:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 09:17:18:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 09:17:18:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 09:17:18:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 09:17:18:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 09:17:18:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 09:17:18:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 09:17:18:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 09:17:18:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 09:17:19:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 09:17:19:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 09:17:19:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 09:17:19:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 09:17:19:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 09:17:19:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 09:17:20:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0) ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9) ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2) ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4) ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13) ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6) ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15) Clock Phase Characteristic: Optimal Phase: 35 Window Length: 69 Eye Windows: Uplink 0: _________________________________________________________________________XXXXXXX Uplink 1: _________________________________________________________________________XXXXXXX Uplink 2: ________________________________________________________________________XXXXXXX_ Uplink 3: ________________________________________________________________________XXXXXXX_ Uplink 4: _______________________________________________________________________XXXXXXXXX Uplink 5: _______________________________________________________________________XXXXXXXXX Uplink 6: ________________________________________________________________________XXXXXXX_ Uplink 7: ________________________________________________________________________XXXXXXX_ Uplink 8: _______________________________________________________________________XXXXXXXX_ Uplink 9: _______________________________________________________________________XXXXXXXX_ Uplink 10: ______________________________________________________________________XXXXXXXX__ Uplink 11: ______________________________________________________________________XXXXXXXX__ Uplink 12: ________________________________________________________________________XXXXXXXX Uplink 13: ________________________________________________________________________XXXXXXXX Uplink 14: X_______________________________________________________________________XXXXXXXX Uplink 15: X_______________________________________________________________________XXXXXXXX Data phase characteristics: Uplink 0: Optimal Phase: 31 Window Length: 34 Eye Window: _________XXXXXX_________________________ Uplink 1: Optimal Phase: 28 Window Length: 36 Eye Window: _______XXXX_____________________________ Uplink 2: Optimal Phase: 27 Window Length: 36 Eye Window: ______XXXX______________________________ Uplink 3: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 4: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 5: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 6: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 7: Optimal Phase: 13 Window Length: 34 Eye Window: _______________________________XXXXXX___ Uplink 8: Optimal Phase: 7 Window Length: 35 Eye Window: _________________________XXXXX__________ Uplink 9: Optimal Phase: 11 Window Length: 34 Eye Window: _____________________________XXXXXX_____ Uplink 10: Optimal Phase: 8 Window Length: 35 Eye Window: __________________________XXXXX_________ Uplink 11: Optimal Phase: 11 Window Length: 36 Eye Window: ______________________________XXXX______ Uplink 12: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ Uplink 13: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ Uplink 14: Optimal Phase: 10 Window Length: 36 Eye Window: _____________________________XXXX_______ Uplink 15: Optimal Phase: 13 Window Length: 35 Eye Window: _______________________________XXXXX____ 09:17:20:setup_element:INFO: Performing Elink synchronization 09:17:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:17:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:17:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 09:17:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 09:17:20:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 09:17:20:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 09:17:21:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)] 09:17:22:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 09:17:22:febtest:INFO: 1-0 | XA-000-08-002-000-000-066-11 | 31.4 | 1189.2 09:17:22:febtest:INFO: 8-1 | XA-000-08-002-000-000-061-07 | 37.7 | 1153.7 09:17:22:febtest:INFO: 3-2 | XA-000-08-002-000-000-062-07 | 31.4 | 1195.1 09:17:23:febtest:INFO: 10-3 | XA-000-08-002-000-000-057-07 | 40.9 | 1159.7 09:17:23:febtest:INFO: 5-4 | XA-000-08-002-000-000-058-07 | 18.7 | 1242.0 09:17:23:febtest:INFO: 12-5 | XA-000-08-002-000-000-064-11 | 37.7 | 1171.5 09:17:23:febtest:INFO: 7-6 | XA-000-08-002-000-000-065-11 | 31.4 | 1189.2 09:17:24:febtest:INFO: 14-7 | XA-000-08-002-000-000-060-07 | 40.9 | 1159.7 09:17:24:ST3_smx:INFO: Configuring SMX FAST 09:17:26:ST3_smx:INFO: chip: 1-0 34.556970 C 1189.190035 mV 09:17:26:ST3_smx:INFO: Electrons 09:17:26:ST3_smx:INFO: # loops 0 09:17:27:ST3_smx:INFO: # loops 1 09:17:29:ST3_smx:INFO: # loops 2 09:17:30:ST3_smx:INFO: # loops 3 09:17:32:ST3_smx:INFO: # loops 4 09:17:34:ST3_smx:INFO: Total # of broken channels: 0 09:17:34:ST3_smx:INFO: List of broken channels: [] 09:17:34:ST3_smx:INFO: Total # of broken channels: 0 09:17:34:ST3_smx:INFO: List of broken channels: [] 09:17:34:ST3_smx:INFO: Configuring SMX FAST 09:17:36:ST3_smx:INFO: chip: 8-1 47.250730 C 1129.995435 mV 09:17:36:ST3_smx:INFO: Electrons 09:17:36:ST3_smx:INFO: # loops 0 09:17:38:ST3_smx:INFO: # loops 1 09:17:39:ST3_smx:INFO: # loops 2 09:17:41:ST3_smx:INFO: # loops 3 09:17:43:ST3_smx:INFO: # loops 4 09:17:44:ST3_smx:INFO: Total # of broken channels: 0 09:17:44:ST3_smx:INFO: List of broken channels: [] 09:17:44:ST3_smx:INFO: Total # of broken channels: 0 09:17:44:ST3_smx:INFO: List of broken channels: [] 09:17:45:ST3_smx:INFO: Configuring SMX FAST 09:17:47:ST3_smx:INFO: chip: 3-2 31.389742 C 1200.969315 mV 09:17:47:ST3_smx:INFO: Electrons 09:17:47:ST3_smx:INFO: # loops 0 09:17:48:ST3_smx:INFO: # loops 1 09:17:50:ST3_smx:INFO: # loops 2 09:17:52:ST3_smx:INFO: # loops 3 09:17:53:ST3_smx:INFO: # loops 4 09:17:55:ST3_smx:INFO: Total # of broken channels: 0 09:17:55:ST3_smx:INFO: List of broken channels: [] 09:17:55:ST3_smx:INFO: Total # of broken channels: 0 09:17:55:ST3_smx:INFO: List of broken channels: [] 09:17:55:ST3_smx:INFO: Configuring SMX FAST 09:17:57:ST3_smx:INFO: chip: 10-3 44.073563 C 1147.806000 mV 09:17:57:ST3_smx:INFO: Electrons 09:17:57:ST3_smx:INFO: # loops 0 09:17:59:ST3_smx:INFO: # loops 1 09:18:00:ST3_smx:INFO: # loops 2 09:18:02:ST3_smx:INFO: # loops 3 09:18:03:ST3_smx:INFO: # loops 4 09:18:05:ST3_smx:INFO: Total # of broken channels: 0 09:18:05:ST3_smx:INFO: List of broken channels: [] 09:18:05:ST3_smx:INFO: Total # of broken channels: 0 09:18:05:ST3_smx:INFO: List of broken channels: [] 09:18:05:ST3_smx:INFO: Configuring SMX FAST 09:18:07:ST3_smx:INFO: chip: 5-4 31.389742 C 1212.728715 mV 09:18:07:ST3_smx:INFO: Electrons 09:18:07:ST3_smx:INFO: # loops 0 09:18:09:ST3_smx:INFO: # loops 1 09:18:11:ST3_smx:INFO: # loops 2 09:18:13:ST3_smx:INFO: # loops 3 09:18:14:ST3_smx:INFO: # loops 4 09:18:16:ST3_smx:INFO: Total # of broken channels: 0 09:18:16:ST3_smx:INFO: List of broken channels: [] 09:18:16:ST3_smx:INFO: Total # of broken channels: 0 09:18:16:ST3_smx:INFO: List of broken channels: [] 09:18:16:ST3_smx:INFO: Configuring SMX FAST 09:18:18:ST3_smx:INFO: chip: 12-5 37.726682 C 1177.390875 mV 09:18:18:ST3_smx:INFO: Electrons 09:18:18:ST3_smx:INFO: # loops 0 09:18:20:ST3_smx:INFO: # loops 1 09:18:21:ST3_smx:INFO: # loops 2 09:18:23:ST3_smx:INFO: # loops 3 09:18:24:ST3_smx:INFO: # loops 4 09:18:26:ST3_smx:INFO: Total # of broken channels: 0 09:18:26:ST3_smx:INFO: List of broken channels: [] 09:18:26:ST3_smx:INFO: Total # of broken channels: 0 09:18:26:ST3_smx:INFO: List of broken channels: [] 09:18:26:ST3_smx:INFO: Configuring SMX FAST 09:18:29:ST3_smx:INFO: chip: 7-6 47.250730 C 1153.732915 mV 09:18:29:ST3_smx:INFO: Electrons 09:18:29:ST3_smx:INFO: # loops 0 09:18:30:ST3_smx:INFO: # loops 1 09:18:32:ST3_smx:INFO: # loops 2 09:18:33:ST3_smx:INFO: # loops 3 09:18:35:ST3_smx:INFO: # loops 4 09:18:36:ST3_smx:INFO: Total # of broken channels: 0 09:18:36:ST3_smx:INFO: List of broken channels: [] 09:18:36:ST3_smx:INFO: Total # of broken channels: 0 09:18:36:ST3_smx:INFO: List of broken channels: [] 09:18:37:ST3_smx:INFO: Configuring SMX FAST 09:18:39:ST3_smx:INFO: chip: 14-7 44.073563 C 1171.483840 mV 09:18:39:ST3_smx:INFO: Electrons 09:18:39:ST3_smx:INFO: # loops 0 09:18:40:ST3_smx:INFO: # loops 1 09:18:42:ST3_smx:INFO: # loops 2 09:18:44:ST3_smx:INFO: # loops 3 09:18:45:ST3_smx:INFO: # loops 4 09:18:47:ST3_smx:INFO: Total # of broken channels: 0 09:18:47:ST3_smx:INFO: List of broken channels: [] 09:18:47:ST3_smx:INFO: Total # of broken channels: 0 09:18:47:ST3_smx:INFO: List of broken channels: [] 09:18:48:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 09:18:48:febtest:INFO: 1-0 | XA-000-08-002-000-000-066-11 | 37.7 | 1189.2 09:18:48:febtest:INFO: 8-1 | XA-000-08-002-000-000-061-07 | 47.3 | 1130.0 09:18:48:febtest:INFO: 3-2 | XA-000-08-002-000-000-062-07 | 34.6 | 1201.0 09:18:49:febtest:INFO: 10-3 | XA-000-08-002-000-000-057-07 | 44.1 | 1153.7 09:18:49:febtest:INFO: 5-4 | XA-000-08-002-000-000-058-07 | 31.4 | 1212.7 09:18:49:febtest:INFO: 12-5 | XA-000-08-002-000-000-064-11 | 37.7 | 1177.4 09:18:49:febtest:INFO: 7-6 | XA-000-08-002-000-000-065-11 | 47.3 | 1159.7 09:18:49:febtest:INFO: 14-7 | XA-000-08-002-000-000-060-07 | 44.1 | 1171.5 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 2023_12_14-09_15_25 OPERATOR : Kerstin S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : L6DL200120 M6DL2T4001204A2 124 C FEB_SN : 1072 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- SENSOR_ID: MODULE_NAME: L6DL200120 M6DL2T4001204A2 124 C MODULE_TYPE: MODULE_LADDER: MODULE_MODULE: MODULE_SIZE: 0 MODULE_GRADE: --------------------------------------- VI_before_Init : ['2.450', '1.8610', '1.850', '0.5190', '7.000', '1.5310', '7.000', '1.5310'] VI_after__Init : ['2.450', '2.0430', '1.850', '0.6160', '7.000', '1.5350', '7.000', '1.5350'] VI_at__the_End : ['0', '0', '0', '0', '0', '0'] 09:19:05:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1072/TestDate_2023_12_14-09_15_25/
Comment.txt
Sensor: 12304