
FEB_1073 01.02.24 15:11:26
TextEdit.txt
15:11:26:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 15:11:26:ST3_Shared:INFO: -----------------------FEB-Microcable----------------------- 15:11:26:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 15:11:27:febtest:INFO: Testing FEB with SN 1073 15:11:28:smx_tester:INFO: Scanning setup 15:11:28:elinks:INFO: Disabling clock on downlink 0 15:11:28:elinks:INFO: Disabling clock on downlink 1 15:11:28:elinks:INFO: Disabling clock on downlink 2 15:11:28:elinks:INFO: Disabling clock on downlink 3 15:11:28:elinks:INFO: Disabling clock on downlink 4 15:11:28:setup_element:INFO: Checking SOS, encoding_mode: SOS 15:11:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 15:11:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 15:11:28:elinks:INFO: Disabling clock on downlink 0 15:11:28:elinks:INFO: Disabling clock on downlink 1 15:11:28:elinks:INFO: Disabling clock on downlink 2 15:11:28:elinks:INFO: Disabling clock on downlink 3 15:11:28:elinks:INFO: Disabling clock on downlink 4 15:11:28:setup_element:INFO: Checking SOS, encoding_mode: SOS 15:11:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 15:11:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 15:11:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 15:11:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 15:11:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 15:11:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 15:11:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 15:11:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 15:11:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 15:11:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 15:11:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 15:11:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 15:11:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 15:11:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 15:11:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 15:11:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 15:11:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 15:11:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 15:11:29:elinks:INFO: Disabling clock on downlink 0 15:11:29:elinks:INFO: Disabling clock on downlink 1 15:11:29:elinks:INFO: Disabling clock on downlink 2 15:11:29:elinks:INFO: Disabling clock on downlink 3 15:11:29:elinks:INFO: Disabling clock on downlink 4 15:11:29:setup_element:INFO: Checking SOS, encoding_mode: SOS 15:11:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 15:11:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 15:11:29:elinks:INFO: Disabling clock on downlink 0 15:11:29:elinks:INFO: Disabling clock on downlink 1 15:11:29:elinks:INFO: Disabling clock on downlink 2 15:11:29:elinks:INFO: Disabling clock on downlink 3 15:11:29:elinks:INFO: Disabling clock on downlink 4 15:11:29:setup_element:INFO: Checking SOS, encoding_mode: SOS 15:11:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 15:11:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 15:11:29:elinks:INFO: Disabling clock on downlink 0 15:11:29:elinks:INFO: Disabling clock on downlink 1 15:11:29:elinks:INFO: Disabling clock on downlink 2 15:11:29:elinks:INFO: Disabling clock on downlink 3 15:11:29:elinks:INFO: Disabling clock on downlink 4 15:11:29:setup_element:INFO: Checking SOS, encoding_mode: SOS 15:11:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 15:11:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 15:11:29:setup_element:INFO: Scanning clock phase 15:11:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 15:11:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 15:11:29:setup_element:INFO: Clock phase scan results for group 0, downlink 1 15:11:29:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 15:11:29:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 15:11:29:setup_element:INFO: Eye window for uplink 2 : _________________________________________________________________________XXXXXXX Clock Delay: 36 15:11:29:setup_element:INFO: Eye window for uplink 3 : _________________________________________________________________________XXXXXXX Clock Delay: 36 15:11:29:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXX___ Clock Delay: 33 15:11:29:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXX___ Clock Delay: 33 15:11:29:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 15:11:29:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 15:11:29:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 15:11:29:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___ Clock Delay: 32 15:11:29:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________________ Clock Delay: 40 15:11:29:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________________ Clock Delay: 40 15:11:29:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 15:11:29:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 15:11:29:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 15:11:29:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 15:11:29:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1 15:11:29:setup_element:INFO: Scanning data phases 15:11:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 15:11:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 15:11:35:setup_element:INFO: Data phase scan results for group 0, downlink 1 15:11:35:setup_element:INFO: Eye window for uplink 0 : ____________XXXX________________________ Data delay found: 33 15:11:35:setup_element:INFO: Eye window for uplink 1 : _______XXXXX____________________________ Data delay found: 29 15:11:35:setup_element:INFO: Eye window for uplink 2 : ___________XXXXX________________________ Data delay found: 33 15:11:35:setup_element:INFO: Eye window for uplink 3 : ________XXXXX___________________________ Data delay found: 30 15:11:35:setup_element:INFO: Eye window for uplink 4 : ___XXXXX________________________________ Data delay found: 25 15:11:35:setup_element:INFO: Eye window for uplink 5 : XXXX__________________________________XX Data delay found: 20 15:11:35:setup_element:INFO: Eye window for uplink 6 : XXXX___________________________________X Data delay found: 21 15:11:35:setup_element:INFO: Eye window for uplink 7 : X_________________________________XXXXXX Data delay found: 17 15:11:35:setup_element:INFO: Eye window for uplink 8 : ________________________XXXX____________ Data delay found: 5 15:11:35:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXXX______ Data delay found: 11 15:11:35:setup_element:INFO: Eye window for uplink 10: _________________________XXXXXX_________ Data delay found: 7 15:11:35:setup_element:INFO: Eye window for uplink 11: _____________________________XXXXX______ Data delay found: 11 15:11:35:setup_element:INFO: Eye window for uplink 12: __________________________XXXXX_________ Data delay found: 8 15:11:35:setup_element:INFO: Eye window for uplink 13: ____________________________XXXXX_______ Data delay found: 10 15:11:35:setup_element:INFO: Eye window for uplink 14: ____________________________XXXXX_______ Data delay found: 10 15:11:35:setup_element:INFO: Eye window for uplink 15: ______________________________XXXXX_____ Data delay found: 12 15:11:35:setup_element:INFO: Setting the data phase to 33 for uplink 0 15:11:35:setup_element:INFO: Setting the data phase to 29 for uplink 1 15:11:35:setup_element:INFO: Setting the data phase to 33 for uplink 2 15:11:35:setup_element:INFO: Setting the data phase to 30 for uplink 3 15:11:35:setup_element:INFO: Setting the data phase to 25 for uplink 4 15:11:35:setup_element:INFO: Setting the data phase to 20 for uplink 5 15:11:35:setup_element:INFO: Setting the data phase to 21 for uplink 6 15:11:35:setup_element:INFO: Setting the data phase to 17 for uplink 7 15:11:35:setup_element:INFO: Setting the data phase to 5 for uplink 8 15:11:35:setup_element:INFO: Setting the data phase to 11 for uplink 9 15:11:35:setup_element:INFO: Setting the data phase to 7 for uplink 10 15:11:35:setup_element:INFO: Setting the data phase to 11 for uplink 11 15:11:35:setup_element:INFO: Setting the data phase to 8 for uplink 12 15:11:35:setup_element:INFO: Setting the data phase to 10 for uplink 13 15:11:35:setup_element:INFO: Setting the data phase to 10 for uplink 14 15:11:35:setup_element:INFO: Setting the data phase to 12 for uplink 15 15:11:35:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 34 Window Length: 69 Eye Windows: Uplink 0: _______________________________________________________________________XXXXXXXX_ Uplink 1: _______________________________________________________________________XXXXXXXX_ Uplink 2: _________________________________________________________________________XXXXXXX Uplink 3: _________________________________________________________________________XXXXXXX Uplink 4: ______________________________________________________________________XXXXXXX___ Uplink 5: ______________________________________________________________________XXXXXXX___ Uplink 6: ________________________________________________________________________XXXXXX__ Uplink 7: ________________________________________________________________________XXXXXX__ Uplink 8: _____________________________________________________________________XXXXXXXX___ Uplink 9: _____________________________________________________________________XXXXXXXX___ Uplink 10: ________________________________________________________________________________ Uplink 11: ________________________________________________________________________________ Uplink 12: ______________________________________________________________________XXXXXXX___ Uplink 13: ______________________________________________________________________XXXXXXX___ Uplink 14: _______________________________________________________________________XXXXXXXX_ Uplink 15: _______________________________________________________________________XXXXXXXX_ Data phase characteristics: Uplink 0: Optimal Phase: 33 Window Length: 36 Eye Window: ____________XXXX________________________ Uplink 1: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 2: Optimal Phase: 33 Window Length: 35 Eye Window: ___________XXXXX________________________ Uplink 3: Optimal Phase: 30 Window Length: 35 Eye Window: ________XXXXX___________________________ Uplink 4: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 5: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 6: Optimal Phase: 21 Window Length: 35 Eye Window: XXXX___________________________________X Uplink 7: Optimal Phase: 17 Window Length: 33 Eye Window: X_________________________________XXXXXX Uplink 8: Optimal Phase: 5 Window Length: 36 Eye Window: ________________________XXXX____________ Uplink 9: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 10: Optimal Phase: 7 Window Length: 34 Eye Window: _________________________XXXXXX_________ Uplink 11: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 12: Optimal Phase: 8 Window Length: 35 Eye Window: __________________________XXXXX_________ Uplink 13: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ Uplink 14: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ Uplink 15: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ ] 15:11:35:setup_element:INFO: Beginning SMX ASICs map scan 15:11:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 15:11:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 15:11:35:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 15:11:35:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 15:11:35:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 15:11:35:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 15:11:35:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 15:11:35:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 15:11:36:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 15:11:36:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 15:11:36:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 15:11:36:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 15:11:36:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 15:11:36:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 15:11:36:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 15:11:36:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 15:11:36:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 15:11:36:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 15:11:36:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 15:11:37:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 15:11:37:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 15:11:38:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0) ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9) ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2) ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4) ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13) ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6) ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15) Clock Phase Characteristic: Optimal Phase: 34 Window Length: 69 Eye Windows: Uplink 0: _______________________________________________________________________XXXXXXXX_ Uplink 1: _______________________________________________________________________XXXXXXXX_ Uplink 2: _________________________________________________________________________XXXXXXX Uplink 3: _________________________________________________________________________XXXXXXX Uplink 4: ______________________________________________________________________XXXXXXX___ Uplink 5: ______________________________________________________________________XXXXXXX___ Uplink 6: ________________________________________________________________________XXXXXX__ Uplink 7: ________________________________________________________________________XXXXXX__ Uplink 8: _____________________________________________________________________XXXXXXXX___ Uplink 9: _____________________________________________________________________XXXXXXXX___ Uplink 10: ________________________________________________________________________________ Uplink 11: ________________________________________________________________________________ Uplink 12: ______________________________________________________________________XXXXXXX___ Uplink 13: ______________________________________________________________________XXXXXXX___ Uplink 14: _______________________________________________________________________XXXXXXXX_ Uplink 15: _______________________________________________________________________XXXXXXXX_ Data phase characteristics: Uplink 0: Optimal Phase: 33 Window Length: 36 Eye Window: ____________XXXX________________________ Uplink 1: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 2: Optimal Phase: 33 Window Length: 35 Eye Window: ___________XXXXX________________________ Uplink 3: Optimal Phase: 30 Window Length: 35 Eye Window: ________XXXXX___________________________ Uplink 4: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 5: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 6: Optimal Phase: 21 Window Length: 35 Eye Window: XXXX___________________________________X Uplink 7: Optimal Phase: 17 Window Length: 33 Eye Window: X_________________________________XXXXXX Uplink 8: Optimal Phase: 5 Window Length: 36 Eye Window: ________________________XXXX____________ Uplink 9: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 10: Optimal Phase: 7 Window Length: 34 Eye Window: _________________________XXXXXX_________ Uplink 11: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 12: Optimal Phase: 8 Window Length: 35 Eye Window: __________________________XXXXX_________ Uplink 13: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ Uplink 14: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ Uplink 15: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ 15:11:38:setup_element:INFO: Performing Elink synchronization 15:11:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 15:11:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 15:11:38:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 15:11:38:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 15:11:38:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 15:11:38:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 15:11:38:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)] 15:11:39:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 15:11:40:febtest:INFO: 1-0 | XA-000-08-002-000-003-243-06 | 50.4 | 1147.8 15:11:40:febtest:INFO: 8-1 | XA-000-08-002-000-003-235-01 | 31.4 | 1212.7 15:11:40:febtest:INFO: 3-2 | XA-000-08-002-000-004-036-06 | 40.9 | 1177.4 15:11:40:febtest:INFO: 10-3 | XA-000-08-002-000-003-236-01 | 44.1 | 1171.5 15:11:40:febtest:INFO: 5-4 | XA-000-08-002-000-004-039-06 | 28.2 | 1230.3 15:11:41:febtest:INFO: 12-5 | XA-000-08-002-000-003-240-06 | 44.1 | 1171.5 15:11:41:febtest:INFO: 7-6 | XA-000-08-002-000-003-237-01 | 37.7 | 1201.0 15:11:41:febtest:INFO: 14-7 | XA-000-08-002-000-003-239-01 | 34.6 | 1201.0 15:11:41:ST3_smx:INFO: Configuring SMX FAST 15:11:43:ST3_smx:INFO: chip: 1-0 47.250730 C 1159.654860 mV 15:11:43:ST3_smx:INFO: Electrons 15:11:43:ST3_smx:INFO: # loops 0 15:11:45:ST3_smx:INFO: # loops 1 15:11:47:ST3_smx:INFO: # loops 2 15:11:48:ST3_smx:INFO: # loops 3 15:11:50:ST3_smx:INFO: # loops 4 15:11:52:ST3_smx:INFO: Total # of broken channels: 0 15:11:52:ST3_smx:INFO: List of broken channels: [] 15:11:52:ST3_smx:INFO: Total # of broken channels: 1 15:11:52:ST3_smx:INFO: List of broken channels: [115] 15:11:53:ST3_smx:INFO: Configuring SMX FAST 15:11:55:ST3_smx:INFO: chip: 8-1 37.726682 C 1189.190035 mV 15:11:55:ST3_smx:INFO: Electrons 15:11:55:ST3_smx:INFO: # loops 0 15:11:57:ST3_smx:INFO: # loops 1 15:11:58:ST3_smx:INFO: # loops 2 15:12:00:ST3_smx:INFO: # loops 3 15:12:02:ST3_smx:INFO: # loops 4 15:12:03:ST3_smx:INFO: Total # of broken channels: 0 15:12:03:ST3_smx:INFO: List of broken channels: [] 15:12:03:ST3_smx:INFO: Total # of broken channels: 0 15:12:03:ST3_smx:INFO: List of broken channels: [] 15:12:04:ST3_smx:INFO: Configuring SMX FAST 15:12:06:ST3_smx:INFO: chip: 3-2 47.250730 C 1159.654860 mV 15:12:07:ST3_smx:INFO: Electrons 15:12:07:ST3_smx:INFO: # loops 0 15:12:08:ST3_smx:INFO: # loops 1 15:12:10:ST3_smx:INFO: # loops 2 15:12:12:ST3_smx:INFO: # loops 3 15:12:13:ST3_smx:INFO: # loops 4 15:12:15:ST3_smx:INFO: Total # of broken channels: 1 15:12:15:ST3_smx:INFO: List of broken channels: [1] 15:12:15:ST3_smx:INFO: Total # of broken channels: 1 15:12:15:ST3_smx:INFO: List of broken channels: [1] 15:12:16:ST3_smx:INFO: Configuring SMX FAST 15:12:18:ST3_smx:INFO: chip: 10-3 44.073563 C 1171.483840 mV 15:12:18:ST3_smx:INFO: Electrons 15:12:18:ST3_smx:INFO: # loops 0 15:12:20:ST3_smx:INFO: # loops 1 15:12:21:ST3_smx:INFO: # loops 2 15:12:23:ST3_smx:INFO: # loops 3 15:12:25:ST3_smx:INFO: # loops 4 15:12:26:ST3_smx:INFO: Total # of broken channels: 0 15:12:26:ST3_smx:INFO: List of broken channels: [] 15:12:26:ST3_smx:INFO: Total # of broken channels: 0 15:12:26:ST3_smx:INFO: List of broken channels: [] 15:12:27:ST3_smx:INFO: Configuring SMX FAST 15:12:30:ST3_smx:INFO: chip: 5-4 28.225000 C 1230.330540 mV 15:12:30:ST3_smx:INFO: Electrons 15:12:30:ST3_smx:INFO: # loops 0 15:12:31:ST3_smx:INFO: # loops 1 15:12:33:ST3_smx:INFO: # loops 2 15:12:35:ST3_smx:INFO: # loops 3 15:12:36:ST3_smx:INFO: # loops 4 15:12:38:ST3_smx:INFO: Total # of broken channels: 1 15:12:38:ST3_smx:INFO: List of broken channels: [7] 15:12:38:ST3_smx:INFO: Total # of broken channels: 2 15:12:38:ST3_smx:INFO: List of broken channels: [1, 7] 15:12:39:ST3_smx:INFO: Configuring SMX FAST 15:12:41:ST3_smx:INFO: chip: 12-5 50.430383 C 1153.732915 mV 15:12:41:ST3_smx:INFO: Electrons 15:12:41:ST3_smx:INFO: # loops 0 15:12:43:ST3_smx:INFO: # loops 1 15:12:45:ST3_smx:INFO: # loops 2 15:12:46:ST3_smx:INFO: # loops 3 15:12:48:ST3_smx:INFO: # loops 4 15:12:50:ST3_smx:INFO: Total # of broken channels: 0 15:12:50:ST3_smx:INFO: List of broken channels: [] 15:12:50:ST3_smx:INFO: Total # of broken channels: 0 15:12:50:ST3_smx:INFO: List of broken channels: [] 15:12:51:ST3_smx:INFO: Configuring SMX FAST 15:12:53:ST3_smx:INFO: chip: 7-6 44.073563 C 1183.292940 mV 15:12:53:ST3_smx:INFO: Electrons 15:12:53:ST3_smx:INFO: # loops 0 15:12:55:ST3_smx:INFO: # loops 1 15:12:56:ST3_smx:INFO: # loops 2 15:12:58:ST3_smx:INFO: # loops 3 15:13:00:ST3_smx:INFO: # loops 4 15:13:01:ST3_smx:INFO: Total # of broken channels: 0 15:13:01:ST3_smx:INFO: List of broken channels: [] 15:13:01:ST3_smx:INFO: Total # of broken channels: 0 15:13:01:ST3_smx:INFO: List of broken channels: [] 15:13:02:ST3_smx:INFO: Configuring SMX FAST 15:13:04:ST3_smx:INFO: chip: 14-7 37.726682 C 1200.969315 mV 15:13:04:ST3_smx:INFO: Electrons 15:13:04:ST3_smx:INFO: # loops 0 15:13:06:ST3_smx:INFO: # loops 1 15:13:08:ST3_smx:INFO: # loops 2 15:13:10:ST3_smx:INFO: # loops 3 15:13:11:ST3_smx:INFO: # loops 4 15:13:13:ST3_smx:INFO: Total # of broken channels: 0 15:13:13:ST3_smx:INFO: List of broken channels: [] 15:13:13:ST3_smx:INFO: Total # of broken channels: 0 15:13:13:ST3_smx:INFO: List of broken channels: [] 15:13:14:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 15:13:14:febtest:INFO: 1-0 | XA-000-08-002-000-003-243-06 | 47.3 | 1159.7 15:13:14:febtest:INFO: 8-1 | XA-000-08-002-000-003-235-01 | 37.7 | 1195.1 15:13:15:febtest:INFO: 3-2 | XA-000-08-002-000-004-036-06 | 47.3 | 1159.7 15:13:15:febtest:INFO: 10-3 | XA-000-08-002-000-003-236-01 | 44.1 | 1171.5 15:13:15:febtest:INFO: 5-4 | XA-000-08-002-000-004-039-06 | 28.2 | 1236.2 15:13:15:febtest:INFO: 12-5 | XA-000-08-002-000-003-240-06 | 50.4 | 1153.7 15:13:15:febtest:INFO: 7-6 | XA-000-08-002-000-003-237-01 | 44.1 | 1183.3 15:13:16:febtest:INFO: 14-7 | XA-000-08-002-000-003-239-01 | 37.7 | 1206.9 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 2024_02_01-15_11_26 OPERATOR : Oleksandr S.; Robert V.; Irakli K.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : FEB_SN : 1073 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- --------------------------------------- VI_before_Init : ['2.451', '0.0002', '1.850', '0.1031', '2.451', '1.9410', '1.850', '2.5660'] VI_after__Init : ['0', '0', '0', '0', '0', '0'] VI_at__the_End : ['0', '0', '0', '0', '0', '0'] 15:13:20:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1073/TestDate_2024_02_01-15_11_26/