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FEB_1075 18.01.24 10:12:34
TextEdit.txt
10:09:28:ST3_hmp4040:INFO: HAMEG,HMP2030,017836163,HW50010002/SW2.30
10:09:29:febtest:INFO: FEB 8-2 selected
10:09:29:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:11:20:febtest:INFO: FEB 8-2 selected
10:11:20:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:11:25:ST3_Shared:INFO: Listo of operators:Kerstin S.;
10:12:34:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:12:34:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
10:12:34:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:12:59:ST3_ModuleSelector:INFO: L4UL401032 M4UL4T3010323B2 124 C
10:12:59:ST3_ModuleSelector:INFO:
10:12:59:febtest:INFO: Testing FEB with SN 1075
10:13:01:smx_tester:INFO: Scanning setup
10:13:01:elinks:INFO: Disabling clock on downlink 0
10:13:01:elinks:INFO: Disabling clock on downlink 1
10:13:01:elinks:INFO: Disabling clock on downlink 2
10:13:01:elinks:INFO: Disabling clock on downlink 3
10:13:01:elinks:INFO: Disabling clock on downlink 4
10:13:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:13:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:13:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:13:01:elinks:INFO: Disabling clock on downlink 0
10:13:01:elinks:INFO: Disabling clock on downlink 1
10:13:01:elinks:INFO: Disabling clock on downlink 2
10:13:01:elinks:INFO: Disabling clock on downlink 3
10:13:01:elinks:INFO: Disabling clock on downlink 4
10:13:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:13:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:13:01:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
10:13:01:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
10:13:01:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
10:13:01:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
10:13:01:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
10:13:01:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
10:13:01:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
10:13:01:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
10:13:01:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:13:01:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:13:01:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:13:01:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:13:01:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:13:01:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:13:01:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:13:01:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:13:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:13:01:elinks:INFO: Disabling clock on downlink 0
10:13:01:elinks:INFO: Disabling clock on downlink 1
10:13:01:elinks:INFO: Disabling clock on downlink 2
10:13:01:elinks:INFO: Disabling clock on downlink 3
10:13:01:elinks:INFO: Disabling clock on downlink 4
10:13:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:13:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:13:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:13:01:elinks:INFO: Disabling clock on downlink 0
10:13:01:elinks:INFO: Disabling clock on downlink 1
10:13:01:elinks:INFO: Disabling clock on downlink 2
10:13:01:elinks:INFO: Disabling clock on downlink 3
10:13:01:elinks:INFO: Disabling clock on downlink 4
10:13:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:13:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:13:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:13:01:elinks:INFO: Disabling clock on downlink 0
10:13:01:elinks:INFO: Disabling clock on downlink 1
10:13:01:elinks:INFO: Disabling clock on downlink 2
10:13:01:elinks:INFO: Disabling clock on downlink 3
10:13:02:elinks:INFO: Disabling clock on downlink 4
10:13:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:13:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:13:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:13:02:setup_element:INFO: Scanning clock phase
10:13:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:13:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:13:02:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:13:02:setup_element:INFO: Eye window for uplink 0 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:13:02:setup_element:INFO: Eye window for uplink 1 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:13:02:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:13:02:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:13:02:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:13:02:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:13:02:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
10:13:02:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
10:13:02:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:13:02:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:13:02:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:13:02:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:13:02:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:13:02:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:13:02:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:13:02:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:13:02:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
10:13:02:setup_element:INFO: Scanning data phases
10:13:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:13:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:13:08:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:13:08:setup_element:INFO: Eye window for uplink 0 : __________XXXXXX________________________
Data delay found: 32
10:13:08:setup_element:INFO: Eye window for uplink 1 : ______XXXXXX____________________________
Data delay found: 28
10:13:08:setup_element:INFO: Eye window for uplink 2 : ________XXXXX___________________________
Data delay found: 30
10:13:08:setup_element:INFO: Eye window for uplink 3 : _____XXXXXX_____________________________
Data delay found: 27
10:13:08:setup_element:INFO: Eye window for uplink 4 : ___XXXXX_______________________XXXXXXXXX
Data delay found: 19
10:13:08:setup_element:INFO: Eye window for uplink 5 : XXXX___________________________XXXXXXXXX
Data delay found: 17
10:13:08:setup_element:INFO: Eye window for uplink 6 : XX__________________________________XXXX
Data delay found: 18
10:13:08:setup_element:INFO: Eye window for uplink 7 : ________________________________XXXXXX__
Data delay found: 14
10:13:08:setup_element:INFO: Eye window for uplink 8 : ________________________XXXX____________
Data delay found: 5
10:13:08:setup_element:INFO: Eye window for uplink 9 : ____________________________XXXXXX______
Data delay found: 10
10:13:08:setup_element:INFO: Eye window for uplink 10: __________________________XXXXX_________
Data delay found: 8
10:13:08:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXX_____
Data delay found: 12
10:13:08:setup_element:INFO: Eye window for uplink 12: ___________________________XXXXX________
Data delay found: 9
10:13:08:setup_element:INFO: Eye window for uplink 13: ______________________________XXXXX_____
Data delay found: 12
10:13:08:setup_element:INFO: Eye window for uplink 14: ____________________________XXXXX_______
Data delay found: 10
10:13:08:setup_element:INFO: Eye window for uplink 15: ______________________________XXXXX_____
Data delay found: 12
10:13:08:setup_element:INFO: Setting the data phase to 32 for uplink 0
10:13:08:setup_element:INFO: Setting the data phase to 28 for uplink 1
10:13:08:setup_element:INFO: Setting the data phase to 30 for uplink 2
10:13:08:setup_element:INFO: Setting the data phase to 27 for uplink 3
10:13:08:setup_element:INFO: Setting the data phase to 19 for uplink 4
10:13:08:setup_element:INFO: Setting the data phase to 17 for uplink 5
10:13:08:setup_element:INFO: Setting the data phase to 18 for uplink 6
10:13:08:setup_element:INFO: Setting the data phase to 14 for uplink 7
10:13:08:setup_element:INFO: Setting the data phase to 5 for uplink 8
10:13:08:setup_element:INFO: Setting the data phase to 10 for uplink 9
10:13:08:setup_element:INFO: Setting the data phase to 8 for uplink 10
10:13:08:setup_element:INFO: Setting the data phase to 12 for uplink 11
10:13:08:setup_element:INFO: Setting the data phase to 9 for uplink 12
10:13:08:setup_element:INFO: Setting the data phase to 12 for uplink 13
10:13:08:setup_element:INFO: Setting the data phase to 10 for uplink 14
10:13:08:setup_element:INFO: Setting the data phase to 12 for uplink 15
10:13:08:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 0: ______________________________________________________________________XXXXXXXX__
Uplink 1: ______________________________________________________________________XXXXXXXX__
Uplink 2: _______________________________________________________________________XXXXXXX__
Uplink 3: _______________________________________________________________________XXXXXXX__
Uplink 4: ______________________________________________________________________XXXXXXXX__
Uplink 5: ______________________________________________________________________XXXXXXXX__
Uplink 6: ______________________________________________________________________XXXXXX____
Uplink 7: ______________________________________________________________________XXXXXX____
Uplink 8: ____________________________________________________________________XXXXXXXX____
Uplink 9: ____________________________________________________________________XXXXXXXX____
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: _____________________________________________________________________XXXXXXXX___
Uplink 13: _____________________________________________________________________XXXXXXXX___
Uplink 14: _______________________________________________________________________XXXXXX___
Uplink 15: _______________________________________________________________________XXXXXX___
Data phase characteristics:
Uplink 0:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 1:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 2:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 3:
Optimal Phase: 27
Window Length: 34
Eye Window: _____XXXXXX_____________________________
Uplink 4:
Optimal Phase: 19
Window Length: 23
Eye Window: ___XXXXX_______________________XXXXXXXXX
Uplink 5:
Optimal Phase: 17
Window Length: 27
Eye Window: XXXX___________________________XXXXXXXXX
Uplink 6:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 7:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 8:
Optimal Phase: 5
Window Length: 36
Eye Window: ________________________XXXX____________
Uplink 9:
Optimal Phase: 10
Window Length: 34
Eye Window: ____________________________XXXXXX______
Uplink 10:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 11:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 12:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 13:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 14:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 15:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
]
10:13:08:setup_element:INFO: Beginning SMX ASICs map scan
10:13:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:13:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:13:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:13:08:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:13:08:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:13:08:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:13:08:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:13:08:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:13:08:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:13:08:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:13:08:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:13:09:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:13:09:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:13:09:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:13:09:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:13:09:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:13:09:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:13:09:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:13:09:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:13:09:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:13:09:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:13:11:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 0: ______________________________________________________________________XXXXXXXX__
Uplink 1: ______________________________________________________________________XXXXXXXX__
Uplink 2: _______________________________________________________________________XXXXXXX__
Uplink 3: _______________________________________________________________________XXXXXXX__
Uplink 4: ______________________________________________________________________XXXXXXXX__
Uplink 5: ______________________________________________________________________XXXXXXXX__
Uplink 6: ______________________________________________________________________XXXXXX____
Uplink 7: ______________________________________________________________________XXXXXX____
Uplink 8: ____________________________________________________________________XXXXXXXX____
Uplink 9: ____________________________________________________________________XXXXXXXX____
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: _____________________________________________________________________XXXXXXXX___
Uplink 13: _____________________________________________________________________XXXXXXXX___
Uplink 14: _______________________________________________________________________XXXXXX___
Uplink 15: _______________________________________________________________________XXXXXX___
Data phase characteristics:
Uplink 0:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 1:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 2:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 3:
Optimal Phase: 27
Window Length: 34
Eye Window: _____XXXXXX_____________________________
Uplink 4:
Optimal Phase: 19
Window Length: 23
Eye Window: ___XXXXX_______________________XXXXXXXXX
Uplink 5:
Optimal Phase: 17
Window Length: 27
Eye Window: XXXX___________________________XXXXXXXXX
Uplink 6:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 7:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 8:
Optimal Phase: 5
Window Length: 36
Eye Window: ________________________XXXX____________
Uplink 9:
Optimal Phase: 10
Window Length: 34
Eye Window: ____________________________XXXXXX______
Uplink 10:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 11:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 12:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 13:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 14:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 15:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
10:13:11:setup_element:INFO: Performing Elink synchronization
10:13:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:13:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:13:11:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:13:11:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:13:11:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:13:11:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:13:11:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
10:13:12:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:13:12:febtest:INFO: 1-0 | XA-000-08-002-000-001-195-12 | 21.9 | 1212.7
10:13:13:febtest:INFO: 8-1 | XA-000-08-002-000-001-187-00 | 25.1 | 1201.0
10:13:13:febtest:INFO: 3-2 | XA-000-08-002-000-001-196-12 | 37.7 | 1165.6
10:13:13:febtest:INFO: 10-3 | XA-000-08-002-000-001-178-00 | 34.6 | 1177.4
10:13:13:febtest:INFO: 5-4 | XA-000-08-002-000-001-200-12 | 40.9 | 1159.7
10:13:14:febtest:INFO: 12-5 | XA-000-08-002-000-001-158-14 | 25.1 | 1206.9
10:13:14:febtest:INFO: 7-6 | XA-000-08-002-000-001-188-00 | 21.9 | 1224.5
10:13:14:febtest:INFO: 14-7 | XA-000-08-002-000-001-197-12 | 50.4 | 1118.1
10:13:14:ST3_smx:INFO: Configuring SMX FAST
10:13:16:ST3_smx:INFO: chip: 1-0 31.389742 C 1189.190035 mV
10:13:16:ST3_smx:INFO: Electrons
10:13:16:ST3_smx:INFO: # loops 0
10:13:18:ST3_smx:INFO: # loops 1
10:13:20:ST3_smx:INFO: # loops 2
10:13:21:ST3_smx:INFO: # loops 3
10:13:23:ST3_smx:INFO: # loops 4
10:13:24:ST3_smx:INFO: Total # of broken channels: 1
10:13:24:ST3_smx:INFO: List of broken channels: [83]
10:13:24:ST3_smx:INFO: Total # of broken channels: 0
10:13:24:ST3_smx:INFO: List of broken channels: []
10:13:25:ST3_smx:INFO: Configuring SMX FAST
10:13:27:ST3_smx:INFO: chip: 8-1 40.898880 C 1147.806000 mV
10:13:27:ST3_smx:INFO: Electrons
10:13:27:ST3_smx:INFO: # loops 0
10:13:29:ST3_smx:INFO: # loops 1
10:13:30:ST3_smx:INFO: # loops 2
10:13:32:ST3_smx:INFO: # loops 3
10:13:33:ST3_smx:INFO: # loops 4
10:13:35:ST3_smx:INFO: Total # of broken channels: 0
10:13:35:ST3_smx:INFO: List of broken channels: []
10:13:35:ST3_smx:INFO: Total # of broken channels: 4
10:13:35:ST3_smx:INFO: List of broken channels: [32, 36, 38, 40]
10:13:35:ST3_smx:INFO: Configuring SMX FAST
10:13:37:ST3_smx:INFO: chip: 3-2 34.556970 C 1183.292940 mV
10:13:37:ST3_smx:INFO: Electrons
10:13:37:ST3_smx:INFO: # loops 0
10:13:39:ST3_smx:INFO: # loops 1
10:13:41:ST3_smx:INFO: # loops 2
10:13:43:ST3_smx:INFO: # loops 3
10:13:44:ST3_smx:INFO: # loops 4
10:13:46:ST3_smx:INFO: Total # of broken channels: 0
10:13:46:ST3_smx:INFO: List of broken channels: []
10:13:46:ST3_smx:INFO: Total # of broken channels: 0
10:13:46:ST3_smx:INFO: List of broken channels: []
10:13:46:ST3_smx:INFO: Configuring SMX FAST
10:13:48:ST3_smx:INFO: chip: 10-3 40.898880 C 1159.654860 mV
10:13:48:ST3_smx:INFO: Electrons
10:13:48:ST3_smx:INFO: # loops 0
10:13:50:ST3_smx:INFO: # loops 1
10:13:51:ST3_smx:INFO: # loops 2
10:13:53:ST3_smx:INFO: # loops 3
10:13:55:ST3_smx:INFO: # loops 4
10:13:56:ST3_smx:INFO: Total # of broken channels: 0
10:13:56:ST3_smx:INFO: List of broken channels: []
10:13:56:ST3_smx:INFO: Total # of broken channels: 0
10:13:56:ST3_smx:INFO: List of broken channels: []
10:13:56:ST3_smx:INFO: Configuring SMX FAST
10:13:58:ST3_smx:INFO: chip: 5-4 44.073563 C 1159.654860 mV
10:13:58:ST3_smx:INFO: Electrons
10:13:58:ST3_smx:INFO: # loops 0
10:14:00:ST3_smx:INFO: # loops 1
10:14:02:ST3_smx:INFO: # loops 2
10:14:03:ST3_smx:INFO: # loops 3
10:14:05:ST3_smx:INFO: # loops 4
10:14:06:ST3_smx:INFO: Total # of broken channels: 0
10:14:06:ST3_smx:INFO: List of broken channels: []
10:14:06:ST3_smx:INFO: Total # of broken channels: 0
10:14:06:ST3_smx:INFO: List of broken channels: []
10:14:07:ST3_smx:INFO: Configuring SMX FAST
10:14:09:ST3_smx:INFO: chip: 12-5 31.389742 C 1195.082160 mV
10:14:09:ST3_smx:INFO: Electrons
10:14:09:ST3_smx:INFO: # loops 0
10:14:10:ST3_smx:INFO: # loops 1
10:14:12:ST3_smx:INFO: # loops 2
10:14:13:ST3_smx:INFO: # loops 3
10:14:15:ST3_smx:INFO: # loops 4
10:14:16:ST3_smx:INFO: Total # of broken channels: 1
10:14:16:ST3_smx:INFO: List of broken channels: [0]
10:14:16:ST3_smx:INFO: Total # of broken channels: 1
10:14:16:ST3_smx:INFO: List of broken channels: [0]
10:14:17:ST3_smx:INFO: Configuring SMX FAST
10:14:19:ST3_smx:INFO: chip: 7-6 31.389742 C 1200.969315 mV
10:14:19:ST3_smx:INFO: Electrons
10:14:19:ST3_smx:INFO: # loops 0
10:14:20:ST3_smx:INFO: # loops 1
10:14:22:ST3_smx:INFO: # loops 2
10:14:23:ST3_smx:INFO: # loops 3
10:14:25:ST3_smx:INFO: # loops 4
10:14:27:ST3_smx:INFO: Total # of broken channels: 0
10:14:27:ST3_smx:INFO: List of broken channels: []
10:14:27:ST3_smx:INFO: Total # of broken channels: 0
10:14:27:ST3_smx:INFO: List of broken channels: []
10:14:27:ST3_smx:INFO: Configuring SMX FAST
10:14:29:ST3_smx:INFO: chip: 14-7 56.797143 C 1112.140140 mV
10:14:29:ST3_smx:INFO: Electrons
10:14:29:ST3_smx:INFO: # loops 0
10:14:31:ST3_smx:INFO: # loops 1
10:14:32:ST3_smx:INFO: # loops 2
10:14:34:ST3_smx:INFO: # loops 3
10:14:35:ST3_smx:INFO: # loops 4
10:14:37:ST3_smx:INFO: Total # of broken channels: 1
10:14:37:ST3_smx:INFO: List of broken channels: [126]
10:14:37:ST3_smx:INFO: Total # of broken channels: 1
10:14:37:ST3_smx:INFO: List of broken channels: [126]
10:14:37:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:14:38:febtest:INFO: 1-0 | XA-000-08-002-000-001-195-12 | 34.6 | 1183.3
10:14:38:febtest:INFO: 8-1 | XA-000-08-002-000-001-187-00 | 40.9 | 1153.7
10:14:38:febtest:INFO: 3-2 | XA-000-08-002-000-001-196-12 | 37.7 | 1183.3
10:14:38:febtest:INFO: 10-3 | XA-000-08-002-000-001-178-00 | 40.9 | 1165.6
10:14:39:febtest:INFO: 5-4 | XA-000-08-002-000-001-200-12 | 44.1 | 1159.7
10:14:39:febtest:INFO: 12-5 | XA-000-08-002-000-001-158-14 | 31.4 | 1195.1
10:14:39:febtest:INFO: 7-6 | XA-000-08-002-000-001-188-00 | 34.6 | 1201.0
10:14:39:febtest:INFO: 14-7 | XA-000-08-002-000-001-197-12 | 56.8 | 1112.1
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_01_18-10_12_34
OPERATOR : Kerstin S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4UL401032 M4UL4T3010323B2 124 C
FEB_SN : 1075
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:
MODULE_NAME: L4UL401032 M4UL4T3010323B2 124 C
MODULE_TYPE:
MODULE_LADDER:
MODULE_MODULE:
MODULE_SIZE: 0
MODULE_GRADE:
---------------------------------------
VI_before_Init : ['2.450', '1.8880', '1.851', '0.4111', '7.000', '1.5790', '7.000', '1.5790']
VI_after__Init : ['2.450', '2.0280', '1.850', '0.6263', '7.000', '1.5800', '7.000', '1.5800']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
10:16:31:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1075/TestDate_2024_01_18-10_12_34/