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FEB_1076 31.01.24 15:21:30
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15:21:26:febtest:INFO: FEB 8-2 selected
15:21:26:smx_tester:INFO: Setting Elink clock mode to 160 MHz
15:21:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:21:30:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
15:21:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:21:30:febtest:INFO: Testing FEB with SN 1076
15:21:32:smx_tester:INFO: Scanning setup
15:21:32:elinks:INFO: Disabling clock on downlink 0
15:21:32:elinks:INFO: Disabling clock on downlink 1
15:21:32:elinks:INFO: Disabling clock on downlink 2
15:21:32:elinks:INFO: Disabling clock on downlink 3
15:21:32:elinks:INFO: Disabling clock on downlink 4
15:21:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:21:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:21:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:21:32:elinks:INFO: Disabling clock on downlink 0
15:21:32:elinks:INFO: Disabling clock on downlink 1
15:21:32:elinks:INFO: Disabling clock on downlink 2
15:21:32:elinks:INFO: Disabling clock on downlink 3
15:21:32:elinks:INFO: Disabling clock on downlink 4
15:21:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:21:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:21:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
15:21:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
15:21:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
15:21:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
15:21:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
15:21:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
15:21:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
15:21:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
15:21:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:21:32:elinks:INFO: Disabling clock on downlink 0
15:21:32:elinks:INFO: Disabling clock on downlink 1
15:21:32:elinks:INFO: Disabling clock on downlink 2
15:21:32:elinks:INFO: Disabling clock on downlink 3
15:21:32:elinks:INFO: Disabling clock on downlink 4
15:21:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:21:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:21:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:21:33:elinks:INFO: Disabling clock on downlink 0
15:21:33:elinks:INFO: Disabling clock on downlink 1
15:21:33:elinks:INFO: Disabling clock on downlink 2
15:21:33:elinks:INFO: Disabling clock on downlink 3
15:21:33:elinks:INFO: Disabling clock on downlink 4
15:21:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:21:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:21:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:21:33:elinks:INFO: Disabling clock on downlink 0
15:21:33:elinks:INFO: Disabling clock on downlink 1
15:21:33:elinks:INFO: Disabling clock on downlink 2
15:21:33:elinks:INFO: Disabling clock on downlink 3
15:21:33:elinks:INFO: Disabling clock on downlink 4
15:21:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:21:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:21:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:21:33:setup_element:INFO: Scanning clock phase
15:21:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:21:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:21:33:setup_element:INFO: Clock phase scan results for group 0, downlink 1
15:21:33:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXXXX__
Clock Delay: 32
15:21:33:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXXXX__
Clock Delay: 32
15:21:33:setup_element:INFO: Eye window for uplink 10: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
15:21:33:setup_element:INFO: Eye window for uplink 11: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
15:21:33:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
15:21:33:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
15:21:33:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
15:21:33:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
15:21:33:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
15:21:33:setup_element:INFO: Scanning data phases
15:21:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:21:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:21:39:setup_element:INFO: Data phase scan results for group 0, downlink 1
15:21:39:setup_element:INFO: Eye window for uplink 8 : _____________________________XXXX_______
Data delay found: 10
15:21:39:setup_element:INFO: Eye window for uplink 9 : _________________________________XXXXXX_
Data delay found: 15
15:21:39:setup_element:INFO: Eye window for uplink 10: _____________________________XXXXXX_____
Data delay found: 11
15:21:39:setup_element:INFO: Eye window for uplink 11: _________________________________XXXXX__
Data delay found: 15
15:21:39:setup_element:INFO: Eye window for uplink 12: _______________________________XXXXX____
Data delay found: 13
15:21:39:setup_element:INFO: Eye window for uplink 13: __________________________________XXXXX_
Data delay found: 16
15:21:39:setup_element:INFO: Eye window for uplink 14: ________________________________XXXXX___
Data delay found: 14
15:21:39:setup_element:INFO: Eye window for uplink 15: X_________________________________XXXX__
Data delay found: 17
15:21:39:setup_element:INFO: Setting the data phase to 10 for uplink 8
15:21:39:setup_element:INFO: Setting the data phase to 15 for uplink 9
15:21:39:setup_element:INFO: Setting the data phase to 11 for uplink 10
15:21:39:setup_element:INFO: Setting the data phase to 15 for uplink 11
15:21:39:setup_element:INFO: Setting the data phase to 13 for uplink 12
15:21:39:setup_element:INFO: Setting the data phase to 16 for uplink 13
15:21:39:setup_element:INFO: Setting the data phase to 14 for uplink 14
15:21:39:setup_element:INFO: Setting the data phase to 17 for uplink 15
15:21:39:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 8: ____________________________________________________________________XXXXXXXXXX__
Uplink 9: ____________________________________________________________________XXXXXXXXXX__
Uplink 10: ____________________________________________________________________XXXXXXXX____
Uplink 11: ____________________________________________________________________XXXXXXXX____
Uplink 12: ______________________________________________________________________XXXXXXX___
Uplink 13: ______________________________________________________________________XXXXXXX___
Uplink 14: _____________________________________________________________________XXXXXXXX___
Uplink 15: _____________________________________________________________________XXXXXXXX___
Data phase characteristics:
Uplink 8:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 9:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 10:
Optimal Phase: 11
Window Length: 34
Eye Window: _____________________________XXXXXX_____
Uplink 11:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 12:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 13:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 14:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 15:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXX__
]
15:21:39:setup_element:INFO: Beginning SMX ASICs map scan
15:21:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:21:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:21:39:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
15:21:39:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
15:21:39:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
15:21:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
15:21:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
15:21:39:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
15:21:39:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
15:21:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
15:21:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
15:21:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
15:21:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
15:21:41:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 70
Eye Windows:
Uplink 8: ____________________________________________________________________XXXXXXXXXX__
Uplink 9: ____________________________________________________________________XXXXXXXXXX__
Uplink 10: ____________________________________________________________________XXXXXXXX____
Uplink 11: ____________________________________________________________________XXXXXXXX____
Uplink 12: ______________________________________________________________________XXXXXXX___
Uplink 13: ______________________________________________________________________XXXXXXX___
Uplink 14: _____________________________________________________________________XXXXXXXX___
Uplink 15: _____________________________________________________________________XXXXXXXX___
Data phase characteristics:
Uplink 8:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 9:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 10:
Optimal Phase: 11
Window Length: 34
Eye Window: _____________________________XXXXXX_____
Uplink 11:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 12:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 13:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 14:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 15:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXX__
15:21:41:setup_element:INFO: Performing Elink synchronization
15:21:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:21:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:21:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
15:21:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
15:21:41:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
15:21:41:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
15:21:42:ST3_emu:INFO: Number of chips: 4
addr | upli | dwnli | grp | uplinks | uplinks_map
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
15:21:43:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
15:21:43:febtest:INFO: 8-1 | XA-000-08-002-000-004-130-02 | 37.7 | 1195.1
15:21:43:febtest:INFO: 10-3 | XA-000-08-002-000-004-151-05 | 28.2 | 1212.7
15:21:43:febtest:INFO: 12-5 | XA-000-08-002-000-004-146-05 | 37.7 | 1183.3
15:21:44:febtest:INFO: 14-7 | XA-000-08-002-000-004-154-05 | 37.7 | 1189.2
15:21:44:ST3_smx:INFO: Configuring SMX FAST
15:21:46:ST3_smx:INFO: chip: 8-1 40.898880 C 1171.483840 mV
15:21:46:ST3_smx:INFO: Electrons
15:21:46:ST3_smx:INFO: # loops 0
15:21:47:ST3_smx:INFO: # loops 1
15:21:49:ST3_smx:INFO: # loops 2
15:21:51:ST3_smx:INFO: # loops 3
15:21:52:ST3_smx:INFO: # loops 4
15:21:54:ST3_smx:INFO: Total # of broken channels: 0
15:21:54:ST3_smx:INFO: List of broken channels: []
15:21:54:ST3_smx:INFO: Total # of broken channels: 0
15:21:54:ST3_smx:INFO: List of broken channels: []
15:21:55:ST3_smx:INFO: Configuring SMX FAST
15:21:56:ST3_smx:INFO: chip: 10-3 28.225000 C 1218.600960 mV
15:21:56:ST3_smx:INFO: Electrons
15:21:57:ST3_smx:INFO: # loops 0
15:21:58:ST3_smx:INFO: # loops 1
15:22:00:ST3_smx:INFO: # loops 2
15:22:01:ST3_smx:INFO: # loops 3
15:22:03:ST3_smx:INFO: # loops 4
15:22:04:ST3_smx:INFO: Total # of broken channels: 0
15:22:04:ST3_smx:INFO: List of broken channels: []
15:22:04:ST3_smx:INFO: Total # of broken channels: 0
15:22:04:ST3_smx:INFO: List of broken channels: []
15:22:05:ST3_smx:INFO: Configuring SMX FAST
15:22:07:ST3_smx:INFO: chip: 12-5 34.556970 C 1200.969315 mV
15:22:07:ST3_smx:INFO: Electrons
15:22:07:ST3_smx:INFO: # loops 0
15:22:09:ST3_smx:INFO: # loops 1
15:22:10:ST3_smx:INFO: # loops 2
15:22:12:ST3_smx:INFO: # loops 3
15:22:13:ST3_smx:INFO: # loops 4
15:22:15:ST3_smx:INFO: Total # of broken channels: 0
15:22:15:ST3_smx:INFO: List of broken channels: []
15:22:15:ST3_smx:INFO: Total # of broken channels: 0
15:22:15:ST3_smx:INFO: List of broken channels: []
15:22:16:ST3_smx:INFO: Configuring SMX FAST
15:22:18:ST3_smx:INFO: chip: 14-7 31.389742 C 1212.728715 mV
15:22:18:ST3_smx:INFO: Electrons
15:22:18:ST3_smx:INFO: # loops 0
15:22:20:ST3_smx:INFO: # loops 1
15:22:21:ST3_smx:INFO: # loops 2
15:22:23:ST3_smx:INFO: # loops 3
15:22:24:ST3_smx:INFO: # loops 4
15:22:26:ST3_smx:INFO: Total # of broken channels: 0
15:22:26:ST3_smx:INFO: List of broken channels: []
15:22:26:ST3_smx:INFO: Total # of broken channels: 0
15:22:26:ST3_smx:INFO: List of broken channels: []
15:22:27:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
15:22:27:febtest:INFO: 8-1 | XA-000-08-002-000-004-130-02 | 40.9 | 1171.5
15:22:27:febtest:INFO: 10-3 | XA-000-08-002-000-004-151-05 | 28.2 | 1218.6
15:22:27:febtest:INFO: 12-5 | XA-000-08-002-000-004-146-05 | 34.6 | 1201.0
15:22:28:febtest:INFO: 14-7 | XA-000-08-002-000-004-154-05 | 31.4 | 1212.7
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_31-15_21_30
OPERATOR : Robert V.; Irakli K.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 1076
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.450', '1.0040', '1.850', '1.2880', '2.450', '0.0002', '1.850', '0.0001']
VI_after__Init : ['0', '0', '0', '0', '0', '0']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
15:22:33:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1076/TestDate_2024_01_31-15_21_30/