12:39:04:febtest:INFO:	FEB 8-2 selected
12:39:04:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
12:39:07:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:39:07:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
12:39:07:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:39:07:febtest:INFO:	Testing FEB with SN 1077
12:39:09:smx_tester:INFO:	Scanning setup
12:39:09:elinks:INFO:	Disabling clock on downlink 0
12:39:09:elinks:INFO:	Disabling clock on downlink 1
12:39:09:elinks:INFO:	Disabling clock on downlink 2
12:39:09:elinks:INFO:	Disabling clock on downlink 3
12:39:09:elinks:INFO:	Disabling clock on downlink 4
12:39:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:39:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:39:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:39:09:elinks:INFO:	Disabling clock on downlink 0
12:39:09:elinks:INFO:	Disabling clock on downlink 1
12:39:09:elinks:INFO:	Disabling clock on downlink 2
12:39:09:elinks:INFO:	Disabling clock on downlink 3
12:39:09:elinks:INFO:	Disabling clock on downlink 4
12:39:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:39:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:39:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
12:39:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
12:39:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
12:39:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
12:39:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
12:39:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
12:39:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
12:39:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
12:39:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
12:39:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
12:39:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
12:39:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
12:39:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
12:39:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
12:39:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
12:39:09:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
12:39:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:39:09:elinks:INFO:	Disabling clock on downlink 0
12:39:09:elinks:INFO:	Disabling clock on downlink 1
12:39:09:elinks:INFO:	Disabling clock on downlink 2
12:39:09:elinks:INFO:	Disabling clock on downlink 3
12:39:09:elinks:INFO:	Disabling clock on downlink 4
12:39:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:39:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:39:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:39:09:elinks:INFO:	Disabling clock on downlink 0
12:39:09:elinks:INFO:	Disabling clock on downlink 1
12:39:09:elinks:INFO:	Disabling clock on downlink 2
12:39:09:elinks:INFO:	Disabling clock on downlink 3
12:39:09:elinks:INFO:	Disabling clock on downlink 4
12:39:09:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:39:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
12:39:09:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:39:09:elinks:INFO:	Disabling clock on downlink 0
12:39:09:elinks:INFO:	Disabling clock on downlink 1
12:39:10:elinks:INFO:	Disabling clock on downlink 2
12:39:10:elinks:INFO:	Disabling clock on downlink 3
12:39:10:elinks:INFO:	Disabling clock on downlink 4
12:39:10:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:39:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
12:39:10:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:39:10:setup_element:INFO:	Scanning clock phase
12:39:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:39:10:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:39:10:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
12:39:10:setup_element:INFO:	Eye window for uplink 0 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
12:39:10:setup_element:INFO:	Eye window for uplink 1 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
12:39:10:setup_element:INFO:	Eye window for uplink 2 : X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
12:39:10:setup_element:INFO:	Eye window for uplink 3 : X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
12:39:10:setup_element:INFO:	Eye window for uplink 4 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
12:39:10:setup_element:INFO:	Eye window for uplink 5 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
12:39:10:setup_element:INFO:	Eye window for uplink 6 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
12:39:10:setup_element:INFO:	Eye window for uplink 7 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
12:39:10:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
12:39:10:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
12:39:10:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
12:39:10:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
12:39:10:setup_element:INFO:	Eye window for uplink 12: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
12:39:10:setup_element:INFO:	Eye window for uplink 13: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
12:39:10:setup_element:INFO:	Eye window for uplink 14: ______________________________________________________________________XXXXXX____
Clock Delay: 32
12:39:10:setup_element:INFO:	Eye window for uplink 15: ______________________________________________________________________XXXXXX____
Clock Delay: 32
12:39:10:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 1
12:39:10:setup_element:INFO:	Scanning data phases
12:39:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:39:10:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:39:16:setup_element:INFO:	Data phase scan results for group 0, downlink 1
12:39:16:setup_element:INFO:	Eye window for uplink 0 : _____________XXXXX______________________
Data delay found: 35
12:39:16:setup_element:INFO:	Eye window for uplink 1 : _________XXXXX__________________________
Data delay found: 31
12:39:16:setup_element:INFO:	Eye window for uplink 2 : _________XXXXXX_________________________
Data delay found: 31
12:39:16:setup_element:INFO:	Eye window for uplink 3 : ______XXXXXX____________________________
Data delay found: 28
12:39:16:setup_element:INFO:	Eye window for uplink 4 : ______XXXXXXX___________________________
Data delay found: 29
12:39:16:setup_element:INFO:	Eye window for uplink 5 : ___XXXXX________________________________
Data delay found: 25
12:39:16:setup_element:INFO:	Eye window for uplink 6 : X___________________________________XXXX
Data delay found: 18
12:39:16:setup_element:INFO:	Eye window for uplink 7 : ________________________________XXXXX___
Data delay found: 14
12:39:16:setup_element:INFO:	Eye window for uplink 8 : ________________________XXXXX___________
Data delay found: 6
12:39:16:setup_element:INFO:	Eye window for uplink 9 : _____________________________XXXXX______
Data delay found: 11
12:39:16:setup_element:INFO:	Eye window for uplink 10: _________________________XXXXX__________
Data delay found: 7
12:39:16:setup_element:INFO:	Eye window for uplink 11: ____________________________XXXXX_______
Data delay found: 10
12:39:16:setup_element:INFO:	Eye window for uplink 12: ___________________________XXXXX________
Data delay found: 9
12:39:16:setup_element:INFO:	Eye window for uplink 13: ______________________________XXXXX_____
Data delay found: 12
12:39:16:setup_element:INFO:	Eye window for uplink 14: __________________________XXXXXX________
Data delay found: 8
12:39:16:setup_element:INFO:	Eye window for uplink 15: ____________________________XXXXXX______
Data delay found: 10
12:39:16:setup_element:INFO:	Setting the data phase to 35 for uplink 0
12:39:16:setup_element:INFO:	Setting the data phase to 31 for uplink 1
12:39:16:setup_element:INFO:	Setting the data phase to 31 for uplink 2
12:39:16:setup_element:INFO:	Setting the data phase to 28 for uplink 3
12:39:16:setup_element:INFO:	Setting the data phase to 29 for uplink 4
12:39:16:setup_element:INFO:	Setting the data phase to 25 for uplink 5
12:39:16:setup_element:INFO:	Setting the data phase to 18 for uplink 6
12:39:16:setup_element:INFO:	Setting the data phase to 14 for uplink 7
12:39:16:setup_element:INFO:	Setting the data phase to 6 for uplink 8
12:39:16:setup_element:INFO:	Setting the data phase to 11 for uplink 9
12:39:16:setup_element:INFO:	Setting the data phase to 7 for uplink 10
12:39:16:setup_element:INFO:	Setting the data phase to 10 for uplink 11
12:39:16:setup_element:INFO:	Setting the data phase to 9 for uplink 12
12:39:16:setup_element:INFO:	Setting the data phase to 12 for uplink 13
12:39:16:setup_element:INFO:	Setting the data phase to 8 for uplink 14
12:39:16:setup_element:INFO:	Setting the data phase to 10 for uplink 15
12:39:16:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 68
    Eye Windows:
      Uplink  0: _________________________________________________________________________XXXXXXX
      Uplink  1: _________________________________________________________________________XXXXXXX
      Uplink  2: X_______________________________________________________________________XXXXXXXX
      Uplink  3: X_______________________________________________________________________XXXXXXXX
      Uplink  4: ________________________________________________________________________XXXXXXXX
      Uplink  5: ________________________________________________________________________XXXXXXXX
      Uplink  6: _______________________________________________________________________XXXXXX___
      Uplink  7: _______________________________________________________________________XXXXXX___
      Uplink  8: _____________________________________________________________________XXXXXXXX___
      Uplink  9: _____________________________________________________________________XXXXXXXX___
      Uplink 10: _____________________________________________________________________XXXXXXXX___
      Uplink 11: _____________________________________________________________________XXXXXXXX___
      Uplink 12: ______________________________________________________________________XXXXXXXX__
      Uplink 13: ______________________________________________________________________XXXXXXXX__
      Uplink 14: ______________________________________________________________________XXXXXX____
      Uplink 15: ______________________________________________________________________XXXXXX____
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 1:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 2:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 3:
      Optimal Phase: 28
      Window Length: 34
      Eye Window: ______XXXXXX____________________________
    Uplink 4:
      Optimal Phase: 29
      Window Length: 33
      Eye Window: ______XXXXXXX___________________________
    Uplink 5:
      Optimal Phase: 25
      Window Length: 35
      Eye Window: ___XXXXX________________________________
    Uplink 6:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 7:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 8:
      Optimal Phase: 6
      Window Length: 35
      Eye Window: ________________________XXXXX___________
    Uplink 9:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
    Uplink 10:
      Optimal Phase: 7
      Window Length: 35
      Eye Window: _________________________XXXXX__________
    Uplink 11:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 12:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 13:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 14:
      Optimal Phase: 8
      Window Length: 34
      Eye Window: __________________________XXXXXX________
    Uplink 15:
      Optimal Phase: 10
      Window Length: 34
      Eye Window: ____________________________XXXXXX______
]
12:39:16:setup_element:INFO:	Beginning SMX ASICs map scan
12:39:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:39:16:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:39:16:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
12:39:16:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
12:39:16:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
12:39:16:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
12:39:16:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
12:39:16:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
12:39:16:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
12:39:16:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
12:39:16:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
12:39:16:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
12:39:16:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
12:39:17:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
12:39:17:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
12:39:17:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
12:39:17:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
12:39:17:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
12:39:17:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
12:39:17:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
12:39:17:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
12:39:18:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 68
    Eye Windows:
      Uplink  0: _________________________________________________________________________XXXXXXX
      Uplink  1: _________________________________________________________________________XXXXXXX
      Uplink  2: X_______________________________________________________________________XXXXXXXX
      Uplink  3: X_______________________________________________________________________XXXXXXXX
      Uplink  4: ________________________________________________________________________XXXXXXXX
      Uplink  5: ________________________________________________________________________XXXXXXXX
      Uplink  6: _______________________________________________________________________XXXXXX___
      Uplink  7: _______________________________________________________________________XXXXXX___
      Uplink  8: _____________________________________________________________________XXXXXXXX___
      Uplink  9: _____________________________________________________________________XXXXXXXX___
      Uplink 10: _____________________________________________________________________XXXXXXXX___
      Uplink 11: _____________________________________________________________________XXXXXXXX___
      Uplink 12: ______________________________________________________________________XXXXXXXX__
      Uplink 13: ______________________________________________________________________XXXXXXXX__
      Uplink 14: ______________________________________________________________________XXXXXX____
      Uplink 15: ______________________________________________________________________XXXXXX____
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 1:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 2:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 3:
      Optimal Phase: 28
      Window Length: 34
      Eye Window: ______XXXXXX____________________________
    Uplink 4:
      Optimal Phase: 29
      Window Length: 33
      Eye Window: ______XXXXXXX___________________________
    Uplink 5:
      Optimal Phase: 25
      Window Length: 35
      Eye Window: ___XXXXX________________________________
    Uplink 6:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 7:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 8:
      Optimal Phase: 6
      Window Length: 35
      Eye Window: ________________________XXXXX___________
    Uplink 9:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
    Uplink 10:
      Optimal Phase: 7
      Window Length: 35
      Eye Window: _________________________XXXXX__________
    Uplink 11:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 12:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 13:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 14:
      Optimal Phase: 8
      Window Length: 34
      Eye Window: __________________________XXXXXX________
    Uplink 15:
      Optimal Phase: 10
      Window Length: 34
      Eye Window: ____________________________XXXXXX______

12:39:18:setup_element:INFO:	Performing Elink synchronization
12:39:18:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:39:19:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:39:19:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
12:39:19:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
12:39:19:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
12:39:19:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
12:39:19:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   2  |   [0]   |  1  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   6  |   [0]   |  1  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
12:39:19:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
12:39:20:febtest:INFO:	1-0 | XA-000-08-002-001-007-191-13 |  25.1 | 1218.6
12:39:20:febtest:INFO:	8-1 | XA-000-08-002-001-007-223-06 |  25.1 | 1224.5
12:39:20:febtest:INFO:	3-2 | XA-000-08-002-001-007-184-13 |  25.1 | 1218.6
12:39:20:febtest:INFO:	10-3 | XA-000-08-002-001-007-229-15 |  21.9 | 1218.6
12:39:21:febtest:INFO:	5-4 | XA-000-08-002-001-007-194-01 |  31.4 | 1201.0
12:39:21:febtest:INFO:	12-5 | XA-000-08-002-001-007-219-06 |  25.1 | 1218.6
12:39:21:febtest:INFO:	7-6 | XA-000-08-002-001-007-203-01 |  34.6 | 1189.2
12:39:21:febtest:INFO:	14-7 | XA-000-08-002-001-007-221-06 |  34.6 | 1189.2
12:39:21:ST3_smx:INFO:	Configuring SMX FAST
12:39:23:ST3_smx:INFO:	chip: 1-0 	 37.726682 C 	 1177.390875 mV
12:39:23:ST3_smx:INFO:		Electrons
12:39:23:ST3_smx:INFO:	# loops 0
12:39:25:ST3_smx:INFO:	# loops 1
12:39:27:ST3_smx:INFO:	# loops 2
12:39:28:ST3_smx:INFO:	# loops 3
12:39:30:ST3_smx:INFO:	# loops 4
12:39:32:ST3_smx:INFO:	Total # of broken channels: 0
12:39:32:ST3_smx:INFO:	List of broken channels: []
12:39:32:ST3_smx:INFO:	Total # of broken channels: 1
12:39:32:ST3_smx:INFO:	List of broken channels: [102]
12:39:32:ST3_smx:INFO:	Configuring SMX FAST
12:39:34:ST3_smx:INFO:	chip: 8-1 	 31.389742 C 	 1195.082160 mV
12:39:34:ST3_smx:INFO:		Electrons
12:39:34:ST3_smx:INFO:	# loops 0
12:39:36:ST3_smx:INFO:	# loops 1
12:39:37:ST3_smx:INFO:	# loops 2
12:39:39:ST3_smx:INFO:	# loops 3
12:39:41:ST3_smx:INFO:	# loops 4
12:39:42:ST3_smx:INFO:	Total # of broken channels: 0
12:39:42:ST3_smx:INFO:	List of broken channels: []
12:39:42:ST3_smx:INFO:	Total # of broken channels: 0
12:39:42:ST3_smx:INFO:	List of broken channels: []
12:39:43:ST3_smx:INFO:	Configuring SMX FAST
12:39:45:ST3_smx:INFO:	chip: 3-2 	 34.556970 C 	 1195.082160 mV
12:39:45:ST3_smx:INFO:		Electrons
12:39:45:ST3_smx:INFO:	# loops 0
12:39:47:ST3_smx:INFO:	# loops 1
12:39:48:ST3_smx:INFO:	# loops 2
12:39:50:ST3_smx:INFO:	# loops 3
12:39:51:ST3_smx:INFO:	# loops 4
12:39:53:ST3_smx:INFO:	Total # of broken channels: 0
12:39:53:ST3_smx:INFO:	List of broken channels: []
12:39:53:ST3_smx:INFO:	Total # of broken channels: 0
12:39:53:ST3_smx:INFO:	List of broken channels: []
12:39:54:ST3_smx:INFO:	Configuring SMX FAST
12:39:56:ST3_smx:INFO:	chip: 10-3 	 25.062742 C 	 1218.600960 mV
12:39:56:ST3_smx:INFO:		Electrons
12:39:56:ST3_smx:INFO:	# loops 0
12:39:57:ST3_smx:INFO:	# loops 1
12:39:59:ST3_smx:INFO:	# loops 2
12:40:01:ST3_smx:INFO:	# loops 3
12:40:02:ST3_smx:INFO:	# loops 4
12:40:04:ST3_smx:INFO:	Total # of broken channels: 0
12:40:04:ST3_smx:INFO:	List of broken channels: []
12:40:04:ST3_smx:INFO:	Total # of broken channels: 0
12:40:04:ST3_smx:INFO:	List of broken channels: []
12:40:04:ST3_smx:INFO:	Configuring SMX FAST
12:40:06:ST3_smx:INFO:	chip: 5-4 	 34.556970 C 	 1189.190035 mV
12:40:06:ST3_smx:INFO:		Electrons
12:40:06:ST3_smx:INFO:	# loops 0
12:40:08:ST3_smx:INFO:	# loops 1
12:40:10:ST3_smx:INFO:	# loops 2
12:40:11:ST3_smx:INFO:	# loops 3
12:40:13:ST3_smx:INFO:	# loops 4
12:40:14:ST3_smx:INFO:	Total # of broken channels: 0
12:40:14:ST3_smx:INFO:	List of broken channels: []
12:40:14:ST3_smx:INFO:	Total # of broken channels: 0
12:40:14:ST3_smx:INFO:	List of broken channels: []
12:40:15:ST3_smx:INFO:	Configuring SMX FAST
12:40:17:ST3_smx:INFO:	chip: 12-5 	 31.389742 C 	 1206.851500 mV
12:40:17:ST3_smx:INFO:		Electrons
12:40:17:ST3_smx:INFO:	# loops 0
12:40:19:ST3_smx:INFO:	# loops 1
12:40:20:ST3_smx:INFO:	# loops 2
12:40:22:ST3_smx:INFO:	# loops 3
12:40:24:ST3_smx:INFO:	# loops 4
12:40:25:ST3_smx:INFO:	Total # of broken channels: 1
12:40:25:ST3_smx:INFO:	List of broken channels: [65]
12:40:25:ST3_smx:INFO:	Total # of broken channels: 3
12:40:25:ST3_smx:INFO:	List of broken channels: [19, 31, 65]
12:40:26:ST3_smx:INFO:	Configuring SMX FAST
12:40:28:ST3_smx:INFO:	chip: 7-6 	 34.556970 C 	 1195.082160 mV
12:40:28:ST3_smx:INFO:		Electrons
12:40:28:ST3_smx:INFO:	# loops 0
12:40:30:ST3_smx:INFO:	# loops 1
12:40:31:ST3_smx:INFO:	# loops 2
12:40:33:ST3_smx:INFO:	# loops 3
12:40:35:ST3_smx:INFO:	# loops 4
12:40:36:ST3_smx:INFO:	Total # of broken channels: 0
12:40:36:ST3_smx:INFO:	List of broken channels: []
12:40:36:ST3_smx:INFO:	Total # of broken channels: 0
12:40:36:ST3_smx:INFO:	List of broken channels: []
12:40:37:ST3_smx:INFO:	Configuring SMX FAST
12:40:39:ST3_smx:INFO:	chip: 14-7 	 37.726682 C 	 1189.190035 mV
12:40:39:ST3_smx:INFO:		Electrons
12:40:39:ST3_smx:INFO:	# loops 0
12:40:40:ST3_smx:INFO:	# loops 1
12:40:42:ST3_smx:INFO:	# loops 2
12:40:44:ST3_smx:INFO:	# loops 3
12:40:45:ST3_smx:INFO:	# loops 4
12:40:47:ST3_smx:INFO:	Total # of broken channels: 0
12:40:47:ST3_smx:INFO:	List of broken channels: []
12:40:47:ST3_smx:INFO:	Total # of broken channels: 0
12:40:47:ST3_smx:INFO:	List of broken channels: []
12:40:48:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
12:40:48:febtest:INFO:	1-0 | XA-000-08-002-001-007-191-13 |  37.7 | 1177.4
12:40:48:febtest:INFO:	8-1 | XA-000-08-002-001-007-223-06 |  31.4 | 1195.1
12:40:48:febtest:INFO:	3-2 | XA-000-08-002-001-007-184-13 |  34.6 | 1195.1
12:40:49:febtest:INFO:	10-3 | XA-000-08-002-001-007-229-15 |  25.1 | 1218.6
12:40:49:febtest:INFO:	5-4 | XA-000-08-002-001-007-194-01 |  37.7 | 1189.2
12:40:49:febtest:INFO:	12-5 | XA-000-08-002-001-007-219-06 |  31.4 | 1206.9
12:40:49:febtest:INFO:	7-6 | XA-000-08-002-001-007-203-01 |  34.6 | 1195.1
12:40:49:febtest:INFO:	14-7 | XA-000-08-002-001-007-221-06 |  37.7 | 1189.2
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_05-12_39_07
OPERATOR  : Oleksandr S.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L4UL201031 M4UL2B3010313A2 62 B

FEB_SN : 1077
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.448', '1.4950', '1.845', '2.7110', '7.000', '1.5450', '7.000', '1.5450']
VI_after__Init : ['2.450', '2.0070', '1.850', '0.5850', '7.000', '1.5510', '7.000', '1.5510']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
12:40:51:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_1077/TestDate_2024_01_05-12_39_07/