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FEB_1078 05.01.24 10:12:19
Info
10:12:12:febtest:INFO: FEB 8-2 selected
10:12:12:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:12:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:12:19:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
10:12:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:12:20:febtest:INFO: Testing FEB with SN 1078
10:12:21:smx_tester:INFO: Scanning setup
10:12:21:elinks:INFO: Disabling clock on downlink 0
10:12:21:elinks:INFO: Disabling clock on downlink 1
10:12:21:elinks:INFO: Disabling clock on downlink 2
10:12:21:elinks:INFO: Disabling clock on downlink 3
10:12:21:elinks:INFO: Disabling clock on downlink 4
10:12:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:12:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:12:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:12:21:elinks:INFO: Disabling clock on downlink 0
10:12:21:elinks:INFO: Disabling clock on downlink 1
10:12:21:elinks:INFO: Disabling clock on downlink 2
10:12:21:elinks:INFO: Disabling clock on downlink 3
10:12:21:elinks:INFO: Disabling clock on downlink 4
10:12:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:12:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:12:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:12:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:12:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:12:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:12:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:12:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:12:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:12:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:12:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:12:21:elinks:INFO: Disabling clock on downlink 0
10:12:21:elinks:INFO: Disabling clock on downlink 1
10:12:21:elinks:INFO: Disabling clock on downlink 2
10:12:21:elinks:INFO: Disabling clock on downlink 3
10:12:21:elinks:INFO: Disabling clock on downlink 4
10:12:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:12:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:12:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:12:21:elinks:INFO: Disabling clock on downlink 0
10:12:21:elinks:INFO: Disabling clock on downlink 1
10:12:21:elinks:INFO: Disabling clock on downlink 2
10:12:21:elinks:INFO: Disabling clock on downlink 3
10:12:21:elinks:INFO: Disabling clock on downlink 4
10:12:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:12:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:12:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:12:22:elinks:INFO: Disabling clock on downlink 0
10:12:22:elinks:INFO: Disabling clock on downlink 1
10:12:22:elinks:INFO: Disabling clock on downlink 2
10:12:22:elinks:INFO: Disabling clock on downlink 3
10:12:22:elinks:INFO: Disabling clock on downlink 4
10:12:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:12:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:12:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:12:22:setup_element:INFO: Scanning clock phase
10:12:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:12:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:12:22:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:12:22:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:12:22:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:12:22:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:12:22:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:12:22:setup_element:INFO: Eye window for uplink 12: X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
10:12:22:setup_element:INFO: Eye window for uplink 13: X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
10:12:22:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXXXXX
Clock Delay: 36
10:12:22:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXXXXX
Clock Delay: 36
10:12:22:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
10:12:22:setup_element:INFO: Scanning data phases
10:12:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:12:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:12:27:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:12:27:setup_element:INFO: Eye window for uplink 8 : ___________________________XXXX_________
Data delay found: 8
10:12:27:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXXX____
Data delay found: 13
10:12:28:setup_element:INFO: Eye window for uplink 10: ______________________________XXXXX_____
Data delay found: 12
10:12:28:setup_element:INFO: Eye window for uplink 11: __________________________________XXXXX_
Data delay found: 16
10:12:28:setup_element:INFO: Eye window for uplink 12: ________________________________XXXXX___
Data delay found: 14
10:12:28:setup_element:INFO: Eye window for uplink 13: XX_________________________________XXXXX
Data delay found: 18
10:12:28:setup_element:INFO: Eye window for uplink 14: ________________________________XXXXX___
Data delay found: 14
10:12:28:setup_element:INFO: Eye window for uplink 15: X_________________________________XXXXXX
Data delay found: 17
10:12:28:setup_element:INFO: Setting the data phase to 8 for uplink 8
10:12:28:setup_element:INFO: Setting the data phase to 13 for uplink 9
10:12:28:setup_element:INFO: Setting the data phase to 12 for uplink 10
10:12:28:setup_element:INFO: Setting the data phase to 16 for uplink 11
10:12:28:setup_element:INFO: Setting the data phase to 14 for uplink 12
10:12:28:setup_element:INFO: Setting the data phase to 18 for uplink 13
10:12:28:setup_element:INFO: Setting the data phase to 14 for uplink 14
10:12:28:setup_element:INFO: Setting the data phase to 17 for uplink 15
10:12:28:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 69
Eye Windows:
Uplink 8: ______________________________________________________________________XXXXXXXX__
Uplink 9: ______________________________________________________________________XXXXXXXX__
Uplink 10: _______________________________________________________________________XXXXXXXX_
Uplink 11: _______________________________________________________________________XXXXXXXX_
Uplink 12: X_______________________________________________________________________XXXXXXXX
Uplink 13: X_______________________________________________________________________XXXXXXXX
Uplink 14: _________________________________________________________________________XXXXXXX
Uplink 15: _________________________________________________________________________XXXXXXX
Data phase characteristics:
Uplink 8:
Optimal Phase: 8
Window Length: 36
Eye Window: ___________________________XXXX_________
Uplink 9:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 10:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 11:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 12:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 13:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 14:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 15:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
]
10:12:28:setup_element:INFO: Beginning SMX ASICs map scan
10:12:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:12:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:12:28:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:12:28:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:12:28:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
10:12:28:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:12:28:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:12:28:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:12:28:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:12:29:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:12:29:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:12:29:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:12:29:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:12:30:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 69
Eye Windows:
Uplink 8: ______________________________________________________________________XXXXXXXX__
Uplink 9: ______________________________________________________________________XXXXXXXX__
Uplink 10: _______________________________________________________________________XXXXXXXX_
Uplink 11: _______________________________________________________________________XXXXXXXX_
Uplink 12: X_______________________________________________________________________XXXXXXXX
Uplink 13: X_______________________________________________________________________XXXXXXXX
Uplink 14: _________________________________________________________________________XXXXXXX
Uplink 15: _________________________________________________________________________XXXXXXX
Data phase characteristics:
Uplink 8:
Optimal Phase: 8
Window Length: 36
Eye Window: ___________________________XXXX_________
Uplink 9:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 10:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 11:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 12:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 13:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 14:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 15:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXXX
10:12:30:setup_element:INFO: Performing Elink synchronization
10:12:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:12:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:12:30:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:12:30:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:12:30:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:12:30:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
10:12:31:ST3_emu:INFO: Number of chips: 4
addr | upli | dwnli | grp | uplinks | uplinks_map
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
10:12:31:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:12:31:febtest:INFO: 8-1 | XA-000-08-002-001-007-235-15 | 21.9 | 1224.5
10:12:31:febtest:INFO: 10-3 | XA-000-08-002-001-007-170-10 | 18.7 | 1236.2
10:12:32:febtest:INFO: 12-5 | XA-000-08-002-001-007-177-13 | 44.1 | 1159.7
10:12:32:febtest:INFO: 14-7 | XA-000-08-002-001-007-145-03 | 21.9 | 1224.5
10:12:32:ST3_smx:INFO: Configuring SMX FAST
10:12:34:ST3_smx:INFO: chip: 8-1 21.902970 C 1230.330540 mV
10:12:34:ST3_smx:INFO: Electrons
10:12:34:ST3_smx:INFO: # loops 0
10:12:36:ST3_smx:INFO: # loops 1
10:12:37:ST3_smx:INFO: # loops 2
10:12:39:ST3_smx:INFO: # loops 3
10:12:40:ST3_smx:INFO: # loops 4
10:12:42:ST3_smx:INFO: Total # of broken channels: 0
10:12:42:ST3_smx:INFO: List of broken channels: []
10:12:42:ST3_smx:INFO: Total # of broken channels: 0
10:12:42:ST3_smx:INFO: List of broken channels: []
10:12:43:ST3_smx:INFO: Configuring SMX FAST
10:12:45:ST3_smx:INFO: chip: 10-3 25.062742 C 1218.600960 mV
10:12:45:ST3_smx:INFO: Electrons
10:12:45:ST3_smx:INFO: # loops 0
10:12:46:ST3_smx:INFO: # loops 1
10:12:48:ST3_smx:INFO: # loops 2
10:12:50:ST3_smx:INFO: # loops 3
10:12:52:ST3_smx:INFO: # loops 4
10:12:53:ST3_smx:INFO: Total # of broken channels: 0
10:12:53:ST3_smx:INFO: List of broken channels: []
10:12:53:ST3_smx:INFO: Total # of broken channels: 3
10:12:53:ST3_smx:INFO: List of broken channels: [4, 8, 16]
10:12:54:ST3_smx:INFO: Configuring SMX FAST
10:12:56:ST3_smx:INFO: chip: 12-5 53.612520 C 1124.048640 mV
10:12:56:ST3_smx:INFO: Electrons
10:12:56:ST3_smx:INFO: # loops 0
10:12:57:ST3_smx:INFO: # loops 1
10:12:59:ST3_smx:INFO: # loops 2
10:13:00:ST3_smx:INFO: # loops 3
10:13:02:ST3_smx:INFO: # loops 4
10:13:04:ST3_smx:INFO: Total # of broken channels: 0
10:13:04:ST3_smx:INFO: List of broken channels: []
10:13:04:ST3_smx:INFO: Total # of broken channels: 0
10:13:04:ST3_smx:INFO: List of broken channels: []
10:13:04:ST3_smx:INFO: Configuring SMX FAST
10:13:06:ST3_smx:INFO: chip: 14-7 31.389742 C 1195.082160 mV
10:13:06:ST3_smx:INFO: Electrons
10:13:06:ST3_smx:INFO: # loops 0
10:13:08:ST3_smx:INFO: # loops 1
10:13:09:ST3_smx:INFO: # loops 2
10:13:11:ST3_smx:INFO: # loops 3
10:13:12:ST3_smx:INFO: # loops 4
10:13:14:ST3_smx:INFO: Total # of broken channels: 0
10:13:14:ST3_smx:INFO: List of broken channels: []
10:13:14:ST3_smx:INFO: Total # of broken channels: 0
10:13:14:ST3_smx:INFO: List of broken channels: []
10:13:15:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:13:15:febtest:INFO: 8-1 | XA-000-08-002-001-007-235-15 | 21.9 | 1230.3
10:13:15:febtest:INFO: 10-3 | XA-000-08-002-001-007-170-10 | 25.1 | 1218.6
10:13:15:febtest:INFO: 12-5 | XA-000-08-002-001-007-177-13 | 53.6 | 1124.0
10:13:15:febtest:INFO: 14-7 | XA-000-08-002-001-007-145-03 | 34.6 | 1195.1
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_05-10_12_19
OPERATOR : Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4UL201031 M4UL2B3010313A2 62 B
FEB_SN : 1078
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.449', '0.9250', '1.847', '1.1730', '7.000', '1.5490', '7.000', '1.5490']
VI_after__Init : ['2.450', '2.0070', '1.850', '0.5850', '7.000', '1.5510', '7.000', '1.5510']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
10:13:16:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1078/TestDate_2024_01_05-10_12_19/