
FEB_1079 05.01.24 12:57:15
TextEdit.txt
12:57:13:febtest:INFO: FEB 8-2 selected 12:57:13:smx_tester:INFO: Setting Elink clock mode to 160 MHz 12:57:15:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:57:15:ST3_Shared:INFO: -----------------------FEB-Microcable----------------------- 12:57:15:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:57:15:febtest:INFO: Testing FEB with SN 1079 12:57:17:smx_tester:INFO: Scanning setup 12:57:17:elinks:INFO: Disabling clock on downlink 0 12:57:17:elinks:INFO: Disabling clock on downlink 1 12:57:17:elinks:INFO: Disabling clock on downlink 2 12:57:17:elinks:INFO: Disabling clock on downlink 3 12:57:17:elinks:INFO: Disabling clock on downlink 4 12:57:17:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:57:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 12:57:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:57:17:elinks:INFO: Disabling clock on downlink 0 12:57:17:elinks:INFO: Disabling clock on downlink 1 12:57:17:elinks:INFO: Disabling clock on downlink 2 12:57:17:elinks:INFO: Disabling clock on downlink 3 12:57:17:elinks:INFO: Disabling clock on downlink 4 12:57:17:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:57:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 12:57:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 12:57:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 12:57:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 12:57:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 12:57:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 12:57:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 12:57:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 12:57:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 12:57:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 12:57:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 12:57:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 12:57:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 12:57:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 12:57:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 12:57:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 12:57:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 12:57:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:57:17:elinks:INFO: Disabling clock on downlink 0 12:57:17:elinks:INFO: Disabling clock on downlink 1 12:57:17:elinks:INFO: Disabling clock on downlink 2 12:57:17:elinks:INFO: Disabling clock on downlink 3 12:57:17:elinks:INFO: Disabling clock on downlink 4 12:57:17:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:57:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:57:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:57:17:elinks:INFO: Disabling clock on downlink 0 12:57:17:elinks:INFO: Disabling clock on downlink 1 12:57:17:elinks:INFO: Disabling clock on downlink 2 12:57:17:elinks:INFO: Disabling clock on downlink 3 12:57:17:elinks:INFO: Disabling clock on downlink 4 12:57:17:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:57:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 12:57:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:57:17:elinks:INFO: Disabling clock on downlink 0 12:57:17:elinks:INFO: Disabling clock on downlink 1 12:57:17:elinks:INFO: Disabling clock on downlink 2 12:57:17:elinks:INFO: Disabling clock on downlink 3 12:57:17:elinks:INFO: Disabling clock on downlink 4 12:57:17:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:57:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 12:57:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:57:18:setup_element:INFO: Scanning clock phase 12:57:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 12:57:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 12:57:18:setup_element:INFO: Clock phase scan results for group 0, downlink 1 12:57:18:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXXX Clock Delay: 35 12:57:18:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXXX Clock Delay: 35 12:57:18:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 12:57:18:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 12:57:18:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXX___ Clock Delay: 33 12:57:18:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXX___ Clock Delay: 33 12:57:18:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXX___ Clock Delay: 33 12:57:18:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXX___ Clock Delay: 33 12:57:18:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 12:57:18:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXX__ Clock Delay: 33 12:57:18:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 12:57:18:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 12:57:18:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 12:57:18:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 12:57:18:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXXX__ Clock Delay: 34 12:57:18:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXXX__ Clock Delay: 34 12:57:18:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1 12:57:18:setup_element:INFO: Scanning data phases 12:57:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 12:57:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 12:57:24:setup_element:INFO: Data phase scan results for group 0, downlink 1 12:57:24:setup_element:INFO: Eye window for uplink 0 : __________XXXXXX________________________ Data delay found: 32 12:57:24:setup_element:INFO: Eye window for uplink 1 : _____XXXXXX_____________________________ Data delay found: 27 12:57:24:setup_element:INFO: Eye window for uplink 2 : _______XXXXX____________________________ Data delay found: 29 12:57:24:setup_element:INFO: Eye window for uplink 3 : ____XXXXXX______________________________ Data delay found: 26 12:57:24:setup_element:INFO: Eye window for uplink 4 : ____XXXXX_______________________________ Data delay found: 26 12:57:24:setup_element:INFO: Eye window for uplink 5 : XXXXX__________________________________X Data delay found: 21 12:57:24:setup_element:INFO: Eye window for uplink 6 : XXX___________________________________XX Data delay found: 20 12:57:24:setup_element:INFO: Eye window for uplink 7 : _________________________________XXXXXX_ Data delay found: 15 12:57:24:setup_element:INFO: Eye window for uplink 8 : _________________________XXXX___________ Data delay found: 6 12:57:24:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXXX______ Data delay found: 11 12:57:24:setup_element:INFO: Eye window for uplink 10: _________________________XXXXXX_________ Data delay found: 7 12:57:24:setup_element:INFO: Eye window for uplink 11: _____________________________XXXXXX_____ Data delay found: 11 12:57:24:setup_element:INFO: Eye window for uplink 12: ___________________________XXXX_________ Data delay found: 8 12:57:24:setup_element:INFO: Eye window for uplink 13: ______________________________XXXXX_____ Data delay found: 12 12:57:24:setup_element:INFO: Eye window for uplink 14: ____________________________XXXXX_______ Data delay found: 10 12:57:24:setup_element:INFO: Eye window for uplink 15: ______________________________XXXXX_____ Data delay found: 12 12:57:24:setup_element:INFO: Setting the data phase to 32 for uplink 0 12:57:24:setup_element:INFO: Setting the data phase to 27 for uplink 1 12:57:24:setup_element:INFO: Setting the data phase to 29 for uplink 2 12:57:24:setup_element:INFO: Setting the data phase to 26 for uplink 3 12:57:24:setup_element:INFO: Setting the data phase to 26 for uplink 4 12:57:24:setup_element:INFO: Setting the data phase to 21 for uplink 5 12:57:24:setup_element:INFO: Setting the data phase to 20 for uplink 6 12:57:24:setup_element:INFO: Setting the data phase to 15 for uplink 7 12:57:24:setup_element:INFO: Setting the data phase to 6 for uplink 8 12:57:24:setup_element:INFO: Setting the data phase to 11 for uplink 9 12:57:24:setup_element:INFO: Setting the data phase to 7 for uplink 10 12:57:24:setup_element:INFO: Setting the data phase to 11 for uplink 11 12:57:24:setup_element:INFO: Setting the data phase to 8 for uplink 12 12:57:24:setup_element:INFO: Setting the data phase to 12 for uplink 13 12:57:24:setup_element:INFO: Setting the data phase to 10 for uplink 14 12:57:24:setup_element:INFO: Setting the data phase to 12 for uplink 15 12:57:24:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 34 Window Length: 69 Eye Windows: Uplink 0: ________________________________________________________________________XXXXXXXX Uplink 1: ________________________________________________________________________XXXXXXXX Uplink 2: _______________________________________________________________________XXXXXXX__ Uplink 3: _______________________________________________________________________XXXXXXX__ Uplink 4: _______________________________________________________________________XXXXXX___ Uplink 5: _______________________________________________________________________XXXXXX___ Uplink 6: _______________________________________________________________________XXXXXX___ Uplink 7: _______________________________________________________________________XXXXXX___ Uplink 8: _____________________________________________________________________XXXXXXXXX__ Uplink 9: _____________________________________________________________________XXXXXXXXX__ Uplink 10: ______________________________________________________________________XXXXXXXX__ Uplink 11: ______________________________________________________________________XXXXXXXX__ Uplink 12: ______________________________________________________________________XXXXXXX___ Uplink 13: ______________________________________________________________________XXXXXXX___ Uplink 14: ________________________________________________________________________XXXXXX__ Uplink 15: ________________________________________________________________________XXXXXX__ Data phase characteristics: Uplink 0: Optimal Phase: 32 Window Length: 34 Eye Window: __________XXXXXX________________________ Uplink 1: Optimal Phase: 27 Window Length: 34 Eye Window: _____XXXXXX_____________________________ Uplink 2: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 3: Optimal Phase: 26 Window Length: 34 Eye Window: ____XXXXXX______________________________ Uplink 4: Optimal Phase: 26 Window Length: 35 Eye Window: ____XXXXX_______________________________ Uplink 5: Optimal Phase: 21 Window Length: 34 Eye Window: XXXXX__________________________________X Uplink 6: Optimal Phase: 20 Window Length: 35 Eye Window: XXX___________________________________XX Uplink 7: Optimal Phase: 15 Window Length: 34 Eye Window: _________________________________XXXXXX_ Uplink 8: Optimal Phase: 6 Window Length: 36 Eye Window: _________________________XXXX___________ Uplink 9: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 10: Optimal Phase: 7 Window Length: 34 Eye Window: _________________________XXXXXX_________ Uplink 11: Optimal Phase: 11 Window Length: 34 Eye Window: _____________________________XXXXXX_____ Uplink 12: Optimal Phase: 8 Window Length: 36 Eye Window: ___________________________XXXX_________ Uplink 13: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 14: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ Uplink 15: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ ] 12:57:24:setup_element:INFO: Beginning SMX ASICs map scan 12:57:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 12:57:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 12:57:24:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 12:57:24:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 12:57:24:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 12:57:24:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 12:57:24:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 12:57:24:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 12:57:24:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 12:57:24:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 12:57:24:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 12:57:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 12:57:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 12:57:25:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 12:57:25:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 12:57:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 12:57:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 12:57:25:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 12:57:25:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 12:57:25:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 12:57:25:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 12:57:26:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 1 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0) ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9) ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2) ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4) ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13) ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6) ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15) Clock Phase Characteristic: Optimal Phase: 34 Window Length: 69 Eye Windows: Uplink 0: ________________________________________________________________________XXXXXXXX Uplink 1: ________________________________________________________________________XXXXXXXX Uplink 2: _______________________________________________________________________XXXXXXX__ Uplink 3: _______________________________________________________________________XXXXXXX__ Uplink 4: _______________________________________________________________________XXXXXX___ Uplink 5: _______________________________________________________________________XXXXXX___ Uplink 6: _______________________________________________________________________XXXXXX___ Uplink 7: _______________________________________________________________________XXXXXX___ Uplink 8: _____________________________________________________________________XXXXXXXXX__ Uplink 9: _____________________________________________________________________XXXXXXXXX__ Uplink 10: ______________________________________________________________________XXXXXXXX__ Uplink 11: ______________________________________________________________________XXXXXXXX__ Uplink 12: ______________________________________________________________________XXXXXXX___ Uplink 13: ______________________________________________________________________XXXXXXX___ Uplink 14: ________________________________________________________________________XXXXXX__ Uplink 15: ________________________________________________________________________XXXXXX__ Data phase characteristics: Uplink 0: Optimal Phase: 32 Window Length: 34 Eye Window: __________XXXXXX________________________ Uplink 1: Optimal Phase: 27 Window Length: 34 Eye Window: _____XXXXXX_____________________________ Uplink 2: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 3: Optimal Phase: 26 Window Length: 34 Eye Window: ____XXXXXX______________________________ Uplink 4: Optimal Phase: 26 Window Length: 35 Eye Window: ____XXXXX_______________________________ Uplink 5: Optimal Phase: 21 Window Length: 34 Eye Window: XXXXX__________________________________X Uplink 6: Optimal Phase: 20 Window Length: 35 Eye Window: XXX___________________________________XX Uplink 7: Optimal Phase: 15 Window Length: 34 Eye Window: _________________________________XXXXXX_ Uplink 8: Optimal Phase: 6 Window Length: 36 Eye Window: _________________________XXXX___________ Uplink 9: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 10: Optimal Phase: 7 Window Length: 34 Eye Window: _________________________XXXXXX_________ Uplink 11: Optimal Phase: 11 Window Length: 34 Eye Window: _____________________________XXXXXX_____ Uplink 12: Optimal Phase: 8 Window Length: 36 Eye Window: ___________________________XXXX_________ Uplink 13: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 14: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ Uplink 15: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ 12:57:26:setup_element:INFO: Performing Elink synchronization 12:57:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 12:57:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 12:57:26:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 12:57:26:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 12:57:26:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 12:57:26:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 12:57:27:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)] 12:57:27:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 12:57:28:febtest:INFO: 1-0 | XA-000-08-002-002-008-054-02 | 40.9 | 1165.6 12:57:28:febtest:INFO: 8-1 | XA-000-08-002-002-008-055-02 | 25.1 | 1224.5 12:57:28:febtest:INFO: 3-2 | XA-000-08-002-002-008-050-02 | 28.2 | 1218.6 12:57:28:febtest:INFO: 10-3 | XA-000-08-002-002-008-060-02 | 37.7 | 1189.2 12:57:28:febtest:INFO: 5-4 | XA-000-08-002-002-008-058-02 | 53.6 | 1130.0 12:57:29:febtest:INFO: 12-5 | XA-000-08-002-002-007-236-14 | 12.4 | 1271.2 12:57:29:febtest:INFO: 7-6 | XA-000-08-002-002-008-053-02 | 25.1 | 1230.3 12:57:29:febtest:INFO: 14-7 | XA-000-08-002-002-007-234-14 | 3.0 | 1311.9 12:57:29:ST3_smx:INFO: Configuring SMX FAST 12:57:31:ST3_smx:INFO: chip: 1-0 34.556970 C 1189.190035 mV 12:57:31:ST3_smx:INFO: Electrons 12:57:31:ST3_smx:INFO: # loops 0 12:57:33:ST3_smx:INFO: # loops 1 12:57:34:ST3_smx:INFO: # loops 2 12:57:36:ST3_smx:INFO: # loops 3 12:57:38:ST3_smx:INFO: # loops 4 12:57:39:ST3_smx:INFO: Total # of broken channels: 0 12:57:39:ST3_smx:INFO: List of broken channels: [] 12:57:39:ST3_smx:INFO: Total # of broken channels: 0 12:57:39:ST3_smx:INFO: List of broken channels: [] 12:57:40:ST3_smx:INFO: Configuring SMX FAST 12:57:42:ST3_smx:INFO: chip: 8-1 34.556970 C 1189.190035 mV 12:57:42:ST3_smx:INFO: Electrons 12:57:42:ST3_smx:INFO: # loops 0 12:57:44:ST3_smx:INFO: # loops 1 12:57:45:ST3_smx:INFO: # loops 2 12:57:47:ST3_smx:INFO: # loops 3 12:57:49:ST3_smx:INFO: # loops 4 12:57:50:ST3_smx:INFO: Total # of broken channels: 0 12:57:50:ST3_smx:INFO: List of broken channels: [] 12:57:50:ST3_smx:INFO: Total # of broken channels: 0 12:57:50:ST3_smx:INFO: List of broken channels: [] 12:57:51:ST3_smx:INFO: Configuring SMX FAST 12:57:53:ST3_smx:INFO: chip: 3-2 28.225000 C 1218.600960 mV 12:57:53:ST3_smx:INFO: Electrons 12:57:53:ST3_smx:INFO: # loops 0 12:57:55:ST3_smx:INFO: # loops 1 12:57:56:ST3_smx:INFO: # loops 2 12:57:58:ST3_smx:INFO: # loops 3 12:58:00:ST3_smx:INFO: # loops 4 12:58:01:ST3_smx:INFO: Total # of broken channels: 0 12:58:01:ST3_smx:INFO: List of broken channels: [] 12:58:01:ST3_smx:INFO: Total # of broken channels: 0 12:58:01:ST3_smx:INFO: List of broken channels: [] 12:58:02:ST3_smx:INFO: Configuring SMX FAST 12:58:04:ST3_smx:INFO: chip: 10-3 37.726682 C 1195.082160 mV 12:58:04:ST3_smx:INFO: Electrons 12:58:04:ST3_smx:INFO: # loops 0 12:58:06:ST3_smx:INFO: # loops 1 12:58:07:ST3_smx:INFO: # loops 2 12:58:09:ST3_smx:INFO: # loops 3 12:58:11:ST3_smx:INFO: # loops 4 12:58:12:ST3_smx:INFO: Total # of broken channels: 0 12:58:12:ST3_smx:INFO: List of broken channels: [] 12:58:12:ST3_smx:INFO: Total # of broken channels: 0 12:58:12:ST3_smx:INFO: List of broken channels: [] 12:58:13:ST3_smx:INFO: Configuring SMX FAST 12:58:15:ST3_smx:INFO: chip: 5-4 47.250730 C 1153.732915 mV 12:58:15:ST3_smx:INFO: Electrons 12:58:15:ST3_smx:INFO: # loops 0 12:58:16:ST3_smx:INFO: # loops 1 12:58:18:ST3_smx:INFO: # loops 2 12:58:20:ST3_smx:INFO: # loops 3 12:58:21:ST3_smx:INFO: # loops 4 12:58:23:ST3_smx:INFO: Total # of broken channels: 0 12:58:23:ST3_smx:INFO: List of broken channels: [] 12:58:23:ST3_smx:INFO: Total # of broken channels: 0 12:58:23:ST3_smx:INFO: List of broken channels: [] 12:58:24:ST3_smx:INFO: Configuring SMX FAST 12:58:26:ST3_smx:INFO: chip: 12-5 28.225000 C 1218.600960 mV 12:58:26:ST3_smx:INFO: Electrons 12:58:26:ST3_smx:INFO: # loops 0 12:58:27:ST3_smx:INFO: # loops 1 12:58:29:ST3_smx:INFO: # loops 2 12:58:31:ST3_smx:INFO: # loops 3 12:58:32:ST3_smx:INFO: # loops 4 12:58:34:ST3_smx:INFO: Total # of broken channels: 0 12:58:34:ST3_smx:INFO: List of broken channels: [] 12:58:34:ST3_smx:INFO: Total # of broken channels: 0 12:58:34:ST3_smx:INFO: List of broken channels: [] 12:58:34:ST3_smx:INFO: Configuring SMX FAST 12:58:36:ST3_smx:INFO: chip: 7-6 37.726682 C 1195.082160 mV 12:58:36:ST3_smx:INFO: Electrons 12:58:36:ST3_smx:INFO: # loops 0 12:58:38:ST3_smx:INFO: # loops 1 12:58:40:ST3_smx:INFO: # loops 2 12:58:41:ST3_smx:INFO: # loops 3 12:58:43:ST3_smx:INFO: # loops 4 12:58:45:ST3_smx:INFO: Total # of broken channels: 0 12:58:45:ST3_smx:INFO: List of broken channels: [] 12:58:45:ST3_smx:INFO: Total # of broken channels: 1 12:58:45:ST3_smx:INFO: List of broken channels: [49] 12:58:45:ST3_smx:INFO: Configuring SMX FAST 12:58:47:ST3_smx:INFO: chip: 14-7 18.745682 C 1259.567515 mV 12:58:47:ST3_smx:INFO: Electrons 12:58:47:ST3_smx:INFO: # loops 0 12:58:49:ST3_smx:INFO: # loops 1 12:58:50:ST3_smx:INFO: # loops 2 12:58:52:ST3_smx:INFO: # loops 3 12:58:54:ST3_smx:INFO: # loops 4 12:58:55:ST3_smx:INFO: Total # of broken channels: 0 12:58:55:ST3_smx:INFO: List of broken channels: [] 12:58:55:ST3_smx:INFO: Total # of broken channels: 0 12:58:55:ST3_smx:INFO: List of broken channels: [] 12:58:56:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 12:58:56:febtest:INFO: 1-0 | XA-000-08-002-002-008-054-02 | 37.7 | 1189.2 12:58:56:febtest:INFO: 8-1 | XA-000-08-002-002-008-055-02 | 34.6 | 1189.2 12:58:56:febtest:INFO: 3-2 | XA-000-08-002-002-008-050-02 | 28.2 | 1212.7 12:58:57:febtest:INFO: 10-3 | XA-000-08-002-002-008-060-02 | 37.7 | 1195.1 12:58:57:febtest:INFO: 5-4 | XA-000-08-002-002-008-058-02 | 47.3 | 1147.8 12:58:57:febtest:INFO: 12-5 | XA-000-08-002-002-007-236-14 | 31.4 | 1218.6 12:58:57:febtest:INFO: 7-6 | XA-000-08-002-002-008-053-02 | 37.7 | 1195.1 12:58:58:febtest:INFO: 14-7 | XA-000-08-002-002-007-234-14 | 18.7 | 1259.6 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 2024_01_05-12_57_15 OPERATOR : Oleksandr S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : L4UL201031 M4UL2B3010313A2 62 B FEB_SN : 1079 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- --------------------------------------- VI_before_Init : ['2.447', '1.8600', '1.845', '2.2010', '7.000', '1.5540', '7.000', '1.5540'] VI_after__Init : ['2.450', '2.0070', '1.850', '0.5850', '7.000', '1.5510', '7.000', '1.5510'] VI_at__the_End : ['0', '0', '0', '0', '0', '0'] 12:58:58:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1079/TestDate_2024_01_05-12_57_15/