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FEB_1081 24.11.23 10:42:44
Info
10:23:41:ST3_hmp4040:INFO: HAMEG,HMP2030,017836163,HW50010002/SW2.30
10:23:42:febtest:INFO: FEB8.2 selected
10:23:42:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:23:47:ST3_Shared:INFO: Listo of operators:Oleksandr S.;
10:23:53:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:23:53:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
10:23:53:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:23:54:febtest:INFO: Tsting FEB with SN 2078
10:23:55:smx_tester:INFO: Scanning setup
10:23:55:elinks:INFO: Disabling clock on downlink 0
10:23:55:elinks:INFO: Disabling clock on downlink 1
10:23:55:elinks:INFO: Disabling clock on downlink 2
10:23:55:elinks:INFO: Disabling clock on downlink 3
10:23:55:elinks:INFO: Disabling clock on downlink 4
10:23:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:23:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:23:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:23:55:elinks:INFO: Disabling clock on downlink 0
10:23:55:elinks:INFO: Disabling clock on downlink 1
10:23:55:elinks:INFO: Disabling clock on downlink 2
10:23:55:elinks:INFO: Disabling clock on downlink 3
10:23:55:elinks:INFO: Disabling clock on downlink 4
10:23:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:23:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:23:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:23:55:elinks:INFO: Disabling clock on downlink 0
10:23:55:elinks:INFO: Disabling clock on downlink 1
10:23:55:elinks:INFO: Disabling clock on downlink 2
10:23:55:elinks:INFO: Disabling clock on downlink 3
10:23:55:elinks:INFO: Disabling clock on downlink 4
10:23:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:23:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:23:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:23:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:23:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:23:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:23:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:23:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:23:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:23:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:23:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:23:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:23:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:23:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:23:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:23:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:23:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:23:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:23:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:23:55:elinks:INFO: Disabling clock on downlink 0
10:23:55:elinks:INFO: Disabling clock on downlink 1
10:23:55:elinks:INFO: Disabling clock on downlink 2
10:23:55:elinks:INFO: Disabling clock on downlink 3
10:23:55:elinks:INFO: Disabling clock on downlink 4
10:23:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:23:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:23:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:23:55:elinks:INFO: Disabling clock on downlink 0
10:23:55:elinks:INFO: Disabling clock on downlink 1
10:23:55:elinks:INFO: Disabling clock on downlink 2
10:23:55:elinks:INFO: Disabling clock on downlink 3
10:23:55:elinks:INFO: Disabling clock on downlink 4
10:23:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:23:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:23:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:23:56:setup_element:INFO: Scanning clock phase
10:23:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:23:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:23:56:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:23:56:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:23:56:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:23:56:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:23:56:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:23:56:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:23:56:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:23:56:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:23:56:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:23:56:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:23:56:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:23:56:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:23:56:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:23:56:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:23:56:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:23:56:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________
Clock Delay: 40
10:23:56:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________
Clock Delay: 40
10:23:56:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
10:23:56:setup_element:INFO: Scanning data phases
10:23:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:23:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:24:02:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:24:02:setup_element:INFO: Eye window for uplink 16: X___________________________________XXXX
Data delay found: 18
10:24:02:setup_element:INFO: Eye window for uplink 17: ________________________________XXXX____
Data delay found: 13
10:24:02:setup_element:INFO: Eye window for uplink 18: X__________________________________XXXXX
Data delay found: 17
10:24:02:setup_element:INFO: Eye window for uplink 19: ________________________________XXXXX___
Data delay found: 14
10:24:02:setup_element:INFO: Eye window for uplink 20: ___________________________________XXXXX
Data delay found: 17
10:24:02:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXX_
Data delay found: 16
10:24:02:setup_element:INFO: Eye window for uplink 22: __________________________________XXXX__
Data delay found: 15
10:24:02:setup_element:INFO: Eye window for uplink 23: ________________________________XXXX____
Data delay found: 13
10:24:02:setup_element:INFO: Eye window for uplink 24: ____XXXXX_______________________________
Data delay found: 26
10:24:02:setup_element:INFO: Eye window for uplink 25: ______XXXXXX____________________________
Data delay found: 28
10:24:02:setup_element:INFO: Eye window for uplink 26: ____XXXXX_______________________________
Data delay found: 26
10:24:02:setup_element:INFO: Eye window for uplink 27: ________XXXXX___________________________
Data delay found: 30
10:24:02:setup_element:INFO: Eye window for uplink 28: __________XXXXX_________________________
Data delay found: 32
10:24:02:setup_element:INFO: Eye window for uplink 29: ___________XXXXX________________________
Data delay found: 33
10:24:02:setup_element:INFO: Eye window for uplink 30: _____________XXXXXX_____________________
Data delay found: 35
10:24:02:setup_element:INFO: Eye window for uplink 31: ___________XXXXX________________________
Data delay found: 33
10:24:02:setup_element:INFO: Setting the data phase to 18 for uplink 16
10:24:02:setup_element:INFO: Setting the data phase to 13 for uplink 17
10:24:02:setup_element:INFO: Setting the data phase to 17 for uplink 18
10:24:02:setup_element:INFO: Setting the data phase to 14 for uplink 19
10:24:02:setup_element:INFO: Setting the data phase to 17 for uplink 20
10:24:02:setup_element:INFO: Setting the data phase to 16 for uplink 21
10:24:02:setup_element:INFO: Setting the data phase to 15 for uplink 22
10:24:02:setup_element:INFO: Setting the data phase to 13 for uplink 23
10:24:02:setup_element:INFO: Setting the data phase to 26 for uplink 24
10:24:02:setup_element:INFO: Setting the data phase to 28 for uplink 25
10:24:02:setup_element:INFO: Setting the data phase to 26 for uplink 26
10:24:02:setup_element:INFO: Setting the data phase to 30 for uplink 27
10:24:02:setup_element:INFO: Setting the data phase to 32 for uplink 28
10:24:02:setup_element:INFO: Setting the data phase to 33 for uplink 29
10:24:02:setup_element:INFO: Setting the data phase to 35 for uplink 30
10:24:02:setup_element:INFO: Setting the data phase to 33 for uplink 31
10:24:02:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 71
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXXX__
Uplink 17: _______________________________________________________________________XXXXXXX__
Uplink 18: _______________________________________________________________________XXXXXXX__
Uplink 19: _______________________________________________________________________XXXXXXX__
Uplink 20: ______________________________________________________________________XXXXXXXXX_
Uplink 21: ______________________________________________________________________XXXXXXXXX_
Uplink 22: ______________________________________________________________________XXXXXXXXX_
Uplink 23: ______________________________________________________________________XXXXXXXXX_
Uplink 24: ______________________________________________________________________XXXXXXXX__
Uplink 25: ______________________________________________________________________XXXXXXXX__
Uplink 26: ______________________________________________________________________XXXXXXXX__
Uplink 27: ______________________________________________________________________XXXXXXXX__
Uplink 28: ______________________________________________________________________XXXXXXXX__
Uplink 29: ______________________________________________________________________XXXXXXXX__
Uplink 30: ________________________________________________________________________________
Uplink 31: ________________________________________________________________________________
Data phase characteristics:
Uplink 16:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 17:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 18:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 19:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 20:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 21:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 22:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 23:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 24:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 25:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 26:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 27:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 28:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 29:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 30:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 31:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
]
10:24:02:setup_element:INFO: Beginning SMX ASICs map scan
10:24:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:24:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:24:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:24:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:24:02:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:24:02:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:24:02:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:24:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:24:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:24:02:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:24:02:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:24:02:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:24:02:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:24:03:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:24:03:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:24:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:24:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:24:03:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:24:03:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:24:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:24:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:24:05:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 71
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXXX__
Uplink 17: _______________________________________________________________________XXXXXXX__
Uplink 18: _______________________________________________________________________XXXXXXX__
Uplink 19: _______________________________________________________________________XXXXXXX__
Uplink 20: ______________________________________________________________________XXXXXXXXX_
Uplink 21: ______________________________________________________________________XXXXXXXXX_
Uplink 22: ______________________________________________________________________XXXXXXXXX_
Uplink 23: ______________________________________________________________________XXXXXXXXX_
Uplink 24: ______________________________________________________________________XXXXXXXX__
Uplink 25: ______________________________________________________________________XXXXXXXX__
Uplink 26: ______________________________________________________________________XXXXXXXX__
Uplink 27: ______________________________________________________________________XXXXXXXX__
Uplink 28: ______________________________________________________________________XXXXXXXX__
Uplink 29: ______________________________________________________________________XXXXXXXX__
Uplink 30: ________________________________________________________________________________
Uplink 31: ________________________________________________________________________________
Data phase characteristics:
Uplink 16:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 17:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 18:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 19:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 20:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 21:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 22:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 23:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 24:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 25:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 26:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 27:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 28:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 29:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 30:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 31:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
10:24:05:setup_element:INFO: Performing Elink synchronization
10:24:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:24:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:24:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:24:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:24:05:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:24:05:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:24:05:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
10:24:06:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:24:06:febtest:INFO: 0-0 | XA-000-08-002-000-007-108-13 | 47.3 | 1177.4
10:24:06:febtest:INFO: 0-1 | XA-000-08-002-000-007-000-06 | 3.0 | 1329.2
10:24:07:febtest:INFO: 0-2 | XA-000-08-002-000-007-103-13 | 40.9 | 1201.0
10:24:07:febtest:INFO: 0-3 | XA-000-08-002-000-007-006-06 | 25.1 | 1253.7
10:24:07:febtest:INFO: 0-4 | XA-000-08-002-000-007-009-06 | 47.3 | 1171.5
10:24:07:febtest:INFO: 0-5 | XA-000-08-002-000-007-091-04 | 31.4 | 1218.6
10:24:08:febtest:INFO: 0-6 | XA-000-08-002-000-007-089-04 | 37.7 | 1195.1
10:24:08:febtest:INFO: 0-7 | XA-000-08-002-000-007-092-04 | 25.1 | 1247.9
10:24:08:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:24:12:ST3_smx:INFO: chip: 0-0 50.430383 C 1159.654860 mV
10:24:12:ST3_smx:INFO: Electrons
10:24:12:ST3_smx:INFO: # loops 0
10:24:13:ST3_smx:INFO: # loops 1
10:24:15:ST3_smx:INFO: # loops 2
10:24:16:ST3_smx:INFO: # loops 3
10:24:18:ST3_smx:INFO: # loops 4
10:24:20:ST3_smx:INFO: Total # of broken channels: 0
10:24:20:ST3_smx:INFO: List of broken channels: []
10:24:20:ST3_smx:INFO: Total # of broken channels: 0
10:24:20:ST3_smx:INFO: List of broken channels: []
10:24:20:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:24:25:ST3_smx:INFO: chip: 0-1 12.438562 C 1306.088235 mV
10:24:25:ST3_smx:INFO: Electrons
10:24:25:ST3_smx:INFO: # loops 0
10:24:26:ST3_smx:INFO: # loops 1
10:24:28:ST3_smx:INFO: # loops 2
10:24:30:ST3_smx:INFO: # loops 3
10:24:31:ST3_smx:INFO: # loops 4
10:24:33:ST3_smx:INFO: Total # of broken channels: 1
10:24:33:ST3_smx:INFO: List of broken channels: [47]
10:24:33:ST3_smx:INFO: Total # of broken channels: 1
10:24:33:ST3_smx:INFO: List of broken channels: [47]
10:24:33:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:24:37:ST3_smx:INFO: chip: 0-2 44.073563 C 1206.851500 mV
10:24:37:ST3_smx:INFO: Electrons
10:24:37:ST3_smx:INFO: # loops 0
10:24:39:ST3_smx:INFO: # loops 1
10:24:40:ST3_smx:INFO: # loops 2
10:24:42:ST3_smx:INFO: # loops 3
10:24:44:ST3_smx:INFO: # loops 4
Traceback (most recent call last):
File "febtest.py", line 325, in DoFEB_MicrocableTest
self.EMU.mysmx[i].MicroCableTest()
File "/home/cbm/ST3_v2.29.03/lib/ST3_smx.py", line 493, in MicroCableTest
val = self.smx.read(ch, (2*d))&0xFFF
File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/smx_tester/smx.py", line 39, in read
return self.ack_monitor.check_read()
File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/hctsp/ack_monitor.py", line 88, in check_read
return self._check(self._check_read, timeout)
File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/hctsp/ack_monitor.py", line 60, in _check
raise AckNotReceived
hctsp.ack_monitor.AckNotReceived: Ack frame not received
Traceback (most recent call last):
File "febtest.py", line 591, in Talk2hmp
return super().Talk2hmp()
File "/home/cbm/ST3_v2.29.03/lib/ST3_Shared.py", line 514, in Talk2hmp
self.FEBstate = self.HMP.get_state( self.HMP.hmp_yaml['C1'] )
File "/home/cbm/ST3_v2.29.03/lib/ST3_hmp4040.py", line 205, in get_state
return int(line)
ValueError: invalid literal for int() with base 10: '1.550'
10:42:40:febtest:INFO: FEB 8-2 A @ GSI
10:42:44:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:42:44:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
10:42:44:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:42:44:febtest:INFO: Tsting FEB with SN 1081
10:42:45:smx_tester:INFO: Scanning setup
10:42:45:elinks:INFO: Disabling clock on downlink 0
10:42:45:elinks:INFO: Disabling clock on downlink 1
10:42:45:elinks:INFO: Disabling clock on downlink 2
10:42:45:elinks:INFO: Disabling clock on downlink 3
10:42:45:elinks:INFO: Disabling clock on downlink 4
10:42:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:42:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:42:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:42:46:elinks:INFO: Disabling clock on downlink 0
10:42:46:elinks:INFO: Disabling clock on downlink 1
10:42:46:elinks:INFO: Disabling clock on downlink 2
10:42:46:elinks:INFO: Disabling clock on downlink 3
10:42:46:elinks:INFO: Disabling clock on downlink 4
10:42:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:42:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:42:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
10:42:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
10:42:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
10:42:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
10:42:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
10:42:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
10:42:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
10:42:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
10:42:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:42:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:42:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:42:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:42:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:42:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:42:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:42:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:42:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:42:46:elinks:INFO: Disabling clock on downlink 0
10:42:46:elinks:INFO: Disabling clock on downlink 1
10:42:46:elinks:INFO: Disabling clock on downlink 2
10:42:46:elinks:INFO: Disabling clock on downlink 3
10:42:46:elinks:INFO: Disabling clock on downlink 4
10:42:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:42:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:42:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:42:46:elinks:INFO: Disabling clock on downlink 0
10:42:46:elinks:INFO: Disabling clock on downlink 1
10:42:46:elinks:INFO: Disabling clock on downlink 2
10:42:46:elinks:INFO: Disabling clock on downlink 3
10:42:46:elinks:INFO: Disabling clock on downlink 4
10:42:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:42:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:42:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:42:46:elinks:INFO: Disabling clock on downlink 0
10:42:46:elinks:INFO: Disabling clock on downlink 1
10:42:46:elinks:INFO: Disabling clock on downlink 2
10:42:46:elinks:INFO: Disabling clock on downlink 3
10:42:46:elinks:INFO: Disabling clock on downlink 4
10:42:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:42:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:42:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:42:46:setup_element:INFO: Scanning clock phase
10:42:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:42:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:42:46:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:42:46:setup_element:INFO: Eye window for uplink 0 : XX________________________________________________________________________XXXXXX
Clock Delay: 37
10:42:46:setup_element:INFO: Eye window for uplink 1 : XX________________________________________________________________________XXXXXX
Clock Delay: 37
10:42:46:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:42:46:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:42:46:setup_element:INFO: Eye window for uplink 4 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
10:42:46:setup_element:INFO: Eye window for uplink 5 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
10:42:46:setup_element:INFO: Eye window for uplink 6 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
10:42:46:setup_element:INFO: Eye window for uplink 7 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
10:42:46:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:42:46:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:42:46:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:42:46:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:42:46:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:42:46:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:42:46:setup_element:INFO: Eye window for uplink 14: X________________________________________________________________________XXXXXXX
Clock Delay: 36
10:42:46:setup_element:INFO: Eye window for uplink 15: X________________________________________________________________________XXXXXXX
Clock Delay: 36
10:42:46:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
10:42:46:setup_element:INFO: Scanning data phases
10:42:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:42:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:42:51:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:42:51:setup_element:INFO: Eye window for uplink 0 : ___________XXXXXX_______________________
Data delay found: 33
10:42:51:setup_element:INFO: Eye window for uplink 1 : ________XXXXX___________________________
Data delay found: 30
10:42:51:setup_element:INFO: Eye window for uplink 2 : _____XXXXX______________________________
Data delay found: 27
10:42:51:setup_element:INFO: Eye window for uplink 3 : __XXXXXX________________________________
Data delay found: 24
10:42:51:setup_element:INFO: Eye window for uplink 4 : _____XXXXX______________________________
Data delay found: 27
10:42:51:setup_element:INFO: Eye window for uplink 5 : _XXXXX__________________________________
Data delay found: 23
10:42:51:setup_element:INFO: Eye window for uplink 6 : XXXX___________________________________X
Data delay found: 21
10:42:51:setup_element:INFO: Eye window for uplink 7 : __________________________________XXXXX_
Data delay found: 16
10:42:51:setup_element:INFO: Eye window for uplink 8 : ________________________XXXXX___________
Data delay found: 6
10:42:51:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXXX______
Data delay found: 11
10:42:51:setup_element:INFO: Eye window for uplink 10: __________________________XXXXX_________
Data delay found: 8
10:42:51:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXX_____
Data delay found: 12
10:42:51:setup_element:INFO: Eye window for uplink 12: ____________________________XXXXX_______
Data delay found: 10
10:42:51:setup_element:INFO: Eye window for uplink 13: _______________________________XXXXX____
Data delay found: 13
10:42:51:setup_element:INFO: Eye window for uplink 14: ___________________________XXXXX________
Data delay found: 9
10:42:51:setup_element:INFO: Eye window for uplink 15: ______________________________XXXXXX____
Data delay found: 12
10:42:52:setup_element:INFO: Setting the data phase to 33 for uplink 0
10:42:52:setup_element:INFO: Setting the data phase to 30 for uplink 1
10:42:52:setup_element:INFO: Setting the data phase to 27 for uplink 2
10:42:52:setup_element:INFO: Setting the data phase to 24 for uplink 3
10:42:52:setup_element:INFO: Setting the data phase to 27 for uplink 4
10:42:52:setup_element:INFO: Setting the data phase to 23 for uplink 5
10:42:52:setup_element:INFO: Setting the data phase to 21 for uplink 6
10:42:52:setup_element:INFO: Setting the data phase to 16 for uplink 7
10:42:52:setup_element:INFO: Setting the data phase to 6 for uplink 8
10:42:52:setup_element:INFO: Setting the data phase to 11 for uplink 9
10:42:52:setup_element:INFO: Setting the data phase to 8 for uplink 10
10:42:52:setup_element:INFO: Setting the data phase to 12 for uplink 11
10:42:52:setup_element:INFO: Setting the data phase to 10 for uplink 12
10:42:52:setup_element:INFO: Setting the data phase to 13 for uplink 13
10:42:52:setup_element:INFO: Setting the data phase to 9 for uplink 14
10:42:52:setup_element:INFO: Setting the data phase to 12 for uplink 15
10:42:52:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 68
Eye Windows:
Uplink 0: XX________________________________________________________________________XXXXXX
Uplink 1: XX________________________________________________________________________XXXXXX
Uplink 2: ________________________________________________________________________XXXXXXXX
Uplink 3: ________________________________________________________________________XXXXXXXX
Uplink 4: _________________________________________________________________________XXXXXXX
Uplink 5: _________________________________________________________________________XXXXXXX
Uplink 6: _________________________________________________________________________XXXXXXX
Uplink 7: _________________________________________________________________________XXXXXXX
Uplink 8: ______________________________________________________________________XXXXXXXX__
Uplink 9: ______________________________________________________________________XXXXXXXX__
Uplink 10: _______________________________________________________________________XXXXXXXX_
Uplink 11: _______________________________________________________________________XXXXXXXX_
Uplink 12: ________________________________________________________________________XXXXXXXX
Uplink 13: ________________________________________________________________________XXXXXXXX
Uplink 14: X________________________________________________________________________XXXXXXX
Uplink 15: X________________________________________________________________________XXXXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 1:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 2:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 3:
Optimal Phase: 24
Window Length: 34
Eye Window: __XXXXXX________________________________
Uplink 4:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 5:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 8:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 9:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 10:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 11:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 12:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 13:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 14:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 15:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
]
10:42:52:setup_element:INFO: Beginning SMX ASICs map scan
10:42:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:42:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:42:52:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:42:52:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:42:52:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:42:52:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:42:52:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:42:52:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:42:52:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:42:52:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:42:52:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:42:52:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:42:52:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:42:52:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:42:52:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:42:52:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:42:52:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:42:53:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:42:53:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:42:53:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:42:53:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:42:54:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 68
Eye Windows:
Uplink 0: XX________________________________________________________________________XXXXXX
Uplink 1: XX________________________________________________________________________XXXXXX
Uplink 2: ________________________________________________________________________XXXXXXXX
Uplink 3: ________________________________________________________________________XXXXXXXX
Uplink 4: _________________________________________________________________________XXXXXXX
Uplink 5: _________________________________________________________________________XXXXXXX
Uplink 6: _________________________________________________________________________XXXXXXX
Uplink 7: _________________________________________________________________________XXXXXXX
Uplink 8: ______________________________________________________________________XXXXXXXX__
Uplink 9: ______________________________________________________________________XXXXXXXX__
Uplink 10: _______________________________________________________________________XXXXXXXX_
Uplink 11: _______________________________________________________________________XXXXXXXX_
Uplink 12: ________________________________________________________________________XXXXXXXX
Uplink 13: ________________________________________________________________________XXXXXXXX
Uplink 14: X________________________________________________________________________XXXXXXX
Uplink 15: X________________________________________________________________________XXXXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 1:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 2:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 3:
Optimal Phase: 24
Window Length: 34
Eye Window: __XXXXXX________________________________
Uplink 4:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 5:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 6:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 7:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 8:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 9:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 10:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 11:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 12:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 13:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 14:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 15:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
10:42:54:setup_element:INFO: Performing Elink synchronization
10:42:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:42:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:42:54:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:42:54:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:42:54:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:42:54:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:42:54:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 1 | 0 | [1] | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
10:42:55:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:42:55:febtest:INFO: 0-0 | XA-000-08-002-001-008-014-10 | 31.4 | 1224.5
10:42:56:febtest:INFO: 0-1 | XA-000-08-002-001-008-005-10 | 12.4 | 1282.9
10:42:56:febtest:INFO: 0-2 | XA-000-08-002-001-008-010-10 | 40.9 | 1195.1
10:42:56:febtest:INFO: 0-3 | XA-000-08-002-001-008-006-10 | 15.6 | 1277.1
10:42:56:febtest:INFO: 0-4 | XA-000-08-002-001-008-020-13 | 31.4 | 1236.2
10:42:56:febtest:INFO: 0-5 | XA-000-08-002-001-008-000-10 | 37.7 | 1195.1
10:42:57:febtest:INFO: 0-6 | XA-000-08-002-001-008-011-10 | 21.9 | 1265.4
10:42:57:febtest:INFO: 0-7 | XA-000-08-002-001-007-253-08 | 31.4 | 1224.5
10:42:57:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:43:01:ST3_smx:INFO: chip: 0-0 40.898880 C 1183.292940 mV
10:43:01:ST3_smx:INFO: Electrons
10:43:01:ST3_smx:INFO: # loops 0
10:43:02:ST3_smx:INFO: # loops 1
10:43:04:ST3_smx:INFO: # loops 2
10:43:06:ST3_smx:INFO: # loops 3
10:43:08:ST3_smx:INFO: # loops 4
10:43:09:ST3_smx:INFO: Total # of broken channels: 0
10:43:09:ST3_smx:INFO: List of broken channels: []
10:43:09:ST3_smx:INFO: Total # of broken channels: 1
10:43:09:ST3_smx:INFO: List of broken channels: [105]
10:43:10:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:43:14:ST3_smx:INFO: chip: 0-1 18.745682 C 1259.567515 mV
10:43:14:ST3_smx:INFO: Electrons
10:43:14:ST3_smx:INFO: # loops 0
10:43:16:ST3_smx:INFO: # loops 1
10:43:18:ST3_smx:INFO: # loops 2
10:43:19:ST3_smx:INFO: # loops 3
10:43:21:ST3_smx:INFO: # loops 4
10:43:23:ST3_smx:INFO: Total # of broken channels: 0
10:43:23:ST3_smx:INFO: List of broken channels: []
10:43:23:ST3_smx:INFO: Total # of broken channels: 0
10:43:23:ST3_smx:INFO: List of broken channels: []
10:43:23:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:43:27:ST3_smx:INFO: chip: 0-2 40.898880 C 1200.969315 mV
10:43:27:ST3_smx:INFO: Electrons
10:43:28:ST3_smx:INFO: # loops 0
10:43:29:ST3_smx:INFO: # loops 1
10:43:31:ST3_smx:INFO: # loops 2
10:43:33:ST3_smx:INFO: # loops 3
10:43:34:ST3_smx:INFO: # loops 4
10:43:36:ST3_smx:INFO: Total # of broken channels: 0
10:43:36:ST3_smx:INFO: List of broken channels: []
10:43:36:ST3_smx:INFO: Total # of broken channels: 0
10:43:36:ST3_smx:INFO: List of broken channels: []
10:43:37:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:43:41:ST3_smx:INFO: chip: 0-3 31.389742 C 1218.600960 mV
10:43:41:ST3_smx:INFO: Electrons
10:43:41:ST3_smx:INFO: # loops 0
10:43:42:ST3_smx:INFO: # loops 1
10:43:44:ST3_smx:INFO: # loops 2
10:43:46:ST3_smx:INFO: # loops 3
10:43:47:ST3_smx:INFO: # loops 4
10:43:49:ST3_smx:INFO: Total # of broken channels: 0
10:43:49:ST3_smx:INFO: List of broken channels: []
10:43:49:ST3_smx:INFO: Total # of broken channels: 0
10:43:49:ST3_smx:INFO: List of broken channels: []
10:43:50:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:43:54:ST3_smx:INFO: chip: 0-4 37.726682 C 1218.600960 mV
10:43:54:ST3_smx:INFO: Electrons
10:43:54:ST3_smx:INFO: # loops 0
10:43:55:ST3_smx:INFO: # loops 1
10:43:57:ST3_smx:INFO: # loops 2
10:43:59:ST3_smx:INFO: # loops 3
10:44:01:ST3_smx:INFO: # loops 4
10:44:02:ST3_smx:INFO: Total # of broken channels: 0
10:44:02:ST3_smx:INFO: List of broken channels: []
10:44:02:ST3_smx:INFO: Total # of broken channels: 0
10:44:02:ST3_smx:INFO: List of broken channels: []
10:44:03:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:44:07:ST3_smx:INFO: chip: 0-5 31.389742 C 1224.468235 mV
10:44:07:ST3_smx:INFO: Electrons
10:44:07:ST3_smx:INFO: # loops 0
10:44:08:ST3_smx:INFO: # loops 1
10:44:10:ST3_smx:INFO: # loops 2
10:44:12:ST3_smx:INFO: # loops 3
10:44:14:ST3_smx:INFO: # loops 4
10:44:15:ST3_smx:INFO: Total # of broken channels: 0
10:44:15:ST3_smx:INFO: List of broken channels: []
10:44:15:ST3_smx:INFO: Total # of broken channels: 1
10:44:15:ST3_smx:INFO: List of broken channels: [81]
10:44:16:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:44:20:ST3_smx:INFO: chip: 0-6 31.389742 C 1236.187875 mV
10:44:20:ST3_smx:INFO: Electrons
10:44:20:ST3_smx:INFO: # loops 0
10:44:22:ST3_smx:INFO: # loops 1
10:44:23:ST3_smx:INFO: # loops 2
10:44:25:ST3_smx:INFO: # loops 3
10:44:27:ST3_smx:INFO: # loops 4
10:44:28:ST3_smx:INFO: Total # of broken channels: 0
10:44:28:ST3_smx:INFO: List of broken channels: []
10:44:28:ST3_smx:INFO: Total # of broken channels: 0
10:44:28:ST3_smx:INFO: List of broken channels: []
10:44:29:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:44:33:ST3_smx:INFO: chip: 0-7 25.062742 C 1253.730060 mV
10:44:33:ST3_smx:INFO: Electrons
10:44:33:ST3_smx:INFO: # loops 0
10:44:35:ST3_smx:INFO: # loops 1
10:44:36:ST3_smx:INFO: # loops 2
10:44:38:ST3_smx:INFO: # loops 3
10:44:40:ST3_smx:INFO: # loops 4
10:44:42:ST3_smx:INFO: Total # of broken channels: 1
10:44:42:ST3_smx:INFO: List of broken channels: [1]
10:44:42:ST3_smx:INFO: Total # of broken channels: 1
10:44:42:ST3_smx:INFO: List of broken channels: [1]
10:44:42:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:44:43:febtest:INFO: 0-0 | XA-000-08-002-001-008-014-10 | 44.1 | 1183.3
10:44:43:febtest:INFO: 0-1 | XA-000-08-002-001-008-005-10 | 21.9 | 1259.6
10:44:43:febtest:INFO: 0-2 | XA-000-08-002-001-008-010-10 | 40.9 | 1201.0
10:44:43:febtest:INFO: 0-3 | XA-000-08-002-001-008-006-10 | 31.4 | 1218.6
10:44:43:febtest:INFO: 0-4 | XA-000-08-002-001-008-020-13 | 37.7 | 1218.6
10:44:44:febtest:INFO: 0-5 | XA-000-08-002-001-008-000-10 | 34.6 | 1218.6
10:44:44:febtest:INFO: 0-6 | XA-000-08-002-001-008-011-10 | 31.4 | 1236.2
10:44:44:febtest:INFO: 0-7 | XA-000-08-002-001-007-253-08 | 25.1 | 1253.7
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2023_11_24-10_42_44
OPERATOR : Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 2078
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 0
FEB_B : 1
---------------------------------------
---------------------------------------
VI_before_Init : ['2.448', '1.4550', '1.846', '2.4200', '7.000', '1.5470', '7.000', '1.5470']
VI_after__Init : ['0', '0', '0', '0', '0', '0']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
10:44:45:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1081/TestDate_2023_11_24-10_42_44/