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FEB_1082 21.11.23 10:40:47
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10:40:31:ST3_hmp4040:INFO: HAMEG,HMP2030,017836163,HW50010002/SW2.30
10:40:31:febtest:INFO: FEB8.2 selected
10:40:34:ST3_Shared:INFO: Listo of operators:Oleksandr S.;
10:40:43:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:40:43:ST3_emu:ERROR: device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!
10:40:46:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:40:47:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:40:47:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
10:40:47:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:40:48:febtest:INFO: Tsting FEB with SN 1082
10:40:49:smx_tester:INFO: Scanning setup
10:40:49:elinks:INFO: Disabling clock on downlink 0
10:40:49:elinks:INFO: Disabling clock on downlink 1
10:40:49:elinks:INFO: Disabling clock on downlink 2
10:40:49:elinks:INFO: Disabling clock on downlink 3
10:40:49:elinks:INFO: Disabling clock on downlink 4
10:40:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:40:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:40:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:40:49:elinks:INFO: Disabling clock on downlink 0
10:40:49:elinks:INFO: Disabling clock on downlink 1
10:40:49:elinks:INFO: Disabling clock on downlink 2
10:40:49:elinks:INFO: Disabling clock on downlink 3
10:40:49:elinks:INFO: Disabling clock on downlink 4
10:40:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:40:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:40:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:40:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:40:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:40:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:40:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:40:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:40:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:40:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:40:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:40:49:elinks:INFO: Disabling clock on downlink 0
10:40:49:elinks:INFO: Disabling clock on downlink 1
10:40:49:elinks:INFO: Disabling clock on downlink 2
10:40:49:elinks:INFO: Disabling clock on downlink 3
10:40:49:elinks:INFO: Disabling clock on downlink 4
10:40:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:40:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:40:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:40:49:elinks:INFO: Disabling clock on downlink 0
10:40:49:elinks:INFO: Disabling clock on downlink 1
10:40:49:elinks:INFO: Disabling clock on downlink 2
10:40:49:elinks:INFO: Disabling clock on downlink 3
10:40:49:elinks:INFO: Disabling clock on downlink 4
10:40:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:40:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:40:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:40:50:elinks:INFO: Disabling clock on downlink 0
10:40:50:elinks:INFO: Disabling clock on downlink 1
10:40:50:elinks:INFO: Disabling clock on downlink 2
10:40:50:elinks:INFO: Disabling clock on downlink 3
10:40:50:elinks:INFO: Disabling clock on downlink 4
10:40:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:40:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:40:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:40:50:setup_element:INFO: Scanning clock phase
10:40:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:40:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:40:50:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:40:50:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:40:50:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:40:50:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:40:50:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:40:50:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:40:50:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:40:50:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:40:50:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:40:50:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
10:40:50:setup_element:INFO: Scanning data phases
10:40:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:40:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:40:55:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:40:55:setup_element:INFO: Eye window for uplink 8 : _____________________________XXXX_______
Data delay found: 10
10:40:55:setup_element:INFO: Eye window for uplink 9 : _________________________________XXXXX__
Data delay found: 15
10:40:55:setup_element:INFO: Eye window for uplink 10: ______________________________XXXXXX____
Data delay found: 12
10:40:55:setup_element:INFO: Eye window for uplink 11: __________________________________XXXXX_
Data delay found: 16
10:40:55:setup_element:INFO: Eye window for uplink 12: _______________________________XXXXX____
Data delay found: 13
10:40:55:setup_element:INFO: Eye window for uplink 13: __________________________________XXXXX_
Data delay found: 16
10:40:55:setup_element:INFO: Eye window for uplink 14: _________________________________XXXX___
Data delay found: 14
10:40:55:setup_element:INFO: Eye window for uplink 15: XX_________________________________XXXXX
Data delay found: 18
10:40:55:setup_element:INFO: Setting the data phase to 10 for uplink 8
10:40:55:setup_element:INFO: Setting the data phase to 15 for uplink 9
10:40:55:setup_element:INFO: Setting the data phase to 12 for uplink 10
10:40:55:setup_element:INFO: Setting the data phase to 16 for uplink 11
10:40:55:setup_element:INFO: Setting the data phase to 13 for uplink 12
10:40:55:setup_element:INFO: Setting the data phase to 16 for uplink 13
10:40:55:setup_element:INFO: Setting the data phase to 14 for uplink 14
10:40:55:setup_element:INFO: Setting the data phase to 18 for uplink 15
10:40:55:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 71
Eye Windows:
Uplink 8: _______________________________________________________________________XXXXXXXX_
Uplink 9: _______________________________________________________________________XXXXXXXX_
Uplink 10: _______________________________________________________________________XXXXXXXX_
Uplink 11: _______________________________________________________________________XXXXXXXX_
Uplink 12: ________________________________________________________________________XXXXXXX_
Uplink 13: ________________________________________________________________________XXXXXXX_
Uplink 14: ________________________________________________________________________XXXXXXXX
Uplink 15: ________________________________________________________________________XXXXXXXX
Data phase characteristics:
Uplink 8:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 9:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 10:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 11:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 12:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 13:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 14:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 15:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
]
10:40:55:setup_element:INFO: Beginning SMX ASICs map scan
10:40:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:40:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:40:55:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:40:55:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:40:55:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
10:40:55:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:40:55:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:40:56:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:40:56:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:40:56:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:40:56:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:40:56:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:40:56:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:40:58:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 71
Eye Windows:
Uplink 8: _______________________________________________________________________XXXXXXXX_
Uplink 9: _______________________________________________________________________XXXXXXXX_
Uplink 10: _______________________________________________________________________XXXXXXXX_
Uplink 11: _______________________________________________________________________XXXXXXXX_
Uplink 12: ________________________________________________________________________XXXXXXX_
Uplink 13: ________________________________________________________________________XXXXXXX_
Uplink 14: ________________________________________________________________________XXXXXXXX
Uplink 15: ________________________________________________________________________XXXXXXXX
Data phase characteristics:
Uplink 8:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 9:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 10:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 11:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 12:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 13:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 14:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 15:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
10:40:58:setup_element:INFO: Performing Elink synchronization
10:40:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:40:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:40:58:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:40:58:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:40:58:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:40:58:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
10:40:58:ST3_emu:INFO: Number of chips: 4
addr | upli | dwnli | grp | uplinks | uplinks_map
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
10:40:59:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:40:59:febtest:INFO: 0-1 | XA-000-08-002-000-005-036-11 | 12.4 | 1247.9
10:40:59:febtest:INFO: 0-3 | XA-000-08-002-000-005-164-01 | 12.4 | 1259.6
10:40:59:febtest:INFO: 0-5 | XA-000-08-002-000-005-172-01 | 18.7 | 1236.2
10:41:00:febtest:INFO: 0-7 | XA-000-08-002-000-005-184-06 | 6.1 | 1277.1
10:41:00:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:41:03:ST3_smx:INFO: chip: 0-1 9.288730 C 1259.567515 mV
10:41:03:ST3_smx:INFO: Electrons
10:41:03:ST3_smx:INFO: # loops 0
10:41:05:ST3_smx:INFO: # loops 1
10:41:07:ST3_smx:INFO: # loops 2
10:41:08:ST3_smx:INFO: # loops 3
10:41:10:ST3_smx:INFO: # loops 4
10:41:12:ST3_smx:INFO: Total # of broken channels: 0
10:41:12:ST3_smx:INFO: List of broken channels: []
10:41:12:ST3_smx:INFO: Total # of broken channels: 1
10:41:12:ST3_smx:INFO: List of broken channels: [127]
10:41:12:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:41:16:ST3_smx:INFO: chip: 0-3 25.062742 C 1218.600960 mV
10:41:16:ST3_smx:INFO: Electrons
10:41:16:ST3_smx:INFO: # loops 0
10:41:18:ST3_smx:INFO: # loops 1
10:41:19:ST3_smx:INFO: # loops 2
10:41:21:ST3_smx:INFO: # loops 3
10:41:22:ST3_smx:INFO: # loops 4
10:41:24:ST3_smx:INFO: Total # of broken channels: 0
10:41:24:ST3_smx:INFO: List of broken channels: []
10:41:24:ST3_smx:INFO: Total # of broken channels: 0
10:41:24:ST3_smx:INFO: List of broken channels: []
10:41:25:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:41:28:ST3_smx:INFO: chip: 0-5 25.062742 C 1224.468235 mV
10:41:28:ST3_smx:INFO: Electrons
10:41:28:ST3_smx:INFO: # loops 0
10:41:30:ST3_smx:INFO: # loops 1
10:41:31:ST3_smx:INFO: # loops 2
10:41:33:ST3_smx:INFO: # loops 3
10:41:35:ST3_smx:INFO: # loops 4
10:41:36:ST3_smx:INFO: Total # of broken channels: 0
10:41:36:ST3_smx:INFO: List of broken channels: []
10:41:36:ST3_smx:INFO: Total # of broken channels: 1
10:41:36:ST3_smx:INFO: List of broken channels: [13]
10:41:37:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:41:40:ST3_smx:INFO: chip: 0-7 9.288730 C 1271.227515 mV
10:41:40:ST3_smx:INFO: Electrons
10:41:40:ST3_smx:INFO: # loops 0
10:41:42:ST3_smx:INFO: # loops 1
10:41:43:ST3_smx:INFO: # loops 2
10:41:45:ST3_smx:INFO: # loops 3
10:41:46:ST3_smx:INFO: # loops 4
10:41:48:ST3_smx:INFO: Total # of broken channels: 0
10:41:48:ST3_smx:INFO: List of broken channels: []
10:41:48:ST3_smx:INFO: Total # of broken channels: 3
10:41:48:ST3_smx:INFO: List of broken channels: [2, 12, 126]
10:41:49:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:41:49:febtest:INFO: 0-1 | XA-000-08-002-000-005-036-11 | 12.4 | 1265.4
10:41:49:febtest:INFO: 0-3 | XA-000-08-002-000-005-164-01 | 25.1 | 1218.6
10:41:49:febtest:INFO: 0-5 | XA-000-08-002-000-005-172-01 | 25.1 | 1224.5
10:41:50:febtest:INFO: 0-7 | XA-000-08-002-000-005-184-06 | 9.3 | 1271.2
############################################################
# S U M M A R Y #
############################################################
Traceback (most recent call last):
File "febtest.py", line 329, in DoFEB_MicrocableTest
self.ReportList = self.reporter.PrintFEB_MicrocableReport()
File "/home/cbm/ST3_v2.29/lib/ST3_reporter.py", line 292, in PrintFEB_MicrocableReport
mylist += CrtFEB_MicrocableReport()
File "/home/cbm/ST3_v2.29/lib/ST3_reporter.py", line 213, in CrtFEB_MicrocableReport
print_list.append( "SET_ID:\t" + str(out_dict["SET_ID"]) )
KeyError: 'SET_ID'
10:42:02:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_1082/TestDate_2023_11_21-10_40_47/